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Analog Devices Inc. ADM1063ASU

Part No.:
ADM1063ASU
Manufacturer:
Analog Devices Inc.
Category:
Supervisors
Package:
48-TQFP
Datasheet:
AetrixADM1063ASU.pdf
Description:
IC SEQUENCER/SUPERVISOR 48TQFP
Quantity:
Payment:
Payment
Shipping:
Shipping

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Product details

Overview

ADM1063ASU from Analog Devices is a multisupply supervisory and sequencing IC with integrated 12-bit ADC, temperature monitoring (1 internal + 2 remote diode channels), and 10 programmable driver outputs (PDOs). It supervises up to 10 voltage rails with <1.0% accuracy across −40°C to +85°C, supports supply margining on 6 rails, and implements state-machine-based sequencing via SMBus-configurable EEPROM. It is used in DSP/FPGA power-up control and multivoltage line card supervision.

For engineers reviewing the ADM1063ASU datasheet, ADM1063ASU pinout, ADM1063ASU application, or ADM1063ASU equivalent, key selection criteria include its 10-supply fault detection capability, charge-pumped high-voltage PDO outputs (up to 14 V), dual-mode input flexibility (VXx as SFD or logic inputs), 12-bit ADC readback of all supervised voltages, and support for closed-loop voltage margining.

Technical Context

The ADM1063ASU integrates a deterministic sequencing engine (SE) implementing a 63-state finite state machine, enabling conditional power-up/down sequences triggered by input events (e.g., supply OK, fault, timeout). Its 12-bit SAR ADC performs round-robin conversion across up to 12 channels - including VH, VP1–VP4, VX1–VX5, REFIN, and temperature sensor inputs - with 0.44 ms per conversion and ±2.5 LSB INL.

Power is arbitrated from the highest active supply among VH (3.0–14.4 V) or VPx (3.0–6.0 V), regulating to VDDCAP (2.7–5.4 V); no external regulator is needed. Six PDOs (PDO1–PDO6) feature internally charge-pumped drivers capable of sourcing up to 14 V at ≤1 μA load for N-FET gate control, while PDO7–PDO10 operate as LV logic-level drivers with configurable pull-up targets (VDDCAP or VPx).

Key Specifications

Parameter Value and Actual Design Meaning
Supply Supervision Accuracy±1.0% across −40°C to +85°C - ensures reliable undervoltage/overvoltage fault detection for critical system rails
ADC Resolution & Range12-bit SAR, 0 to VREFIN (2.048 V) - enables precise readback of attenuated VH/VPx/VXx signals with 0.125°C temperature resolution
Programmable Outputs10 PDOs: 6 HV (charge-pumped, up to 14 V), 4 LV (push-pull/open-collector) - supports both FET gate drive and logic enable functions
Input Flexibility5 dual-function VXx pins (SFD thresholds 0.573–1.375 V or digital inputs) - simplifies board design by reusing pins for monitoring or control
Sequencing Engine63-state FSM with SMBus-programmable transitions - allows complex, event-driven power sequencing without external microcontroller
Temperature Sensing1 internal + 2 remote diode channels, ±3°C accuracy - provides thermal management for FPGAs, processors, and power stages
InterfaceSMBus 2.0 compliant (400 kHz), 7-bit address with A0/A1 pins - enables integration into existing system management buses

Pinout & Package

ADM1063ASU is available in a 40-lead, 6 mm × 6 mm LFCSP package with exposed pad (NC, recommended for mechanical stability). Pin functions are validated per Analog Devices Rev. D datasheet Figures 3 and Table 4.

Pin/Terminal Circuit Role Design Meaning
VH, VP1–VP4High-/low-voltage supply fault detector inputsVH accepts 6–14.4 V or 2.5–6 V ranges; VPx accepts 1.25–6 V ranges via selectable attenuators - enables supervision of diverse rail voltages
VX1–VX5Dual-function inputs (SFD or logic)High-impedance (1 MΩ) inputs with 0.573–1.375 V threshold range - usable as precision fault detectors or general-purpose digital inputs
PDO1–PDO6Charge-pumped high-voltage outputsInternally boosted to 11–14 V (IOH = 0 μA) - directly drives N-FET gates in high-side supply paths without external boost circuitry
PDO7–PDO10Configurable low-voltage outputsPush-pull or open-collector with pull-up to VDDCAP or VPx - supports logic-level enables, reset asserts, or status signaling
REFIN/REFOUTADC reference interfaceREFOUT supplies 2.048 V ±0.25% reference; REFIN accepts internal or external reference - improves ADC gain error to ±0.05%
D1P/D1N, D2P/D2NRemote temperature sensor interfacesDifferential inputs for two external thermal diodes - enables accurate junction temperature monitoring of CPUs, FPGAs, or power MOSFETs
SCL/SDASMBus interfaceBidirectional open-drain pins requiring external pull-ups - supports standard system management communication and configuration updates

Key Features

Feature Design Value
10-supply supervision with <0.5% accuracy at 25°CEnables precise margining and fault detection for complex multirail systems such as server motherboards and telecom line cards
Integrated 12-bit ADC with round-robin scanningReads back all supervised voltages and temperature sensors without host intervention - reduces firmware overhead and enables real-time health monitoring
Charge-pumped PDO outputs (PDO1–PDO6)Delivers up to 14 V gate drive from 3.3 V or 5 V supplies - eliminates need for external high-voltage charge pumps in FPGA/DSP power sequencing
EEPROM-based configuration storage (256 bytes)Persists full sequencing logic, fault thresholds, and margining settings across power cycles - enables "set-and-forget" deployment in embedded systems
Dual-mode VXx inputs (SFD or logic)Reduces pin count and PCB routing complexity by allowing reuse of same pins for analog supervision or digital control signaling
Internal + dual remote temperature sensingProvides comprehensive thermal visibility across system hotspots - supports dynamic thermal throttling and fan control in industrial and networking equipment

Applications

Server Power Sequencing DSP/FPGA Board Control

Use Scenario: Coordinating power-up of CPU core, I/O, memory, and auxiliary rails in 1U/2U servers with strict timing and dependency requirements.

IC Role / Device Role / Timing Role: Central sequencing engine enforcing inter-rail delays, voltage validation windows, and fault-handling states before releasing processor reset.

Use Value: Prevents latch-up and damage during brownout recovery; eliminates need for discrete timers, comparators, and CPLDs in power management subsystems.

Use Scenario: Managing asymmetric power domains (e.g., 1.2 V core, 2.5 V I/O, 3.3 V peripherals) on high-density FPGA carrier boards with thermal constraints.

IC Role / Device Role / Timing Role: Simultaneous voltage supervision, closed-loop margining of 6 rails, and temperature-triggered throttling via sequenced PDO asserts.

Use Value: Enables production-level voltage tolerance testing and runtime thermal adaptation - improving yield and long-term reliability in field-deployed systems.

Multivoltage Line Card Supervision In-Circuit Voltage Margining

Use Scenario: Monitoring and sequencing +12 V, +5 V, +3.3 V, −12 V, and auxiliary bias rails on telecom central office line cards with hot-swap capability.

IC Role / Device Role / Timing Role: Redundant power arbitration (VH or VPx), glitch-filtered fault detection, and watchdog-integrated SE for autonomous recovery after transient faults.

Use Value: Maintains system uptime during backplane voltage sags; supports graceful shutdown and restart without host CPU involvement.

Use Scenario: Automated in-circuit testing of DC-DC converter output tolerance under varying load and temperature conditions during manufacturing test.

IC Role / Device Role / Timing Role: Precise 12-bit ADC readback combined with programmable PDO-controlled margining DACs to inject controlled voltage offsets.

Use Value: Replaces benchtop power supplies and DMMs in functional test - accelerates test time and improves repeatability for high-volume production.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multisupply supervisory and sequencing applications.

Alternative Part Technical Difference Application Difference Selection Advice
ADM1062ACPZ8-supply supervision (vs. 10), no charge-pumped PDOs, 48-lead LFCSP onlyLacks HV FET drive capability; limited to logic-level sequencing in lower-complexity systemsSelect when supervising ≤8 rails and external gate drivers are acceptable
TPS40422RGETTI dual-phase controller with integrated sequencing; no ADC or temperature sensing; 24-V max inputDesigned for synchronous buck control + sequencing, not standalone supervisionSelect when tight coupling between PWM control and sequencing is required, and analog monitoring is handled elsewhere

Compared with ADM1062ACPZ and TPS40422RGET, the ADM1063ASU uniquely combines 10-rail supervision, charge-pumped HV outputs for direct N-FET drive, integrated 12-bit ADC readback, and dual remote temperature sensing - making it optimal for high-integration, self-contained power management in space-constrained networking and compute platforms.

Availability

ADM1063ASU is available at Aetrix Electronics and suitable for server/routers, DSP/FPGA supply sequencing, and multivoltage system line cards requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for ADM1063ASU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.

The ADM1063ASU belongs to Analog Devices' Power Management and Supervisory IC product line, designed specifically for intelligent, autonomous power sequencing and health monitoring in high-reliability multirail systems.

FAQ

What is the primary function of the ADM1063ASU in a power management system?

The ADM1063ASU serves as a fully integrated multisupply supervisor and sequencer with built-in ADC and temperature monitoring. It replaces discrete comparators, timers, and microcontrollers by autonomously managing up to 10 voltage rails - detecting faults, enforcing power-up/down order, driving FETs via charge-pumped outputs, and reporting health data over SMBus. The ADM1063ASU enables robust, compact, and software-configurable power control in demanding applications like servers and telecom line cards.

Does the ADM1063ASU require an external voltage reference for ADC operation?

No - the ADM1063ASU includes an internal 2.048 V ±0.25% reference (REFOUT) that can be directly connected to REFIN for standard operation. However, an external high-accuracy reference may be used on REFIN to improve ADC gain error to ±0.05%. The ADM1063ASU's REFOUT pin must be decoupled with a minimum 1 μF capacitor to REFGND for stability, as specified in the Rev. D datasheet.

How does the ADM1063ASU handle power supply redundancy and brownout conditions?

The ADM1063ASU uses an internal VDD arbitrator to select the highest valid supply among VH (3.0–14.4 V) or VPx (3.0–6.0 V), regulating it to VDDCAP (2.7–5.4 V). During brownouts, the VDDCAP decoupling capacitor (10 μF recommended) acts as a reservoir, sustaining operation until the next highest supply takes over. This architecture ensures continuous supervision even if one rail fails - a key reliability feature of the ADM1063ASU in mission-critical systems.

Can the VXx pins on the ADM1063ASU be used for both voltage supervision and digital logic inputs?

Yes - each VXx pin (VX1–VX5) is a dual-function terminal. It operates as a high-impedance (1 MΩ) supply fault detector with programmable thresholds from 0.573 V to 1.375 V, or as a general-purpose digital input with VIH ≥ 2.0 V and VIL ≤ 0.8 V. Configuration is done via EEPROM registers; the ADM1063ASU does not require hardware modification to switch modes, providing design flexibility without pin count penalty.

What is the maximum output voltage achievable from the charge-pumped PDOs on the ADM1063ASU?

The charge-pumped PDOs (PDO1–PDO6) on the ADM1063ASU deliver up to 14 V typical at zero load (IOH = 0 μA), with 10.5–13.5 V maintained at 1 μA sink current. This high-voltage capability is generated internally using a charge pump driven from VCCP (5.25 V), eliminating external boost circuitry. The ADM1063ASU's charge-pump architecture enables direct gate drive of N-channel MOSFETs in high-side switching configurations - a defining feature distinguishing it from standard supervisors.

ADM1063ASU Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
48-TQFP
Packaging:
Tray
Product Status:
Obsolete
Programmable:
Not Verified
Type:
Sequencer
Number of Voltages Monitored:
10
Voltage - Threshold:
Adjustable/Selectable
Output:
Programmable
Reset:
-
Reset Timeout:
-
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
48-TQFP (7x7)

ADM1063ASU FAQ

1.How can I place an order for ADM1063ASU through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM1063ASU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM1063ASU reliable?

The price and inventory of ADM1063ASU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1063ASU is usually 5 days.

3.What payment methods are accepted for ADM1063ASU?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1063ASU transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM1063ASU?

ADM1063ASU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM1063ASU order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM1063ASU?

For technical support, including ADM1063ASU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1063ASU requirements.

6.How does Aetrix verify that ADM1063ASU is sourced from the original manufacturer or authorized distributors?

All ADM1063ASU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1063ASU meets industry standards.

7.What is the process for return or replacement of ADM1063ASU?

All ADM1063ASU units undergo pre-shipment inspection (PSI). If there is an issue with ADM1063ASU, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM1063ASU part is unused and in its original packaging.

Return procedure for ADM1063ASU:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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