Analog Devices Inc. ADM1064ACP

Overview

ADM1064ACP from Analog Devices is a configurable supervisory and sequencing IC for multivoltage systems, integrating 10 supply fault detectors (±1.0% accuracy across −40°C to +85°C), a 12-bit SAR ADC for voltage readback of up to 12 channels, and 10 programmable driver outputs (PDOs) with dual-mode operation (LV logic or HV FET gate drive). It enables precise power-up/down sequencing in DSP/FPGA boards and telecom line cards.

For engineers reviewing the ADM1064ACP datasheet, ADM1064ACP pinout, ADM1064ACP application, or ADM1064ACP equivalent, key selection considerations include its 40-lead LFCSP package, VH/VPx/VXx input flexibility (0.573 V–14.4 V supervision range), SMBus-programmable sequencing engine, charge-pumped PDO1–PDO6 capable of 12.5 V output, and integrated EEPROM for configuration persistence.

Technical Context

The ADM1064ACP implements a state-machine-based Sequencing Engine (SE) supporting up to 63 programmable states, enabling conditional output transitions based on input events (e.g., supply OK, fault, timeout). Its power arbitration selects the highest valid supply among VH (3.0–14.4 V) or VPx (3.0–6.0 V) to generate a regulated 4.75 V VDDCAP, ensuring redundancy without external biasing.

Input supervision uses selectable attenuators (for VH/VPx) and high-impedance paths (1 MΩ for VXx), with digital glitch filtering (0–100 μs) and 8-bit threshold resolution. The 12-bit ADC supports round-robin conversion across all supervised inputs plus two auxiliary channels, referenced to either internal 2.048 V REFOUT or an external reference for improved accuracy.

Key Specifications

Pinout & Package

ADM1064ACP is housed in a 40-lead Lead Frame Chip Scale Package (LFCSP) with 6 mm × 6 mm footprint and 0.5 mm pitch. The exposed pad is NC but recommended for soldering to improve mechanical stability and thermal dissipation (θJA = 25°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supply supervision and sequencing applications.

Compared with ADM1064ACP, ADM1168ACPZ offers lower channel count and no HV drive but simplifies layout with smaller footprint, while TPS40400RHLR shifts sequencing intelligence to firmware and removes EEPROM dependency - ADM1064ACP remains optimal for autonomous, high-channel-count, FET-driven systems requiring zero-host startup.

Availability

ADM1064ACP is available at Aetrix Electronics and suitable for server/routers, DSP/FPGA supply sequencing, and telecom line card control requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ADM1064ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide.

The ADM1064ACP belongs to Analog Devices' Super Sequencer® family, engineered specifically for autonomous, multirail power management in high-reliability computing and communications infrastructure where deterministic sequencing and precision voltage telemetry are critical.

FAQ

What is the maximum input voltage the ADM1064ACP can supervise on its VH pin?

The ADM1064ACP VH pin supports supervision of supply voltages up to 14.4 V with ±1.0% accuracy across temperature. This allows direct monitoring of 12 V backplane rails in telecom and server applications without external level-shifting. The VH pin also serves as a power source for the internal VDDCAP regulator, enhancing system redundancy. ADM1064ACP achieves this using an internal selectable attenuator and high-precision comparator architecture documented in the Rev. E datasheet.

How does the ADM1064ACP handle power supply arbitration between multiple rails?

The ADM1064ACP uses an internal VDD arbitrator that selects the highest valid voltage among VH (3.0–14.4 V) or VPx (3.0–6.0 V) inputs to generate a regulated 4.75 V VDDCAP supply. If two supplies differ by less than 100 mV, the first to reach regulation retains control. This architecture ensures uninterrupted operation during brownouts, as the VDDCAP decoupling capacitor acts as a reservoir. ADM1064ACP's arbitration is fully autonomous and requires no external components or configuration.

Can the ADM1064ACP drive N-channel MOSFET gates directly, and which pins support this?

Yes, ADM1064ACP PDO1 through PDO6 support internally charge-pumped high-voltage mode, delivering up to 12.5 V at 1 μA to directly drive the gates of N-channel MOSFETs used in hot-swap or power-path control. This eliminates external charge pumps or level shifters. PDO7–PDO10 operate in LV mode only (push-pull or open-collector). The charge-pump function is enabled per-PDO via configuration registers and is independent of the VPx rail voltage - ADM1064ACP maintains this capability even when VPx is as low as 3.0 V.

What ADC performance specifications apply to the ADM1064ACP's voltage readback function?

The ADM1064ACP integrates a 12-bit SAR ADC with ±2.5 LSB INL, ±0.05% gain error, and 0.25 LSB RMS noise when using the internal 2.048 V reference. Conversion time is 0.44 ms per channel or 84 ms for all 12 channels (including VH, VPx, VXx, AUX1, AUX2) with averaging enabled. ADC accuracy is referenced to REFIN, which may be driven by the internal REFOUT or a higher-precision external source - ADM1064ACP's ADC supports both configurations without hardware change.

Does the ADM1064ACP require external programming hardware, or can it be configured in-system?

The ADM1064ACP supports full in-system configuration via its SMBus interface: initial setup, runtime parameter updates, and EEPROM writes (256-byte user memory) can all be performed after soldering using standard SMBus commands. Analog Devices provides GUI-based software for intuitive register mapping and sequencing logic definition. No JTAG, debug port, or external programmer is needed - ADM1064ACP loads its configuration automatically at power-up from EEPROM, enabling true "set-and-forget" deployment.