Analog Devices Inc. ADM1064ASUZ

Overview

ADM1064ASUZ from Analog Devices is a configurable supervisory and sequencing IC for multivoltage systems, integrating 10 supply fault detectors (±1.0% accuracy across temperature), a 12-bit SAR ADC for voltage readback of up to 12 channels, and 10 programmable driver outputs (PDOs) with charge-pump HV mode (up to 14 V) for N-FET gate drive. It supports complex power-up/down sequencing in DSP/FPGA and server line-card applications.

For engineers reviewing the ADM1064ASUZ datasheet, ADM1064ASUZ pinout, ADM1064ASUZ application, or ADM1064ASUZ equivalent, key selection considerations include its dual-mode VXx inputs (analog SFD or digital logic), SMBus-programmable sequencing engine with 63 states, on-chip 2.048 V reference, EEPROM-based configuration storage, and redundancy-enabled power arbitration from VPx/VH rails.

Technical Context

The ADM1064ASUZ implements a state-machine-based Sequencing Engine (SE) supporting up to 63 programmable states, enabling conditional output transitions based on input events (e.g., supply OK, fault, watchdog timeout). Its 10-input supervision system includes five dedicated VPx/VH analog channels with selectable attenuators (0.573–14.4 V range) and five dual-function VXx pins usable as either high-impedance SFDs or CMOS/TTL logic inputs.

Power is autonomously derived from the highest active rail among VH (3.0–14.4 V) or VPx (3.0–6.0 V), regulated to VDDCAP (2.7–5.4 V) via internal LDO arbitration. The 12-bit ADC performs round-robin conversions across all supervised voltages and two auxiliary inputs, with gain error ±0.05% and INL ±2.5 LSB when referenced to the internal 2.048 V REFOUT.

Key Specifications

Pinout & Package

ADM1064ASUZ is packaged in a 40-lead LFCSP (5 mm × 5 mm, 0.5 mm pitch) with exposed pad (NC, recommended for mechanical stability). Pin functions are validated per Analog Devices Rev. E datasheet Figures 3 and Table 4.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multirail sequencing and supervision applications.

Compared with ADM1166ACPZ, ADM1064ASUZ adds integrated 12-bit ADC and 2 extra PDOs for expanded rail coverage, while TPS389033DSCR offers footprint and cost savings only in non-sequencing, sub-4-rail use cases - neither matches ADM1064ASUZ's combined supervision, sequencing, and telemetry capability.

Availability

ADM1064ASUZ is available at Aetrix Electronics and suitable for server/routers, DSP/FPGA supply sequencing, central office systems, multivoltage line cards, and in-circuit margining applications requiring stable component supply and long-term lifecycle support.

Supply support for ADM1064ASUZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, industrial automation, and communications infrastructure.

The ADM1064ASUZ belongs to Analog Devices' Super Sequencer® family, designed specifically for intelligent power management in complex multivoltage systems where reliability, configurability, and integrated telemetry are critical.

FAQ

What is the maximum input voltage the ADM1064ASUZ can supervise on its VH pin?

The ADM1064ASUZ supports a high-range input of 6.0 V to 14.4 V on the VH pin, enabling direct supervision of 12 V backplane supplies. This range is achieved using an internal selectable attenuator, and absolute maximum rating for VH is 16 V. Operation beyond 14.4 V violates the specified supervision accuracy and may trigger overvoltage faults.

How does the ADM1064ASUZ handle power loss across multiple supply rails?

The ADM1064ASUZ uses internal power arbitration to select the highest valid rail among VH or VPx (≥3.0 V) to maintain VDDCAP. During transient brownouts, the 10 μF VDDCAP decoupling capacitor acts as a reservoir, sustaining operation until the next highest rail recovers. This architecture ensures uninterrupted supervision and sequencing even during brief rail collapses.

Can the VXx pins on the ADM1064ASUZ be used simultaneously as analog inputs and digital logic inputs?

No - each VXx pin (VX1–VX5) must be configured exclusively as either a high-impedance analog supply fault detector (with thresholds from 0.573 V to 1.375 V) or a CMOS/TTL-compatible digital input. The configuration is set in EEPROM and cannot be dynamically reconfigured during operation. Using all five as analog inputs leaves zero digital inputs available.

What is the role of the VCCP pin on the ADM1064ASUZ, and what external component is required?

The VCCP pin on the ADM1064ASUZ provides the 5.25 V central charge-pump voltage used to drive the high-voltage mode of PDO1–PDO6. A 10 μF reservoir capacitor must be connected between VCCP and GND to stabilize the charge pump under dynamic load. Without this capacitor, PDO HV output voltage collapses under load, compromising N-FET gate drive capability.

Does the ADM1064ASUZ support SMBus timeout and glitch filtering features?

Yes - the ADM1064ASUZ implements SCL held-low timeout detection and false-start prevention on the SMBus interface, as documented in Rev. E datasheet Section "SCL Held Low Timeout Section and False Start Detection". Input glitch filtering is also programmable per channel from 0 μs to 100 μs, preventing spurious fault triggers from noise on VPx/VH/VXx lines.