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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM1065ASUZ-RL7

Name: ADM1065ASUZ-RL7
Brand: Analog Devices Inc.
SKU: ADM1065ASUZ-RL7
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADM1065ASUZ-RL7

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 48-TQFP

Datasheet:: ADM1065ASUZ-RL7.pdf

Description:: IC SUPERVISOR 10 CHANNEL 48TQFP

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Product details

Overview

ADM1065ASUZ-RL7 from Analog Devices is a configurable supervisory and sequencing IC for multivoltage systems, featuring 10 programmable supply fault detectors with ±1% accuracy across −40°C to +85°C, 10 SMBus-programmable driver outputs (6 charge-pumped HV, 4 LV), and a state-machine-based sequencing engine supporting up to 63 states for power-up/down control and fault handling in DSP/FPGA line cards.

For engineers reviewing the ADM1065ASUZ-RL7 datasheet, ADM1065ASUZ-RL7 pinout, ADM1065ASUZ-RL7 application, or ADM1065ASUZ-RL7 equivalent, key selection considerations include input voltage range flexibility (0.573 V–14.4 V), dual-function VXx pins (analog SFD or digital logic), charge-pumped PDO drive capability (up to 14 V), EEPROM-configurable sequencing logic, and redundancy-enabled arbitration among VPx/VH supplies.

Technical Context

The ADM1065ASUZ-RL7 implements a deterministic state-machine sequencing engine (SE) with 63 programmable states, where transitions are triggered by input events (e.g., supply OK, fault assertion, timer expiry). Each state defines output driver behavior (PDOx high/low/three-state) and conditional branching via 10 inputs-five dedicated (VH, VP1–VP4) and five dual-function (VX1–VX5).

Supply supervision uses selectable attenuators per input: VH supports 6–14.4 V (high range) or 2.5–6 V (midrange); VPx supports 2.5–6 V, 1.25–3 V, or 0.573–1.375 V ranges; VXx operates only in ultralow range (0.573–1.375 V) or as CMOS/TTL digital inputs. Thresholds are set with 8-bit resolution and digitally programmable hysteresis (up to 425 mV).

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Input Range	VH: 3.0–14.4 V; VPx: 3.0–6.0 V; enables supervision of 12 V backplane, 5 V, 3.3 V, 1.8 V, and sub-1 V rails
Accuracy	±1.0% over −40°C to +85°C; ensures reliable fault detection without recalibration across industrial temperature range
Input Resolution	8-bit threshold programming; provides 3.14 mV step size in ultralow range (0.573–1.375 V) for precise margining
PDO Drive Modes	6 HV outputs (PDO1–PDO6): charge-pumped 11–14 V @ 20 µA avg; 10 LV outputs (PDO1–PDO10): push-pull or open-collector to VDDCAP/VPx
Sequencing Engine	63-state finite state machine; supports conditional branching, fault-triggered recovery, and watchdog-integrated timing
Interface	SMBus 2-wire (400 kHz max); A0/A1 address select; EEPROM stores full configuration for autonomous boot-time execution
Power Architecture	OR'ed LDO arbitration across VH/VPx; VDDCAP regulated to 4.75 V typical; eliminates single-point supply dependency

Pinout & Package

ADM1065ASUZ-RL7 is packaged in a 40-lead, 6 mm × 6 mm LFCSP with exposed pad (NC, soldered for mechanical stability). Pin functions are validated per Analog Devices Rev. E datasheet Figures 3 and Table 4.

Pin/Terminal	Circuit Role	Design Meaning
VH	High-voltage analog input	Supervises supplies up to 14.4 V using selectable attenuator; also participates in VDDCAP arbitration
VP1–VP4	Low-voltage analog inputs	Support three attenuation ranges (0.573–1.375 V, 1.25–3.0 V, 2.5–6.0 V); used for 1.2 V–5 V rail monitoring
VX1–VX5	Dual-function inputs	Configurable as ultralow-range SFD (0.573–1.375 V) or CMOS/TTL logic inputs; no attenuation error
PDO1–PDO6	Charge-pumped HV drivers	Internally generate ~12 V gate drive for external N-FETs; enable high-side switching of 3.3 V/5 V/12 V supplies
PDO7–PDO10	LV programmable outputs	Push-pull or open-collector to VDDCAP/VPx; suitable for enabling logic, reset signals, or status indicators
SDA/SCL	SMBus interface	Bidirectional open-drain; requires external pull-ups; supports configuration download and real-time monitoring
A0/A1	Address select	Set 7-bit SMBus address bits 6 and 7; allows up to four ADM1065ASUZ-RL7 devices on same bus
VDDCAP	Regulated internal supply	4.75 V LDO output derived from highest VPx/VH; decoupled with 10 µF capacitor for brownout hold-up

Key Features

Feature	Design Value
10-channel supply supervision	Simultaneous monitoring of up to 10 rails with independent undervoltage/overvoltage/out-of-window fault detection
63-state sequencing engine	Enables complex, event-driven power sequencing (e.g., staggered FPGA core/I/O bank enable with fault rollback)
Charge-pumped HV PDOs	PDO1–PDO6 deliver 12 V gate drive without external boost circuitry-reducing BOM count for N-FET hot-swap control
EEPROM-based configuration	256-byte user EEPROM stores full sequencing logic, thresholds, hysteresis, and glitch filter settings for zero-software boot
Redundant supply arbitration	VDDCAP powered from highest active VPx or VH rail; maintains operation during single-rail brownout or hot-swap transients
Dual-mode VXx inputs	VX1–VX5 serve as either precision analog monitors (0.573–1.375 V) or noise-immune digital inputs-maximizing pin utility

Applications

Telecom Line Cards	Server Power Subsystems
Use Scenario: Supervising and sequencing multiple voltage rails (12 V backplane, 5 V aux, 3.3 V I/O, 1.2 V FPGA core) on carrier-grade line cards with hot-swap capability. IC Role / Device Role / Timing Role: Centralized sequencing engine coordinating power-on order, detecting undervoltage faults on 12 V supply, and asserting reset to downstream logic upon out-of-window condition. Use Value: Prevents FPGA configuration corruption by enforcing strict 12 V → 5 V → 3.3 V → 1.2 V ramp sequence and halting startup if 12 V dips below 11.4 V.	Use Scenario: Managing power delivery to CPU, memory, and PCIe slots in 1U rack servers with dynamic load sharing and fault isolation. IC Role / Device Role / Timing Role: Monitoring VRM outputs, driving gate-enable signals to external N-FETs controlling 1.8 V memory rails, and triggering graceful shutdown on overvoltage. Use Value: Enables safe hot-plug of DIMMs by sequencing 1.8 V enable only after stable 12 V and 3.3 V presence, with <100 µs glitch filtering to reject transient noise.
FPGA Development Platforms	In-Circuit Supply Margining
Use Scenario: Controlling power sequencing for Xilinx/Kintex Ultrascale+ evaluation boards with mixed 0.85 V, 1.2 V, 1.8 V, and 3.3 V domains. IC Role / Device Role / Timing Role: Using VXx pins as precision analog inputs to monitor margin-adjusted VCCINT, while PDO7–PDO10 assert enable signals to LDOs based on sequenced state transitions. Use Value: Supports automated margin testing by reprogramming SFD thresholds via SMBus to verify FPGA operation at ±5% rail tolerance before production deployment.	Use Scenario: Validating supply robustness during manufacturing test by injecting controlled undervoltage/overvoltage faults and verifying system response. IC Role / Device Role / Timing Role: Acting as programmable fault injector-using VXx as logic inputs to trigger simulated faults, and PDO1–PDO6 to assert reset or disable rails under test conditions. Use Value: Replaces manual jumper-based margining with repeatable, scriptable test sequences stored in EEPROM-reducing test time by >40%.

Telecom Line Cards

Server Power Subsystems

Use Scenario: Supervising and sequencing multiple voltage rails (12 V backplane, 5 V aux, 3.3 V I/O, 1.2 V FPGA core) on carrier-grade line cards with hot-swap capability.

IC Role / Device Role / Timing Role: Centralized sequencing engine coordinating power-on order, detecting undervoltage faults on 12 V supply, and asserting reset to downstream logic upon out-of-window condition.

Use Value: Prevents FPGA configuration corruption by enforcing strict 12 V → 5 V → 3.3 V → 1.2 V ramp sequence and halting startup if 12 V dips below 11.4 V.

Use Scenario: Managing power delivery to CPU, memory, and PCIe slots in 1U rack servers with dynamic load sharing and fault isolation.

IC Role / Device Role / Timing Role: Monitoring VRM outputs, driving gate-enable signals to external N-FETs controlling 1.8 V memory rails, and triggering graceful shutdown on overvoltage.

Use Value: Enables safe hot-plug of DIMMs by sequencing 1.8 V enable only after stable 12 V and 3.3 V presence, with <100 µs glitch filtering to reject transient noise.

FPGA Development Platforms

In-Circuit Supply Margining

Use Scenario: Controlling power sequencing for Xilinx/Kintex Ultrascale+ evaluation boards with mixed 0.85 V, 1.2 V, 1.8 V, and 3.3 V domains.

IC Role / Device Role / Timing Role: Using VXx pins as precision analog inputs to monitor margin-adjusted VCCINT, while PDO7–PDO10 assert enable signals to LDOs based on sequenced state transitions.

Use Value: Supports automated margin testing by reprogramming SFD thresholds via SMBus to verify FPGA operation at ±5% rail tolerance before production deployment.

Use Scenario: Validating supply robustness during manufacturing test by injecting controlled undervoltage/overvoltage faults and verifying system response.

IC Role / Device Role / Timing Role: Acting as programmable fault injector-using VXx as logic inputs to trigger simulated faults, and PDO1–PDO6 to assert reset or disable rails under test conditions.

Use Value: Replaces manual jumper-based margining with repeatable, scriptable test sequences stored in EEPROM-reducing test time by >40%.

Equivalent & Alternatives

The following parts are listed as comparable options for similar supply supervision and sequencing applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM1066ASTZ-REEL	48-lead TQFP package; identical functionality and register map; lacks exposed thermal pad	Preferred for through-hole prototyping or legacy PCB layouts requiring larger footprint	Select when board space permits larger package or when thermal pad soldering is not feasible
TPS659122ZQWR	TI PMIC with integrated DC/DC converters; fixed 6-rail sequencing; no charge-pumped HV outputs	Targets power-constrained portable systems-not suitable for 12 V gate drive or >6 rail supervision	Choose only if system requires on-chip regulation and can accept reduced sequencing flexibility and rail count

Compared with ADM1065ASUZ-RL7, ADM1066ASTZ-REEL offers identical sequencing logic and supervision accuracy in a different package, while TPS659122ZQWR trades configurability and HV drive for integrated power conversion-making it unsuitable for high-voltage FET control or >6 rail systems.

Availability

ADM1065ASUZ-RL7 is available at Aetrix Electronics and suitable for telecom line cards, server power subsystems, FPGA development platforms, and in-circuit supply margining applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ADM1065ASUZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and a focus on precision signal conditioning and power management.

The ADM1065ASUZ-RL7 belongs to Analog Devices' Super Sequencer® family, engineered specifically for complex multirail sequencing and fault monitoring in high-reliability infrastructure equipment-including central office systems, enterprise servers, and programmable logic platforms.

FAQ

What is the maximum supply voltage that ADM1065ASUZ-RL7 can supervise on the VH pin?

The ADM1065ASUZ-RL7 supports supervision of supplies up to 14.4 V on the VH pin when configured in high-range mode (6.0 V–14.4 V). Absolute maximum rating is 16 V, but functional supervision is limited to 14.4 V per datasheet Table 1. This enables direct monitoring of 12 V backplane rails without external resistive dividers.

Does ADM1065ASUZ-RL7 require external components to generate its internal VDDCAP supply?

Yes, ADM1065ASUZ-RL7 requires a 10 µF decoupling capacitor connected between VDDCAP and GND. This capacitor serves dual roles: stabilizing the internally regulated 4.75 V supply and acting as a reservoir during brownout events when the primary VPx or VH supply dips transiently-ensuring uninterrupted sequencing engine operation.

Can ADM1065ASUZ-RL7 drive N-channel MOSFETs directly without external level-shifting circuitry?

Yes, ADM1065ASUZ-RL7's PDO1–PDO6 outputs feature an internal charge pump that generates up to 14 V (typical 12 V) gate drive referenced to VDDCAP. This allows direct connection to the gate of external N-FETs controlling high-side 3.3 V, 5 V, or 12 V supplies-eliminating need for discrete boost converters or level shifters.

How many unique sequencing states does the ADM1065ASUZ-RL7 sequencing engine support?

The ADM1065ASUZ-RL7 sequencing engine supports up to 63 programmable states. Each state defines PDO output levels and conditional transitions based on input events (e.g., "if VP1 OK AND VX2 high, go to State 12"). This enables highly granular control over power-up, power-down, and fault-recovery sequences in multirail systems.

Is the EEPROM in ADM1065ASUZ-RL7 field-programmable, and what is its capacity?

Yes, ADM1065ASUZ-RL7 contains 256 bytes of user EEPROM that is fully field-programmable via SMBus. It stores all configuration data-including supply thresholds, hysteresis values, glitch filter settings, sequencing state tables, and PDO drive modes-enabling complete device setup without host processor intervention at power-up.

ADM1065ASUZ-RL7 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: Super Sequencer®

Package/Case:: 48-TQFP

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Sequencer

Number of Voltages Monitored:: 10

Voltage - Threshold:: Adjustable/Selectable

Output:: Programmable

Reset:: -

Reset Timeout:: -

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 48-TQFP (7x7)

ADM1065ASUZ-RL7 FAQ

1.How can I place an order for ADM1065ASUZ-RL7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM1065ASUZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM1065ASUZ-RL7 reliable?

The price and inventory of ADM1065ASUZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1065ASUZ-RL7 is usually 5 days.

3.What payment methods are accepted for ADM1065ASUZ-RL7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1065ASUZ-RL7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM1065ASUZ-RL7?

ADM1065ASUZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM1065ASUZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM1065ASUZ-RL7?

For technical support, including ADM1065ASUZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1065ASUZ-RL7 requirements.

6.How does Aetrix verify that ADM1065ASUZ-RL7 is sourced from the original manufacturer or authorized distributors?

All ADM1065ASUZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1065ASUZ-RL7 meets industry standards.

7.What is the process for return or replacement of ADM1065ASUZ-RL7?

All ADM1065ASUZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADM1065ASUZ-RL7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM1065ASUZ-RL7 part is unused and in its original packaging.

Return procedure for ADM1065ASUZ-RL7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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