Analog Devices Inc. ADM1066ACPZ

Overview

ADM1066ACPZ from Analog Devices is a configurable supervisory and sequencing IC for multivoltage systems, integrating 10 supply fault detectors (±1% accuracy), a 12-bit SAR ADC, six 8-bit DACs (0.300 V–1.551 V output), and a state-machine-based sequencing engine supporting up to 63 states. It enables closed-loop voltage margining and programmable power-up/down sequencing in DSP/FPGA supply rails.

For engineers reviewing the ADM1066ACPZ datasheet, ADM1066ACPZ pinout, ADM1066ACPZ application, or ADM1066ACPZ equivalent, key selection considerations include its dual-mode PDO outputs (charge-pumped HV drive for N-FET gates + LV logic-level control), 5 dual-function VXx inputs, SMBus programmability, and support for in-circuit margining testing at ±5% of nominal supplies.

Technical Context

The ADM1066ACPZ implements a deterministic state-machine sequencing engine with conditional transitions triggered by input events (e.g., supply OK, fault, timer expiry), enabling complex power-up/power-down sequences and fault-handling workflows. Its 12-bit ADC performs round-robin conversion across VH, VPx, VXx, AUX1, AUX2, and REFIN with 0.44 ms per channel and ±2.5 LSB INL.

It features six buffered 8-bit DACs with four selectable center-voltage ranges (0.6 V to 1.25 V), 2.36 mV LSB step size, and <2 µs settling time to 50 pF load. The device powers itself from the highest active VPx or VH rail (3.0–14.4 V), regulating to VDDCAP (2.7–5.4 V) with internal LDO arbitration and 10 µF decoupling requirement.

Key Specifications

Pinout & Package

ADM1066ACPZ is packaged in a 40-lead, 6 mm × 6 mm LFCSP with exposed pad (NC). Pin functions are validated per Analog Devices' Rev. F datasheet Figures 3 and Table 4.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multirail supervisory and sequencing applications.

Compared with ADM1166ACPZ, the ADM1066ACPZ offers proven field reliability and identical footprint for legacy server upgrades, while TPS659122ZQW trades margining precision and gate-drive flexibility for integrated regulation-making it unsuitable for applications requiring closed-loop supply validation or discrete N-FET control.

Availability

ADM1066ACPZ is available at Aetrix Electronics and suitable for server power management, DSP/FPGA multirail sequencing, and in-circuit margining test systems requiring stable component supply and long-term lifecycle support.

Supply support for ADM1066ACPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADM1066ACPZ belongs to Analog Devices' Super Sequencer® family, designed specifically for intelligent, software-configurable power supervision and sequencing in high-density multivoltage systems such as servers, routers, and telecom line cards.

FAQ

What is the primary function of the ADM1066ACPZ in a multivoltage system?

The ADM1066ACPZ serves as a configurable supervisory and sequencing IC that monitors up to 10 voltage rails with ±1% accuracy, executes programmable power-up/down sequences via its 63-state sequencing engine, and implements closed-loop voltage margining using six 8-bit DACs and a 12-bit ADC. It replaces discrete supervisors, timers, and margining circuitry in systems like servers and FPGA platforms.

Does the ADM1066ACPZ support both high-voltage and logic-level outputs on its PDO pins?

Yes, the ADM1066ACPZ supports dual-mode operation on its PDO pins: PDO1–PDO6 provide charge-pumped high-voltage drive (up to 14 V) suitable for directly controlling N-FET gates in supply paths, while all 10 PDOs (PDO1–PDO10) also support LV logic-level outputs (push-pull or open-collector) referenced to VDDCAP or VPx. This eliminates need for external level shifters or gate drivers.

How does the ADM1066ACPZ achieve closed-loop voltage margining?

The ADM1066ACPZ achieves closed-loop voltage margining by using its six 8-bit DACs to inject precise offset voltages into the feedback node of dc-dc converters, while simultaneously measuring the resulting rail voltage via its 12-bit ADC on the same VH/VPx inputs. The internal sequencing engine or host SMBus controller adjusts DAC codes based on ADC readback to maintain target margin levels without external components.

What package options are available for the ADM1066ACPZ, and are they pin-compatible?

The ADM1066ACPZ is offered in two packages: 40-lead, 6 mm × 6 mm LFCSP (ACPZ suffix) and 48-lead, 7 mm × 7 mm TQFP. These are not pin-compatible - the LFCSP has dedicated pins for AUX1/AUX2, REFIN/REFOUT, and VCCP, while the TQFP substitutes NC pins in those locations. Designers must select the correct package variant (e.g., ADM1066ACPZ vs. ADM1066ASTZ) and use corresponding layout footprints.

Can the ADM1066ACPZ operate without an external reference voltage?

Yes, the ADM1066ACPZ can operate without an external reference because it integrates a 2.048 V ±0.25% REFOUT pin that can be directly connected to the REFIN pin to serve as the ADC reference. However, for highest ADC accuracy (e.g., <±0.1% gain error), an external precision reference may be connected to REFIN - the device supports either configuration without hardware modification.