Analog Devices Inc. ADM1068ASTZ
- Part No.:
- ADM1068ASTZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 32-LQFP
- Datasheet:
-
ADM1068ASTZ.pdf
- Description:
- IC SUPERVISOR 8 CHANNEL 32LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:183
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM1068ASTZ from Analog Devices is a configurable supervisory and sequencing IC for multivoltage systems, featuring eight programmable supply fault detectors with ±1% accuracy across −40°C to +85°C, eight programmable driver outputs (six with charge-pumped 12 V gate drive), and an SMBus-controlled sequencing engine supporting up to 63 states. It is used in DSP/FPGA supply sequencing and server power-up control.
For engineers reviewing the ADM1068ASTZ datasheet, ADM1068ASTZ pinout, ADM1068ASTZ application, or ADM1068ASTZ equivalent, key selection criteria include its 32-lead LQFP package, VH/VPx/VXx input flexibility (0.573 V–14.4 V supervision range), dual-mode PDO outputs (open-collector, push-pull, weak pull-up), EEPROM-based configuration, and integrated watchdog and interrupt generation.
Technical Context
The ADM1068ASTZ implements a state-machine-based sequencing engine (SE) with 63 programmable states, where transitions are triggered by input events (e.g., supply OK, fault assertion) and enable complex power-up/down sequences and fault-handling logic. Its SE supports SMBus-programmable jumps, warnings, and integration of watchdog timing.
Power is arbitrated among VH (up to 14.4 V) and VP1–VP3 (up to 6.0 V), generating a regulated 4.75 V VDDCAP output; VXx inputs operate as high-impedance analog SFDs (0.573–1.375 V) or CMOS/TTL digital inputs, with glitch filtering (0–100 μs) and programmable hysteresis per channel.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDDCAP Output | 4.75 V regulated LDO; powers internal circuitry and enables stable operation when highest VPx or VH rail ≥3.0 V |
| Supply Supervision Accuracy | ±1% over −40°C to +85°C; ensures reliable undervoltage/overvoltage/out-of-window detection across all input ranges |
| VH Input Range | 6.0–14.4 V (high range) or 2.5–6.0 V (midrange); supports direct monitoring of 12 V backplane supplies |
| VPx Input Ranges | 0.573–1.375 V (ultralow), 1.25–3.0 V (low), 2.5–6.0 V (mid); enables precise supervision of core, I/O, and auxiliary rails |
| VXx Input Function | Dual-mode: high-Z analog SFD (0.573–1.375 V) or digital input; allows warning-level supervision mapped to VPx/VH pins |
| PDO Drive Modes | Three configurations per PDO: open-collector (external pull-up), push-pull (to VDDCAP or VPx), or weak pull-up (to VDDCAP/VPx); PDO1–PDO6 add charge-pumped 12 V HV mode for N-FET gate drive |
| SMBus Interface | Industry-standard 2-wire bus; supports configuration download at power-up, real-time updates, and register access per AN-721 |
Pinout & Package
ADM1068ASTZ is housed in a 32-lead 7 mm × 7 mm LQFP package with exposed pad (θJA = 54°C/W). Pin functions are validated per Analog Devices Rev. D datasheet Figure 3 and Table 4.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VX1–VX4 | High-impedance analog/digital input | Configurable as SFD (0.573–1.375 V threshold) or TTL/CMOS logic input; supports warning-level mapping to VPx/VH |
| VP1–VP3 | Low-voltage analog input | Supervises 0.573–6.0 V supplies via selectable attenuation; three ranges support core, I/O, and auxiliary rails |
| VH | High-voltage analog input | Supervises 2.5–14.4 V supplies (e.g., 12 V backplane); enables redundancy via VDDCAP arbitration |
| PDO1–PDO8 | Programmable driver output | PDO1–PDO6: HV mode (12 V, 20 μA avg) for N-FET gates; PDO7–PDO8: LV logic-level drivers only |
| VDDCAP | Regulated device supply | 4.75 V LDO output derived from highest VPx/VH rail; requires 10 μF decoupling capacitor for stability and brownout hold-up |
| SDA/SCL | SMBus interface | Bidirectional open-drain pins requiring external pull-ups; compliant with 400 kHz SMBus timing (tSU;DAT = 100 ns) |
| A0/A1 | SMBus address select | Set bits 6–7 of 7-bit slave address; enables up to four ADM1068ASTZ devices on same bus |
| REFOUT | Reference voltage output | 2.048 V ±5 mV precision reference; requires 1 μF min load capacitance for stability and PSRR >60 dB |
Key Features
| Feature | Design Value |
|---|---|
| 8-channel supply supervision | Supports simultaneous monitoring of up to eight rails (VH, VP1–VP3, VX1–VX4) with independent UV/OV/out-of-window thresholds |
| Charge-pumped HV drive (PDO1–PDO6) | Delivers 12 V gate drive without external boost circuitry-enables direct control of high-side N-FETs in supply paths |
| 63-state sequencing engine | Enables deterministic, event-driven power sequencing (e.g., staggered ramp-up, fault-triggered shutdown) without external microcontroller |
| User EEPROM (256 bytes) | Stores full configuration (thresholds, hysteresis, glitch filters, SE states); retains settings across power cycles and enables field updates |
| Input glitch filtering (0–100 μs) | Eliminates false triggers from supply bounce or noise during turn-on; programmable per channel to match system transient behavior |
| VDD arbitration architecture | OR-ing of VPx/VH rails ensures continuous operation even if one supply fails-critical for redundant server/routing platforms |
Applications
| Server Power Sequencing | DSP/FPGA Core-I/O Coordination |
|---|---|
Use Scenario: Controlling power-up order of CPU core, memory, and I/O rails in 1U rack servers with multiple isolated DC-DC converters. IC Role / Device Role / Timing Role: Central sequencing engine that asserts enable signals to VRMs based on monitored rail readiness and preprogrammed state transitions. Use Value: Prevents latch-up and inrush current overload by enforcing strict <100 ms inter-rail delays and detecting undervoltage faults before downstream logic activates. | Use Scenario: Managing startup sequence of FPGA core (1.0 V), I/O bank (2.5 V), transceiver (1.8 V), and auxiliary (3.3 V) supplies in telecom line cards. IC Role / Device Role / Timing Role: Configurable supervisory hub that monitors each rail with 0.5% accuracy at 25°C and triggers PDO outputs to enable DC-DCs in precise voltage-order priority. Use Value: Eliminates need for discrete timers and comparators-reduces BOM count by 7+ components while enabling field-reprogrammable sequencing logic. |
| In-Circuit Supply Margining Test | Central Office Power Monitoring |
Use Scenario: Performing automated margin testing on production boards by dynamically adjusting supply thresholds and capturing fault response timing. IC Role / Device Role / Timing Role: Programmable fault detector with SMBus-accessible registers that allow real-time modification of UV/OV thresholds and hysteresis during test execution. Use Value: Enables closed-loop margin validation without hardware changes-supports IEEE 1149.1 boundary-scan integration via SDA/SCL visibility. | Use Scenario: Supervising distributed -48 V, +24 V, and +5 V supplies in carrier-grade central office switching equipment with hot-swap capability. IC Role / Device Role / Timing Role: Redundant supervisor powered from highest available rail (e.g., VH = 12 V backplane), providing fail-safe reset assertion and interrupt reporting via SMBus to system controller. Use Value: Maintains operation during single-rail failure and delivers ±1% accuracy across industrial temperature range-ensuring 99.999% uptime compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supply supervision and sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM1066ASTZ | 6-input version (VH, VP1–VP3, VX1–VX2); no VX3/VX4; identical SE architecture and EEPROM size | Limited to six-supply systems; lacks two dual-function inputs for expanded warning or digital control | Select when board space or cost constraints eliminate need for eight-input supervision |
| TPS386000RGPT | 6-channel sequencer with fixed 3.3/2.5/1.8/1.5/1.2/1.0 V thresholds; no programmable SFDs or charge-pump drive | Targeted at standard voltage rails only; no support for custom thresholds, HV FET drive, or SMBus reconfiguration | Choose for simple, low-cost sequencing where rail voltages match factory presets and no field updates are required |
Compared with ADM1066ASTZ, ADM1068ASTZ adds two VX inputs for expanded warning logic or digital control; compared with TPS386000RGPT, it provides full 8-channel programmability, 12 V gate drive, and EEPROM-based field updates-making it suitable for complex, evolving multivoltage platforms.
Availability
ADM1068ASTZ is available at Aetrix Electronics and suitable for server/routers, DSP/FPGA supply sequencing, and central office systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for ADM1068ASTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, industrial automation, and communications infrastructure.
The ADM1068ASTZ belongs to Analog Devices' Super Sequencer® family, designed specifically for intelligent, software-configurable power supervision and sequencing in high-reliability multivoltage systems such as telecom line cards and enterprise servers.
FAQ
What is the maximum input voltage the ADM1068ASTZ can supervise on the VH pin?
The ADM1068ASTZ supports a maximum input voltage of 14.4 V on the VH pin when configured in the high-range detection mode (6.0–14.4 V). This allows direct supervision of 12 V backplane supplies without external attenuation. Absolute maximum rating is 16 V, but operation above 14.4 V violates specification limits and risks incorrect fault detection.
How does the ADM1068ASTZ handle power loss across multiple supply inputs?
The ADM1068ASTZ uses an internal VDD arbitrator that selects the highest valid supply among VH and VP1–VP3 (≥3.0 V) to generate its 4.75 V VDDCAP output. During brownouts, the 10 μF capacitor on VDDCAP sustains operation until the next highest rail takes over-ensuring uninterrupted sequencing and fault monitoring even during transient supply dips.
Can the ADM1068ASTZ drive N-channel MOSFETs directly, and which pins support this?
Yes, the ADM1068ASTZ can directly drive N-channel MOSFET gates using its charge-pumped high-voltage mode on PDO1 through PDO6. These outputs deliver up to 12.5 V at 1 μA load, enabling robust gate turn-on without external boost circuitry-critical for high-side switch control in supply path management.
What is the resolution and accuracy of supply fault detection on the VXx inputs?
The VXx inputs (VX1–VX4) provide 8-bit threshold resolution (step size ≈3.14 mV in 0.573–1.375 V range) and ±1% absolute accuracy across −40°C to +85°C. Their 1 MΩ input impedance allows external resistor dividers to extend supervision to higher voltages (e.g., +24 V, −5 V), maintaining accuracy within datasheet limits when divider tolerances are accounted.
Is the ADM1068ASTZ pin-compatible with earlier revisions like ADM1068ACPZ?
No, the ADM1068ASTZ (32-lead LQFP) is not pin-compatible with the ADM1068ACPZ (32-lead LFCSP). While both share identical functionality and register maps, the LQFP package has different thermal pad layout, lead pitch, and soldering requirements. PCB redesign is required for substitution-package-specific footprint and reflow profiles must be validated separately.
ADM1068ASTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- Super Sequencer®
- Package/Case:
- 32-LQFP
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 8
- Voltage - Threshold:
- 8 Selectable Threshold Combinations
- Output:
- Programmable
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LQFP (7x7)
ADM1068ASTZ FAQ
1.How can I place an order for ADM1068ASTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1068ASTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1068ASTZ reliable?
The price and inventory of ADM1068ASTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1068ASTZ is usually 5 days.
3.What payment methods are accepted for ADM1068ASTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1068ASTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1068ASTZ?
ADM1068ASTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1068ASTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1068ASTZ?
For technical support, including ADM1068ASTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1068ASTZ requirements.
6.How does Aetrix verify that ADM1068ASTZ is sourced from the original manufacturer or authorized distributors?
All ADM1068ASTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1068ASTZ meets industry standards.
7.What is the process for return or replacement of ADM1068ASTZ?
All ADM1068ASTZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM1068ASTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1068ASTZ part is unused and in its original packaging.
Return procedure for ADM1068ASTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM1068ASTZ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

