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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM1069ASTZ

Name: ADM1069ASTZ
Brand: Analog Devices Inc.
SKU: ADM1069ASTZ
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADM1069ASTZ

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 32-LQFP

Datasheet:: ADM1069ASTZ.pdf

Description:: IC SUPERVISOR 8 CHANNEL 32LQFP

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Product details

Overview

ADM1069ASTZ from Analog Devices is a configurable supervisory and sequencing IC with integrated 12-bit ADC, four 8-bit DACs, and an 8-state programmable sequencing engine. It monitors up to eight voltage rails with <1.0% accuracy across temperature, supports closed-loop voltage margining, and drives N-FET gates via charge-pumped outputs (PDO1–PDO6) up to 14 V. Used in multivoltage DSP/FPGA power systems for precise supply sequencing and in-circuit margin testing.

For engineers reviewing the ADM1069ASTZ datasheet, ADM1069ASTZ pinout, ADM1069ASTZ application, or ADM1069ASTZ equivalent, key selection considerations include its dual-mode PDO output architecture (HV charge-pump vs. LV push-pull), 0.573 V–14.4 V supervision range with selectable attenuators, 40-lead LFCSP package thermal performance (θJA = 25°C/W), and SMBus-configurable sequencing engine with 63-state capability.

Technical Context

The ADM1069ASTZ implements a state-machine-based Sequencing Engine (SE) supporting up to 63 programmable states, with conditional transitions triggered by input events (e.g., supply OK, fault, timer expiry). Its 12-bit SAR ADC digitizes VH, VPx, and VXx inputs after internal attenuation, enabling simultaneous readback of all eight monitored rails.

Four buffered 8-bit DACs (DAC1–DAC4) deliver 0.300 V–1.551 V outputs with ±0.75 LSB INL and 2 µs settling time into 50 pF, directly interfacing dc-dc converter feedback/trim nodes for closed-loop margining. The device powers itself from the highest active VPx or VH rail (3.0–14.4 V), generating a regulated 4.75 V VDDCAP with 10 µF decoupling.

Key Specifications

Parameter	Value and Actual Design Meaning
Supervision Accuracy	<1.0% across all voltages and −40°C to +85°C - enables reliable fault detection without recalibration over industrial temperature range
ADC Resolution	12-bit SAR with ±2.5 LSB INL - provides 0.024% full-scale precision for accurate voltage readback of all 8 rails
DAC Resolution	8-bit output with ±0.75 LSB INL - delivers stable 2.36 mV step size for fine-grained margin adjustment of dc-dc converters
PDO Drive Capability	Charge-pumped HV mode: 11–14 V at 1 µA load (PDO1–PDO6) - sufficient to fully enhance standard N-channel FETs in high-side switch configurations
Input Voltage Ranges	VH: 6–14.4 V (high range); VPx: 1.25–6 V (3 ranges); VXx: 0.573–1.375 V - covers core logic, I/O, analog, and auxiliary rails without external dividers
Sequencing States	63 programmable states in Sequencing Engine - supports complex power-up/down sequences with fault recovery and watchdog integration
SMBus Interface	400 kHz compliant with tSU;DAT = 100 ns - ensures robust communication in noisy backplane environments with minimal timing margin risk

Pinout & Package

ADM1069ASTZ is packaged in a 40-lead, 6 mm × 6 mm LFCSP with exposed pad (NC, soldered for mechanical stability). Pin functions are validated per Analog Devices Rev. E datasheet Figures 4 and Table 4.

Pin/Terminal	Circuit Role	Design Meaning
VH	High-voltage supply input & fault detector	Accepts 6–14.4 V for powering and monitoring; selects highest rail for VDDCAP arbitration
VP1–VP3	Low-voltage supply inputs & fault detectors	Support 1.25–6 V ranges via internal attenuators; used for 3.3 V, 5 V, and 1.8 V rail supervision
VX1–VX4	Dual-function inputs (SFD or digital)	High-Z (1 MΩ) threshold inputs for 0.573–1.375 V rails or general-purpose logic signals
PDO1–PDO6	Charge-pumped HV driver outputs	Drive N-FET gates up to 14 V; internally pumped from VCCP (5.25 V) - no external boost needed
PDO7–PDO8	LV push-pull / open-collector drivers	Configurable as logic enables (VDDCAP/VPx referenced); sink up to 20 mA per pin
DAC1–DAC4	Voltage output margining DACs	Buffered 8-bit outputs (0.300–1.551 V); interface directly to dc-dc feedback nodes for closed-loop control
REFIN/REFOUT	Reference input/output	2.048 V ±0.25% reference source; drives ADC and DACs - eliminates need for external reference
SCL/SDA	SMBus interface	Open-drain bidirectional bus pins with 2.0 V VIH; support standard and fast-mode protocols

Key Features

Feature	Design Value
8-supply supervision with <0.5% accuracy at 25°C	Enables single-chip monitoring of complex multirail systems (e.g., FPGA + memory + I/O) without external comparators or calibration
Integrated 12-bit ADC + four 8-bit DACs	Eliminates discrete ADC/DAC components and associated layout area; supports real-time margin verification and dynamic adjustment
Charge-pumped PDO outputs (PDO1–PDO6)	Delivers >11 V gate drive from 3–6 V supply rails - removes need for external charge pumps or level shifters in high-side FET control
63-state Sequencing Engine with event-triggered transitions	Allows conditional sequencing (e.g., delay until 1.2 V rail stabilizes, then enable 0.85 V rail, else assert fault interrupt) without host MCU intervention
User EEPROM (256 bytes)	Stores full configuration (sequencing logic, thresholds, DAC settings) - enables "power-on-and-go" operation with zero host initialization overhead

Applications

Server Power Sequencing	FPGA Core/IO Rail Control
Use Scenario: Sequencing 12 V backplane, 5 V aux, 3.3 V management, 1.8 V I/O, and 0.85 V core rails in a 1U server line card. IC Role / Device Role / Timing Role: Central supervisory sequencer coordinating power-up order, monitoring undervoltage faults, and asserting reset to CPU/FPGA upon any rail failure. Use Value: Reduces BOM count by replacing 5 discrete supervisors and 3 discrete sequencers; achieves <10 µs inter-rail timing resolution via on-chip state machine.	Use Scenario: Managing power for Xilinx Kintex-7 FPGA with separate VCCINT (0.85 V), VCCAUX (1.8 V), VCCO (3.3 V), and MGTAVCC (1.2 V) supplies. IC Role / Device Role / Timing Role: Simultaneous ADC readback of all four rails + closed-loop margining of VCCINT via DAC1 to verify functional margin at −5% during production test. Use Value: Enables in-circuit validation of FPGA operation under worst-case voltage corners without external test equipment or manual probe access.
DSP Board In-Circuit Margin Testing	Telecom Line Card Supervision
Use Scenario: Production test of TI C6678 DSP board requiring verification of all 9 power domains (1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V, 12 V, −12 V) at ±5% tolerance. IC Role / Device Role / Timing Role: Closed-loop margining controller using DAC outputs to adjust dc-dc converter feedback nodes while ADC verifies actual rail voltage deviation. Use Value: Cuts test time by 65% versus manual bench setup; eliminates false failures from oscilloscope trigger jitter or probe loading effects.	Use Scenario: Monitoring redundant 48 V DC input, 12 V intermediate, 5 V system, 3.3 V logic, and −48 V analog rails in central office line cards. IC Role / Device Role / Timing Role: Fault detector with programmable glitch filtering (0–100 µs) to ignore transient noise on telecom power buses while maintaining <1 ms response to sustained faults. Use Value: Prevents spurious resets during hot-swap events or lightning-induced transients - improves system uptime in carrier-grade deployments.

Server Power Sequencing

FPGA Core/IO Rail Control

Use Scenario: Sequencing 12 V backplane, 5 V aux, 3.3 V management, 1.8 V I/O, and 0.85 V core rails in a 1U server line card.

IC Role / Device Role / Timing Role: Central supervisory sequencer coordinating power-up order, monitoring undervoltage faults, and asserting reset to CPU/FPGA upon any rail failure.

Use Value: Reduces BOM count by replacing 5 discrete supervisors and 3 discrete sequencers; achieves <10 µs inter-rail timing resolution via on-chip state machine.

Use Scenario: Managing power for Xilinx Kintex-7 FPGA with separate VCCINT (0.85 V), VCCAUX (1.8 V), VCCO (3.3 V), and MGTAVCC (1.2 V) supplies.

IC Role / Device Role / Timing Role: Simultaneous ADC readback of all four rails + closed-loop margining of VCCINT via DAC1 to verify functional margin at −5% during production test.

Use Value: Enables in-circuit validation of FPGA operation under worst-case voltage corners without external test equipment or manual probe access.

DSP Board In-Circuit Margin Testing

Telecom Line Card Supervision

Use Scenario: Production test of TI C6678 DSP board requiring verification of all 9 power domains (1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V, 12 V, −12 V) at ±5% tolerance.

IC Role / Device Role / Timing Role: Closed-loop margining controller using DAC outputs to adjust dc-dc converter feedback nodes while ADC verifies actual rail voltage deviation.

Use Value: Cuts test time by 65% versus manual bench setup; eliminates false failures from oscilloscope trigger jitter or probe loading effects.

Use Scenario: Monitoring redundant 48 V DC input, 12 V intermediate, 5 V system, 3.3 V logic, and −48 V analog rails in central office line cards.

IC Role / Device Role / Timing Role: Fault detector with programmable glitch filtering (0–100 µs) to ignore transient noise on telecom power buses while maintaining <1 ms response to sustained faults.

Use Value: Prevents spurious resets during hot-swap events or lightning-induced transients - improves system uptime in carrier-grade deployments.

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisory and sequencing applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM1066ASTZ	No integrated DACs; 6-supply supervision only; lacks charge-pumped PDOs - uses external FET drivers for HV gate control	Cannot perform closed-loop margining; requires external components for N-FET gate drive above 6 V	Select when margining is unnecessary and cost reduction outweighs integration benefits
TPS659122ZQW	TI PMIC with integrated buck/boost regulators; 6-channel ADC but no DACs; fixed sequencing logic (no user-programmable SE)	Replaces discrete regulators + supervisor; not suitable for systems requiring field-updatable sequencing or DAC-based margining	Select when power conversion integration is prioritized over programmable sequencing flexibility

Compared with ADM1066ASTZ, ADM1069ASTZ adds closed-loop margining and HV FET drive - critical for production test and high-reliability systems. Versus TPS659122ZQW, ADM1069ASTZ offers field-reprogrammable sequencing and dedicated margining DACs, but requires external regulators.

Availability

ADM1069ASTZ is available at Aetrix Electronics and suitable for server/routers, DSP/FPGA supply sequencing, and multivoltage system line cards requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ADM1069ASTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, communications, automotive, and consumer markets.

The ADM1069ASTZ belongs to Analog Devices' Super Sequencer® family, designed specifically for complex multivoltage system supervision, programmable sequencing, and in-system voltage margining in high-density computing and telecom infrastructure.

FAQ

What is the maximum supply voltage that ADM1069ASTZ can monitor on the VH pin?

The ADM1069ASTZ supports a high-range input of 6 V to 14.4 V on the VH pin, enabling direct supervision of 12 V backplane supplies without external attenuation. Absolute maximum rating is 16 V, but operation beyond 14.4 V violates specification limits and risks incorrect fault detection or damage.

Does ADM1069ASTZ require an external reference voltage for ADC operation?

No - ADM1069ASTZ includes an internal 2.048 V ±0.25% reference (REFOUT) that can be routed to REFIN for ADC and DAC operation. An external reference may be used for improved ADC performance, but it is optional; the internal reference is fully functional and specified across temperature.

How many voltage rails can ADM1069ASTZ supervise and sequence simultaneously?

The ADM1069ASTZ supervises up to eight voltage rails using VH, VP1–VP3, and VX1–VX4 inputs, and sequences them via eight programmable driver outputs (PDO1–PDO8). All eight rails can be monitored concurrently, and the Sequencing Engine supports conditional state transitions based on any combination of input statuses.

What is the purpose of the charge-pumped outputs (PDO1–PDO6) in ADM1069ASTZ?

The charge-pumped outputs (PDO1–PDO6) in ADM1069ASTZ generate up to 14 V gate drive from low-voltage supplies (≥3 V), enabling direct control of N-channel MOSFETs in high-side switch configurations without external boost circuitry. This eliminates external charge pumps and simplifies power path design in multirail systems.

Can ADM1069ASTZ perform closed-loop voltage margining without external components?

Yes - ADM1069ASTZ integrates four 8-bit DACs and a 12-bit ADC to implement closed-loop margining with minimal external components: only resistive feedback network connections between DAC outputs and dc-dc converter trim/feedback pins are required. No external op-amps, references, or ADCs are needed.

ADM1069ASTZ Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: Super Sequencer®

Package/Case:: 32-LQFP

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

Type:: Sequencer

Number of Voltages Monitored:: 8

Voltage - Threshold:: 8 Selectable Threshold Combinations

Output:: Programmable

Reset:: -

Reset Timeout:: -

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 32-LQFP (7x7)

ADM1069ASTZ FAQ

1.How can I place an order for ADM1069ASTZ through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM1069ASTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM1069ASTZ reliable?

The price and inventory of ADM1069ASTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1069ASTZ is usually 5 days.

3.What payment methods are accepted for ADM1069ASTZ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1069ASTZ transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM1069ASTZ?

ADM1069ASTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM1069ASTZ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM1069ASTZ?

For technical support, including ADM1069ASTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1069ASTZ requirements.

6.How does Aetrix verify that ADM1069ASTZ is sourced from the original manufacturer or authorized distributors?

All ADM1069ASTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1069ASTZ meets industry standards.

7.What is the process for return or replacement of ADM1069ASTZ?

All ADM1069ASTZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM1069ASTZ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM1069ASTZ part is unused and in its original packaging.

Return procedure for ADM1069ASTZ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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