Analog Devices Inc. ADM1069ASTZ-REEL7
- Part No.:
- ADM1069ASTZ-REEL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 32-LQFP
- Datasheet:
-
ADM1069ASTZ-REEL7.pdf
- Description:
- IC SUPERVISOR 8 CHANNEL 32LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,820
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM1069ASTZ-REEL7 from Analog Devices is a configurable supervisory and sequencing IC with integrated 12-bit ADC, four 8-bit DACs, and an 8-state programmable sequencing engine. It monitors up to eight voltage rails with <1.0% accuracy across temperature, provides closed-loop voltage margining for four supplies, and drives N-FET gates via charge-pumped outputs (PDO1–PDO6). It is used in multivoltage server line cards requiring precise power-up/down sequencing and in-circuit supply validation.
For engineers reviewing the ADM1069ASTZ-REEL7 datasheet, ADM1069ASTZ-REEL7 pinout, ADM1069ASTZ-REEL7 application, or ADM1069ASTZ-REEL7 equivalent, key selection criteria include its 32-lead LQFP package, SMBus interface, ±1% supply fault detection accuracy, 12-bit ADC readback capability, and support for both high-voltage FET gate drive and low-voltage logic enable functions.
Technical Context
The ADM1069ASTZ-REEL7 implements a state-machine-based Sequencing Engine (SE) supporting up to 63 programmable states, enabling conditional output transitions based on input events such as undervoltage faults or digital signals. Its dual-function VXx inputs serve either as high-impedance analog comparators (0.573 V–1.375 V thresholds) or general-purpose logic inputs.
Power arbitration selects the highest valid supply among VH (3.0–14.4 V) or VPx (3.0–6.0 V) pins to generate a regulated 4.75 V VDDCAP rail; no external regulator is needed. The device integrates a 2.048 V reference (±0.25%) for ADC/DAC operation, with REFIN configurable for external reference use to improve ADC gain error to ±0.05%.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Inputs | VH: 3.0–14.4 V; VP1–VP3: 3.0–6.0 V - enables redundant powering from backplane or core rails |
| ADC Resolution | 12-bit SAR - supports accurate readback of all 8 supervised voltages with 0.44 ms per conversion |
| DAC Outputs | Four 8-bit buffered DACs (0.300–1.551 V range) - implement closed-loop margining by trimming dc-dc converter feedback nodes |
| Fault Detection Accuracy | ±1.0% over −40°C to +85°C - ensures reliable supervision across industrial temperature range |
| Programmable Outputs | 8 PDOs: PDO1–PDO6 support charge-pumped HV drive (up to 14 V); PDO7–PDO8 are LV push-pull - enables direct control of FET gates and logic enables |
| Interface | SMBus 2-wire (400 kHz max) - allows configuration, real-time margining adjustment, and status reporting without dedicated MCU GPIO |
| Package | 32-lead, 7 mm × 7 mm LQFP - RoHS-compliant, surface-mount, compatible with standard reflow profiles |
Pinout & Package
The ADM1069ASTZ-REEL7 is housed in a 32-lead, 7 mm × 7 mm LQFP package with exposed thermal pad (not electrically connected). Pin 1 is marked with a dot; all ground pins (GND, AGND, REFGND, PDOGND) must be tied together in layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VH | High-voltage supply input & fault detector | Accepts 6–14.4 V for backplane-powered operation; powers VDDCAP when highest active supply |
| VP1–VP3 | Low-voltage supply inputs & fault detectors | Monitor 1.25–6.0 V rails; each supports selectable attenuation for precise threshold setting |
| VX1–VX4 | Dual-function inputs | Configurable as analog comparators (0.573–1.375 V thresholds) or digital logic inputs |
| PDO1–PDO6 | Charge-pumped high-voltage drivers | Drive N-FET gates up to 14 V; internal charge pump eliminates need for external HV supply |
| PDO7–PDO8 | LV push-pull outputs | Provide logic-level enables (VDDCAP or VPx referenced) for downstream ICs or regulators |
| REFIN/REFOUT | Reference interface | REFOUT delivers 2.048 V ±0.25%; REFIN accepts this or external reference to calibrate ADC/DAC |
| SDA/SCL | SMBus interface | Open-drain, 400 kHz compliant; supports configuration download, real-time margining, and fault reporting |
Key Features
| Feature | Design Value |
|---|---|
| 8-supply supervision with <1.0% accuracy | Ensures reliable fault detection across full industrial temperature range without calibration drift compensation |
| Integrated 12-bit ADC + 4×8-bit DACs | Enables closed-loop margining: DAC adjusts dc-dc trim node while ADC verifies actual rail voltage in real time |
| Sequencing Engine with 63-state capacity | Supports complex, event-driven power sequencing including fault recovery, watchdog integration, and conditional jumps |
| Redundant power arbitration (VH/VPx) | Guarantees operation even if primary supply fails; VDDCAP remains stable during brownouts using 10 µF reservoir capacitor |
| Charge-pumped HV outputs (PDO1–PDO6) | Drives N-FET gates directly from 3.3 V or 5 V supplies - eliminates need for external level shifters or HV bias networks |
Applications
| Server Power Sequencing | DSP/FPGA Multirail Control |
|---|---|
Use Scenario: Coordinating power-up order of CPU core, I/O, memory, and auxiliary rails in 1U rack servers. IC Role / Device Role / Timing Role: Central sequencing controller that asserts enables only after all upstream rails meet voltage and timing windows. Use Value: Prevents latch-up and inrush current damage by enforcing strict monotonic ramping and inter-rail delay requirements per Intel VRD spec. | Use Scenario: Managing independent 1.2 V, 1.8 V, 2.5 V, and 3.3 V supplies for Xilinx Kintex FPGA and companion ADC/DACs. IC Role / Device Role / Timing Role: Supervises each rail's voltage tolerance and sequences enable signals to match FPGA configuration timing (e.g., VCCINT before VCCAUX). Use Value: Eliminates need for discrete timers and comparators; reduces BOM count by integrating ADC readback and margining into single IC. |
| In-Circuit Supply Margining Test | Central Office Line Card Monitoring |
Use Scenario: Automated functional test during board manufacturing, applying −5%/+5% voltage offsets to verify system robustness. IC Role / Device Role / Timing Role: Closed-loop margining controller that writes DAC codes, reads back actual rail voltages via ADC, and validates against pass/fail thresholds. Use Value: Reduces test time by 40% vs. external programmable supplies; enables per-rail margining without changing hardware setup. | Use Scenario: Continuous monitoring of redundant 3.3 V, 5 V, and 12 V supplies in telecom line cards operating in NEBS-compliant cabinets. IC Role / Device Role / Timing Role: Fault detector and sequencer that triggers failover to backup supply and logs event timestamps to EEPROM. Use Value: Meets GR-63-CORE reliability requirements with <1.0% detection accuracy and nonvolatile fault history storage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supervisory and sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS659122ZWSR | Integrated PMIC with buck/boost converters; lacks charge-pumped HV outputs and closed-loop DAC+ADC margining | Better suited for space-constrained portable designs needing regulation; not suitable for high-voltage FET gate drive | Select when board-level power conversion is required alongside sequencing - not a functional replacement for ADM1069ASTZ-REEL7's margining and HV drive capabilities |
| MAX16050ATL+ | 8-input supervisor with sequencer and 10-bit ADC; no DACs, no charge pump, no SMBus margining control | Provides basic sequencing and fault logging but cannot perform dynamic voltage adjustment or closed-loop verification | Choose for cost-sensitive applications where margining is performed externally - requires additional DAC/ADC components to match ADM1069ASTZ-REEL7 functionality |
Compared with TPS659122ZWSR and MAX16050ATL+, the ADM1069ASTZ-REEL7 uniquely combines high-voltage FET gate drive, closed-loop margining, and 12-bit voltage readback in a single SMBus-configurable IC - eliminating external components required by alternatives to achieve equivalent system-level functionality.
Availability
ADM1069ASTZ-REEL7 is available at Aetrix Electronics and suitable for server motherboard design, telecom line card development, FPGA power management, and automated test equipment requiring stable component supply and long-term lifecycle support.
Supply support for ADM1069ASTZ-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADM1069 product line delivers integrated power supervision and sequencing solutions for complex multivoltage systems in datacenter, telecom, and industrial infrastructure - emphasizing configurability, accuracy, and system-level fault resilience.
FAQ
What is the maximum supply voltage the ADM1069ASTZ-REEL7 can monitor on its VH pin?
The ADM1069ASTZ-REEL7 supports a maximum input voltage of 14.4 V on the VH pin, with three selectable attenuation ranges (high: 6–14.4 V, mid: 2.5–6 V). This allows direct supervision of 12 V backplane supplies without external resistive dividers. Absolute maximum rating is 16 V, but operation above 14.4 V violates specification limits and risks measurement inaccuracy. The VH pin also serves as a redundant power source for the device itself.
Does the ADM1069ASTZ-REEL7 support closed-loop voltage margining, and how is it implemented?
Yes, the ADM1069ASTZ-REEL7 implements closed-loop voltage margining using its four 8-bit DACs and integrated 12-bit ADC. Each DAC adjusts the feedback node or reference of a dc-dc converter, while the ADC simultaneously reads back the resulting rail voltage. This loop enables real-time verification that the margining offset (e.g., −5%) is accurately applied. The ADM1069ASTZ-REEL7 executes this autonomously via SMBus commands without host processor intervention.
What are the key differences between PDO1–PDO6 and PDO7–PDO8 on the ADM1069ASTZ-REEL7?
PDO1–PDO6 support charge-pumped high-voltage drive (up to 14 V), enabling direct control of N-FET gates in high-side switch configurations. PDO7–PDO8 operate as low-voltage push-pull outputs referenced to VDDCAP or VPx, suitable for logic-level enables. Only PDO1–PDO6 integrate the internal charge pump; PDO7–PDO8 lack this circuitry and cannot drive >6 V loads. All eight outputs are software-configurable via the Sequencing Engine and EEPROM.
Can the ADM1069ASTZ-REEL7 be powered solely from the VXx pins?
No, the ADM1069ASTZ-REEL7 cannot be powered from the VXx pins. Power arbitration exclusively selects among VH and VP1–VP3 pins - the VXx inputs are high-impedance analog/digital monitoring pins with no power delivery capability. Attempting to power the device from VXx will result in failure to initialize. The minimum valid supply is 3.0 V on either VH or any VPx pin, generating a regulated 4.75 V VDDCAP rail.
How does the ADM1069ASTZ-REEL7 handle brownout conditions on its supply inputs?
During brownout, the ADM1069ASTZ-REEL7's VDD arbitrator disables the failing supply path and switches to the next highest valid input. The 10 µF capacitor on VDDCAP acts as a reservoir, sustaining operation for milliseconds while the transition occurs. Internal synchronous rectifier switches minimize dropout (~0.2 V), allowing continued function down to 3.0 V input. This behavior is inherent to the architecture and requires no firmware or configuration changes.
ADM1069ASTZ-REEL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- Super Sequencer®
- Package/Case:
- 32-LQFP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 8
- Voltage - Threshold:
- 8 Selectable Threshold Combinations
- Output:
- Programmable
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LQFP (7x7)
ADM1069ASTZ-REEL7 FAQ
1.How can I place an order for ADM1069ASTZ-REEL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1069ASTZ-REEL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1069ASTZ-REEL7 reliable?
The price and inventory of ADM1069ASTZ-REEL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1069ASTZ-REEL7 is usually 5 days.
3.What payment methods are accepted for ADM1069ASTZ-REEL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1069ASTZ-REEL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1069ASTZ-REEL7?
ADM1069ASTZ-REEL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1069ASTZ-REEL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1069ASTZ-REEL7?
For technical support, including ADM1069ASTZ-REEL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1069ASTZ-REEL7 requirements.
6.How does Aetrix verify that ADM1069ASTZ-REEL7 is sourced from the original manufacturer or authorized distributors?
All ADM1069ASTZ-REEL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1069ASTZ-REEL7 meets industry standards.
7.What is the process for return or replacement of ADM1069ASTZ-REEL7?
All ADM1069ASTZ-REEL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADM1069ASTZ-REEL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1069ASTZ-REEL7 part is unused and in its original packaging.
Return procedure for ADM1069ASTZ-REEL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM1069ASTZ-REEL7 Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

