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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM1186-1ARQZ-REEL

Name: ADM1186-1ARQZ-REEL
Brand: Analog Devices Inc.
SKU: ADM1186-1ARQZ-REEL
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADM1186-1ARQZ-REEL

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 20-SSOP (0.154", 3.90mm Width)

Datasheet:: ADM1186-1ARQZ-REEL.pdf

Description:: IC SUPERVISOR 4 CHANNEL 20QSOP

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Product details

Overview

ADM1186-1ARQZ-REEL from Analog Devices is a quad-channel voltage up/down sequencer and monitor with programmable timing, designed for precise power supply sequencing in multi-rail systems. It features four 0.8% accurate comparators, capacitor-programmable sequence delays (±5% accuracy at 25°C), open-drain enable outputs (OUT1–OUT4), and bidirectional FAULT/SEQ_DONE signaling. It operates from 2.7 V to 5.5 V and supports cascaded sequencing in telecom and server power management.

For engineers reviewing the ADM1186-1ARQZ-REEL datasheet, ADM1186-1ARQZ-REEL pinout, ADM1186-1ARQZ-REEL application, or ADM1186-1ARQZ-REEL equivalent, this device delivers deterministic up/down sequencing control, real-time fault propagation across multiple units, and resistor-divider-configurable undervoltage thresholds for 1.2 V–5 V rails - critical for high-reliability embedded and datacom power architectures.

Technical Context

The ADM1186-1ARQZ-REEL implements a finite-state machine that executes controlled power-up (enable OUT1→OUT4 in order) and power-down (disable OUT4→OUT1 in reverse) sequences, each governed by user-defined capacitor-set delays on DLY_EN_OUT1–DLY_EN_OUT4 and BLANK_DLY pins. It uses a shared 0.6 V internal reference with ±0.8% comparator accuracy over −40°C to +85°C.

Its bidirectional FAULT pin enables inter-device fault coordination: an internal UV fault pulls FAULT low, forcing connected ADM1186-1 units into fault-handling mode; externally pulling FAULT low also triggers local fault response. SEQ_DONE provides unambiguous sequence completion status, supporting hierarchical sequencing topologies.

Key Specifications

Parameter	Value and Actual Design Meaning
VCC Range	2.7 V to 5.5 V - powers internal logic and comparators; ensures operation across standard logic supply rails.
VINx Accuracy	±0.8% worst-case - enables precise undervoltage detection (e.g., 2.375 V rail monitored via 7.4 kΩ/2.5 kΩ divider yields 0.6 V threshold).
Time Delay Accuracy	±5% at 25°C - guarantees predictable sequencing intervals (e.g., 10 ms to 2 s) using external capacitors from 10 nF to 2.2 µF.
Response Time (VINx → FAULT)	6.1 µs to 9.2 µs - ensures rapid fault capture during supply collapse, minimizing downstream damage risk.
Output Type	Open-drain, active-high OUT1–OUT4 & PWRGD; open-drain SEQ_DONE; bidirectional open-drain FAULT - allows wired-OR logic, level translation, and fault chaining without external components.
UVLO Threshold	2.46 V - prevents erratic behavior during brown-out; outputs remain low until VCC exceeds this level.
Supply Current	146 µA typical - ultra-low quiescent draw enables use in always-on sequencing controllers without significant power penalty.

Pinout & Package

The ADM1186-1ARQZ-REEL is housed in a 20-lead QSOP package (3.9 mm × 8.7 mm, 0.65 mm pitch), optimized for space-constrained PCB layouts while maintaining thermal performance (θ_JA = 125.8°C/W).

Pin	Circuit Role	Design Meaning
VIN1–VIN4	Noninverting comparator inputs	Monitor four independent voltage rails via external resistor dividers; all referenced to 0.6 V internal reference.
UP / DOWN	Sequencing control inputs	Rising edge on UP initiates power-up; falling edge on DOWN initiates power-down - enables discrete state-triggered sequencing.
OUT1–OUT4	Open-drain enable outputs	Drive EN pins of DC/DC regulators; sequencing order and timing defined by DLY_EN_OUTx capacitor values.
PWRGD	Open-drain power-good output	Logical AND of all VINx > UV threshold - signals system readiness to release reset or boot CPU.
SEQ_DONE	Open-drain sequence completion flag	Asserted high only after full power-up sequence completes; used to trigger next stage or cascade to upstream sequencer.
FAULT	Bidirectional open-drain fault bus	Pulled low internally on any UV/fault condition; pulling low externally forces local fault handling - enables system-wide fault containment.
DLY_EN_OUT1–DLY_EN_OUT4	Capacitor-based timing inputs	Set delay between enable transitions (e.g., OUT1 assertion → OUT2 assertion); each controls one inter-stage interval.
BLANK_DLY	Blanking time timing input	Defines minimum time allowed for monitored rail to rise above UV threshold before fault declaration - prevents false trips on slow-rising supplies.

Key Features

Feature	Design Value
Quad up/down sequencing	Enables deterministic turn-on and turn-off of four independent power rails with configurable delays - eliminates race conditions in complex SoC/FPGA power domains.
0.8% comparator accuracy	Ensures reliable undervoltage detection across temperature (−40°C to +85°C) and supply variation - critical for meeting tight margin requirements in telecom equipment.
Bidirectional FAULT pin	Allows single-point fault injection and distributed fault propagation across cascaded ADM1186-1 units - simplifies system-level fault isolation without additional logic.
Capacitor-programmable timing	Eliminates need for external clocks or microcontrollers; timing resolution from microseconds to seconds set by passive components - reduces BOM count and design complexity.
Open-drain outputs with 1 V VCC guarantee	Ensures valid logic levels even during brown-out (VCC ≥ 1 V), preventing spurious regulator enable/disable - enhances robustness in unstable input environments.

Applications

Telecom Line Card Power Management	Server CPU Core Voltage Sequencing
Use Scenario: Sequencing 12 V backplane, 3.3 V AUX, 1.8 V I/O, and 1.2 V core rails on a carrier-grade line card with strict ramp-time and dependency rules. IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL acts as master sequencer, enforcing turn-on order (12 V → 3.3 V → 1.8 V → 1.2 V) and verifying each rail's stability before enabling the next. Use Value: Prevents latch-up and inrush current overload by ensuring downstream rails are only enabled after upstream supplies stabilize - meets GR-63-CORE reliability requirements.	Use Scenario: Coordinating power-up of CPU core (VDD), I/O (VDDIO), memory interface (VDDQ), and PLL (AVCC) in dual-socket x86 servers. IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL monitors each rail via precision comparators and asserts PWRGD only when all four are within specification, gating processor reset release. Use Value: Guarantees safe boot sequence compliance with Intel VRD specifications, avoiding premature clock enable or instruction fetch on under-volted domains.
Industrial PLC Backplane Control	High-Density FPGA Mezzanine Board
Use Scenario: Managing isolated 24 V, 5 V, 3.3 V, and 1.8 V rails powering analog I/O, digital logic, and communication interfaces in harsh industrial environments. IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL performs both up-sequencing at startup and down-sequencing at shutdown, with blanking time configured to accommodate slow-starting isolated DC/DC modules. Use Value: Eliminates need for custom CPLD-based sequencing logic, reducing design cycle time and field failure risk from timing skew or noise-induced glitches.	Use Scenario: Enabling tightly coupled 0.85 V, 1.2 V, 1.8 V, and 3.3 V supplies for Xilinx Kintex Ultrascale+ FPGA and its transceivers, memory, and configuration circuitry. IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL uses cascaded FAULT/SEQ_DONE signaling to coordinate sequencing across two mezzanine boards sharing a common backplane. Use Value: Enables modular board design where sequencing dependencies are enforced at hardware level - no firmware coordination required between stacked modules.

Telecom Line Card Power Management

Server CPU Core Voltage Sequencing

Use Scenario: Sequencing 12 V backplane, 3.3 V AUX, 1.8 V I/O, and 1.2 V core rails on a carrier-grade line card with strict ramp-time and dependency rules.

IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL acts as master sequencer, enforcing turn-on order (12 V → 3.3 V → 1.8 V → 1.2 V) and verifying each rail's stability before enabling the next.

Use Value: Prevents latch-up and inrush current overload by ensuring downstream rails are only enabled after upstream supplies stabilize - meets GR-63-CORE reliability requirements.

Use Scenario: Coordinating power-up of CPU core (VDD), I/O (VDDIO), memory interface (VDDQ), and PLL (AVCC) in dual-socket x86 servers.

IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL monitors each rail via precision comparators and asserts PWRGD only when all four are within specification, gating processor reset release.

Use Value: Guarantees safe boot sequence compliance with Intel VRD specifications, avoiding premature clock enable or instruction fetch on under-volted domains.

Industrial PLC Backplane Control

High-Density FPGA Mezzanine Board

Use Scenario: Managing isolated 24 V, 5 V, 3.3 V, and 1.8 V rails powering analog I/O, digital logic, and communication interfaces in harsh industrial environments.

IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL performs both up-sequencing at startup and down-sequencing at shutdown, with blanking time configured to accommodate slow-starting isolated DC/DC modules.

Use Value: Eliminates need for custom CPLD-based sequencing logic, reducing design cycle time and field failure risk from timing skew or noise-induced glitches.

Use Scenario: Enabling tightly coupled 0.85 V, 1.2 V, 1.8 V, and 3.3 V supplies for Xilinx Kintex Ultrascale+ FPGA and its transceivers, memory, and configuration circuitry.

IC Role / Device Role / Timing Role: ADM1186-1ARQZ-REEL uses cascaded FAULT/SEQ_DONE signaling to coordinate sequencing across two mezzanine boards sharing a common backplane.

Use Value: Enables modular board design where sequencing dependencies are enforced at hardware level - no firmware coordination required between stacked modules.

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage sequencing and monitoring applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM1186-2ARQZ-REEL	16-lead QSOP; replaces separate UP/DOWN pins with single UP/DOWN pin; lacks SEQ_DONE and FAULT bidirectionality.	Suitable for simpler up-only or up/down sequencing without inter-device fault propagation or cascade signaling.	Select when system requires only basic sequencing and does not need fault chaining or hierarchical sequencing coordination.
TPS659122ZQW	Integrated PMIC with buck/boost regulators + sequencer; 2.7–5.5 V input; fixed 0.5% UV threshold; no external timing capacitor support.	Replaces discrete regulator + sequencer combo; targets space-constrained portable designs rather than high-reliability infrastructure.	Choose when power conversion and sequencing must be co-integrated, and programmable timing is not required.

Compared with ADM1186-2ARQZ-REEL, the ADM1186-1ARQZ-REEL provides explicit sequence completion signaling and fault coordination essential for multi-board systems; compared with TPS659122ZQW, it offers superior timing flexibility and higher accuracy monitoring but requires external regulators - making it optimal for high-performance, serviceable infrastructure platforms.

Availability

ADM1186-1ARQZ-REEL is available at Aetrix Electronics and suitable for telecom infrastructure, server power management, and industrial PLC applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for ADM1186-1ARQZ-REEL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and aerospace markets.

The ADM1186 family was engineered specifically for deterministic, fault-resilient power supply sequencing in multi-rail systems - addressing the growing demand for hardware-enforced power integrity in high-speed computing and mission-critical infrastructure.

FAQ

What is the primary function of the ADM1186-1ARQZ-REEL in a power system?

The ADM1186-1ARQZ-REEL serves as a dedicated quad-channel voltage sequencer and monitor that enforces precise up/down sequencing of four independent power rails while continuously verifying their undervoltage status. It uses internal comparators, capacitor-programmed delays, and a state machine to ensure safe, repeatable power delivery - eliminating reliance on software or general-purpose logic for critical power sequencing tasks in the ADM1186-1ARQZ-REEL.

How does the ADM1186-1ARQZ-REEL handle fault conditions during sequencing?

Upon detecting any undervoltage condition on VIN1–VIN4 or an invalid control input (e.g., rising edge on UP during POWER-UP DONE), the ADM1186-1ARQZ-REEL immediately enters the SET FAULT state, turning off all OUT1–OUT4 outputs and asserting SEQ_DONE low. Its bidirectional FAULT pin is pulled low, enabling automatic fault propagation to other cascaded ADM1186-1ARQZ-REEL devices - ensuring coordinated system-level fault containment without external intervention.

Can the ADM1186-1ARQZ-REEL be used for both power-up and power-down sequencing?

Yes, the ADM1186-1ARQZ-REEL supports bidirectional sequencing: a rising edge on the UP pin initiates power-up (OUT1→OUT4), while a falling edge on the DOWN pin triggers power-down (OUT4→OUT1). Both sequences use identical capacitor-programmed delays on DLY_EN_OUT1–DLY_EN_OUT4, ensuring symmetrical timing control - a capability not present in the ADM1186-2 variant and central to the ADM1186-1ARQZ-REEL's design.

What is the role of the BLANK_DLY pin in the ADM1186-1ARQZ-REEL?

The BLANK_DLY pin sets the blanking time - the minimum duration allowed for a monitored supply (e.g., VIN1) to rise above its undervoltage threshold after the corresponding enable output (e.g., OUT1) is asserted. This capacitor-programmed delay prevents false fault detection on slow-rising rails like isolated DC/DC converters. The ADM1186-1ARQZ-REEL applies this same blanking window to all four VIN inputs, ensuring consistent timing behavior across the entire sequencing chain.

Is the ADM1186-1ARQZ-REEL compatible with standard 3.3 V and 5 V logic interfaces?

Yes, the ADM1186-1ARQZ-REEL operates from 2.7 V to 5.5 V on VCC and features open-drain outputs (OUT1–OUT4, PWRGD, SEQ_DONE, FAULT) that are fully compatible with 3.3 V and 5 V logic families. Its UP/DOWN input thresholds (1.372 V to 1.428 V) and guaranteed operation down to VCC = 1 V ensure robust interfacing with microcontrollers, FPGAs, and ASICs across common supply domains - a key interoperability feature of the ADM1186-1ARQZ-REEL.

ADM1186-1ARQZ-REEL Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 20-SSOP (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Sequencer

Number of Voltages Monitored:: 4

Voltage - Threshold:: Adjustable/Selectable

Output:: Open Drain or Open Collector

Reset:: Active High

Reset Timeout:: -

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 20-QSOP

ADM1186-1ARQZ-REEL FAQ

1.How can I place an order for ADM1186-1ARQZ-REEL through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM1186-1ARQZ-REEL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM1186-1ARQZ-REEL reliable?

The price and inventory of ADM1186-1ARQZ-REEL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1186-1ARQZ-REEL is usually 5 days.

3.What payment methods are accepted for ADM1186-1ARQZ-REEL?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1186-1ARQZ-REEL transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM1186-1ARQZ-REEL?

ADM1186-1ARQZ-REEL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM1186-1ARQZ-REEL order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM1186-1ARQZ-REEL?

For technical support, including ADM1186-1ARQZ-REEL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1186-1ARQZ-REEL requirements.

6.How does Aetrix verify that ADM1186-1ARQZ-REEL is sourced from the original manufacturer or authorized distributors?

All ADM1186-1ARQZ-REEL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1186-1ARQZ-REEL meets industry standards.

7.What is the process for return or replacement of ADM1186-1ARQZ-REEL?

All ADM1186-1ARQZ-REEL units undergo pre-shipment inspection (PSI). If there is an issue with ADM1186-1ARQZ-REEL, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM1186-1ARQZ-REEL part is unused and in its original packaging.

Return procedure for ADM1186-1ARQZ-REEL:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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