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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM1186-2ARQZ

Name: ADM1186-2ARQZ
Brand: Analog Devices Inc.
SKU: ADM1186-2ARQZ
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADM1186-2ARQZ

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 16-SSOP (0.154", 3.90mm Width)

Datasheet:: ADM1186-2ARQZ.pdf

Description:: IC SUPERVISOR 4 CHANNEL 16QSOP

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Product details

Overview

ADM1186-2ARQZ from Analog Devices is a quad-channel voltage up/down sequencer and monitor with programmable timing, designed for precise power supply sequencing in multi-rail systems. It features four 0.8% accurate comparators, capacitor-programmable sequence delays (±5% accuracy at 25°C), open-drain enable outputs (OUT1–OUT4), and an open-drain PWRGD output. It operates from 2.7 V to 5.5 V on VCC and supports bidirectional sequencing control via a single UP/DOWN pin - used in server motherboard power management.

For engineers reviewing the ADM1186-2ARQZ datasheet, ADM1186-2ARQZ pinout, ADM1186-2ARQZ application, or ADM1186-2ARQZ equivalent, key selection considerations include its 16-lead QSOP package, absence of SEQ_DONE and FAULT pins (vs. ADM1186-1), capacitor-based delay tuning, UV threshold accuracy, and compatibility with cascaded sequencing architectures requiring minimal external components.

Technical Context

The ADM1186-2ARQZ implements a deterministic finite-state machine that executes up/down sequencing based on edge-triggered transitions on its single UP/DOWN pin. Unlike the ADM1186-1, it omits SEQ_DONE and FAULT pins, simplifying inter-device coordination but removing fault propagation capability across cascaded units.

It uses a shared 0.6 V internal reference for all four VINx comparators, with resistor dividers setting per-rail undervoltage thresholds. Timing is controlled by external capacitors on DLY_EN_OUT1–DLY_EN_OUT4 and BLANK_DLY pins, enabling independent delay programming for each enable output and blanking window - critical for managing slow-rising POL supplies.

Key Specifications

Parameter	Value and Actual Design Meaning
VCC Range	2.7 V to 5.5 V - powers internal logic and comparators; ensures operation across standard logic supply rails.
VINx Threshold Accuracy	±0.8% at 0.6 V - enables precise UV detection across temperature (−40°C to +85°C) without trimming.
Time Delay Accuracy	±5% to ±9% - defines maximum deviation in sequence step timing due to capacitor tolerance and internal charge current variation.
Response Time (VINx → OUTx)	5.8 µs to 9.2 µs - determines minimum detectable UV fault duration before state machine reacts.
Output Sink Capability	2 mA @ 0.4 V low - sufficient to drive enable inputs of most DC/DC controllers and LDOs directly.
Input Glitch Immunity	3.3 µs to 9.7 µs - filters noise on UP/DOWN and VINx pins, preventing false sequencing triggers.
Supply Current	146 µA to 210 µA - ultra-low quiescent current enables use in always-on power management subsystems.

Pinout & Package

The ADM1186-2ARQZ is housed in a 16-lead QSOP package (3.9 mm × 4.9 mm, 1.0 mm height), RoHS-compliant and rated for −40°C to +85°C operation.

Pin	Circuit Role	Design Meaning
VIN1–VIN4	Noninverting comparator input	Monitor rail voltages via external resistor dividers; each compares against 0.6 V reference to detect undervoltage.
UP/DOWN	Edge-triggered sequencing control	Rising edge initiates power-up; falling edge initiates power-down - single-pin bidirectional control reduces system GPIO usage.
GND	Analog/digital ground reference	Common return path for comparators, timing circuits, and open-drain outputs; requires low-impedance PCB connection.
OUT1–OUT4	Open-drain enable outputs	Drive EN pins of DC/DC converters; require external pull-ups; support independent turn-on/turn-off sequencing with capacitor-programmed delays.
PWRGD	Open-drain power-good output	Asserts high only when all four VINx > 0.6 V - provides system-level "all rails OK" signal for microcontroller release.
DLY_EN_OUT1–DLY_EN_OUT4	Capacitor-based timing inputs	Set time between prior event (e.g., OUT1 high) and next action (e.g., OUT2 high); define sequence step intervals.
BLANK_DLY	Blanking time timing input	Sets minimum wait after OUTx assertion before monitoring corresponding VINx - prevents false UV detection during supply rise time.
VCC	Positive supply input	Power source for internal circuitry; must be stable ≥2.7 V before sequencing begins; UVLO activates below 2.46 V.

Key Features

Feature	Design Value
Quad precision voltage monitoring	Four independent 0.8% accurate comparators sharing a stable 0.6 V reference - eliminates need for external references or calibration.
Capacitor-programmable sequencing	Eight timing pins (four DLY_EN_OUTx + BLANK_DLY + two unused) allow fully customizable up/down delay profiles without firmware or EEPROM.
Bidirectional single-pin control	UP/DOWN pin replaces separate UP and DOWN signals - reduces PCB routing complexity and host controller pin count in space-constrained designs.
Open-drain output architecture	All outputs (OUT1–OUT4, PWRGD) are open-drain - enables level-shifting, wired-OR logic, and compatibility with diverse enable-input thresholds (1.2 V to 5 V).
Glitch-immune digital inputs	Internal filtering rejects transients ≤9.7 µs on UP/DOWN and VINx - prevents spurious sequencing from board-level noise or supply bounce.

Applications

Server Power Management	Industrial PLC Backplane
Use Scenario: Sequencing 12 V, 5 V, 3.3 V, and 1.8 V rails on a dual-socket x86 server motherboard during cold boot and graceful shutdown. IC Role / Device Role / Timing Role: Centralized sequencing controller that asserts enable signals in strict order, monitors each rail's UV condition, and asserts PWRGD only after all rails stabilize. Use Value: Prevents latch-up and inrush current conflicts between POL regulators; eliminates need for discrete timers or FPGA-based sequencing logic.	Use Scenario: Managing power-up of isolated I/O modules, communication interfaces (RS-485, CAN), and real-time processor cores in an industrial programmable logic controller. IC Role / Device Role / Timing Role: Voltage supervisor and sequencer ensuring analog front-end power (±15 V) stabilizes before enabling ADCs, and digital core (3.3 V) powers before FPGA configuration. Use Value: Guarantees deterministic startup timing across temperature and voltage variations; avoids brownout-induced firmware crashes during field deployment.
Telecom Line Card	Medical Imaging Subsystem
Use Scenario: Coordinating power delivery to DSPs, FPGAs, SERDES transceivers, and analog front-ends on a 40 Gbps optical line card with strict rail ramp requirements. IC Role / Device Role / Timing Role: Quad-channel sequencer enforcing millisecond-accurate delays between 1.2 V core, 1.8 V I/O, 2.5 V memory, and 3.3 V interface rails using external timing capacitors. Use Value: Meets Telcordia GR-63-CORE transient immunity requirements by eliminating race conditions during hot-swap insertion.	Use Scenario: Controlling power sequencing for CT detector ASICs, high-speed ADCs, and FPGA-based reconstruction engines where rail misalignment causes image artifacts. IC Role / Device Role / Timing Role: Precision monitor and sequencer verifying 1.0 V, 1.2 V, 1.8 V, and 2.5 V rails meet ±3% tolerance before releasing reset to imaging processors. Use Value: Reduces diagnostic false positives caused by undetected partial power failures; supports FDA-required traceability via deterministic fault response.

Server Power Management

Industrial PLC Backplane

Use Scenario: Sequencing 12 V, 5 V, 3.3 V, and 1.8 V rails on a dual-socket x86 server motherboard during cold boot and graceful shutdown.

IC Role / Device Role / Timing Role: Centralized sequencing controller that asserts enable signals in strict order, monitors each rail's UV condition, and asserts PWRGD only after all rails stabilize.

Use Value: Prevents latch-up and inrush current conflicts between POL regulators; eliminates need for discrete timers or FPGA-based sequencing logic.

Use Scenario: Managing power-up of isolated I/O modules, communication interfaces (RS-485, CAN), and real-time processor cores in an industrial programmable logic controller.

IC Role / Device Role / Timing Role: Voltage supervisor and sequencer ensuring analog front-end power (±15 V) stabilizes before enabling ADCs, and digital core (3.3 V) powers before FPGA configuration.

Use Value: Guarantees deterministic startup timing across temperature and voltage variations; avoids brownout-induced firmware crashes during field deployment.

Telecom Line Card

Medical Imaging Subsystem

Use Scenario: Coordinating power delivery to DSPs, FPGAs, SERDES transceivers, and analog front-ends on a 40 Gbps optical line card with strict rail ramp requirements.

IC Role / Device Role / Timing Role: Quad-channel sequencer enforcing millisecond-accurate delays between 1.2 V core, 1.8 V I/O, 2.5 V memory, and 3.3 V interface rails using external timing capacitors.

Use Value: Meets Telcordia GR-63-CORE transient immunity requirements by eliminating race conditions during hot-swap insertion.

Use Scenario: Controlling power sequencing for CT detector ASICs, high-speed ADCs, and FPGA-based reconstruction engines where rail misalignment causes image artifacts.

IC Role / Device Role / Timing Role: Precision monitor and sequencer verifying 1.0 V, 1.2 V, 1.8 V, and 2.5 V rails meet ±3% tolerance before releasing reset to imaging processors.

Use Value: Reduces diagnostic false positives caused by undetected partial power failures; supports FDA-required traceability via deterministic fault response.

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage sequencing applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM1186-1ARQZ	Includes SEQ_DONE and FAULT pins; supports cascading and fault propagation; uses 20-lead QSOP package.	Required for multi-board sequencing where fault events must halt downstream boards synchronously.	Select ADM1186-1ARQZ when inter-device fault coordination or sequence completion signaling is needed - not a drop-in replacement due to pin count and function differences.
TPS65023RGZR	Integrated PMIC with three buck converters, two LDOs, and basic sequencing; fixed internal delays; no capacitor-programmable timing.	Suitable for compact, cost-sensitive applications where integrated regulation + sequencing is preferred over discrete supervision.	Choose TPS65023RGZR only if combined regulation and sequencing in one IC is acceptable - lacks ADM1186-2ARQZ's flexibility, accuracy, and rail count scalability.

Compared with ADM1186-1ARQZ, the ADM1186-2ARQZ trades fault propagation and sequence status signaling for smaller footprint and simplified layout; versus TPS65023RGZR, it offers superior voltage monitoring accuracy and fully programmable delays but requires external regulators - making it optimal for high-reliability, multi-supply systems where sequencing precision outweighs integration.

Availability

ADM1186-2ARQZ is available at Aetrix Electronics and suitable for server motherboard design, industrial PLC development, telecom line card qualification, and medical imaging subsystem production requiring stable component supply and long-term lifecycle support.

Supply support for ADM1186-2ARQZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The ADM1186 product line delivers highly accurate, programmable power sequencing and monitoring for complex multi-rail systems - designed specifically for applications demanding deterministic startup, robust fault handling, and minimal external component count.

FAQ

What is the primary function of the ADM1186-2ARQZ in a power management system?

The ADM1186-2ARQZ serves as a quad-channel voltage sequencer and monitor that controls the precise timing of power supply turn-on and turn-off sequences while continuously verifying rail integrity. It uses four comparators referenced to 0.6 V to detect undervoltage conditions and drives open-drain enable outputs (OUT1–OUT4) with capacitor-programmable delays. In every operational phase - from initial power-up through steady-state monitoring to controlled shutdown - the ADM1186-2ARQZ ensures safe, repeatable, and compliant power delivery across multiple voltage domains.

How does the ADM1186-2ARQZ differ from the ADM1186-1ARQZ in terms of pin functionality?

The ADM1186-2ARQZ uses a 16-lead QSOP package and omits the SEQ_DONE and FAULT pins present on the 20-lead ADM1186-1ARQZ. Its UP/DOWN pin combines both sequencing directions into a single edge-triggered input, whereas ADM1186-1ARQZ uses separate UP and DOWN pins. This makes ADM1186-2ARQZ unsuitable for cascaded fault-handling architectures but ideal for simpler, self-contained sequencing tasks where board space and pin count are constrained.

Can the ADM1186-2ARQZ be used to monitor and sequence more than four voltage rails?

No - the ADM1186-2ARQZ is strictly a quad-channel device with exactly four VINx inputs and four OUTx outputs. It cannot natively monitor or sequence more than four rails. However, multiple ADM1186-2ARQZ units can be coordinated externally using the PWRGD output of one device to trigger the UP/DOWN pin of another, though this requires additional logic and does not provide the synchronized fault propagation available with ADM1186-1ARQZ cascading.

What is the role of the BLANK_DLY pin on the ADM1186-2ARQZ?

The BLANK_DLY pin on the ADM1186-2ARQZ sets the blanking time - a user-defined delay after an OUTx pin is asserted before the corresponding VINx input is checked for undervoltage compliance. This prevents false fault detection during the natural rise time of regulated supplies. A capacitor connected to BLANK_DLY programs this interval, and its value directly impacts system robustness: too short risks premature fault triggering; too long increases total sequencing time unnecessarily.

Does the ADM1186-2ARQZ require external passive components to operate, and if so, which ones?

Yes - the ADM1186-2ARQZ requires external components for full functionality: (1) resistor dividers on each VINx pin to scale rail voltages down to the 0.6 V comparator threshold; (2) timing capacitors on DLY_EN_OUT1–DLY_EN_OUT4 pins to set sequence step delays; and (3) a capacitor on the BLANK_DLY pin to define the post-enable monitoring delay. Pull-up resistors are also required on all open-drain outputs (OUT1–OUT4, PWRGD) to establish valid high-level logic states.

ADM1186-2ARQZ Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 16-SSOP (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Type:: Sequencer

Number of Voltages Monitored:: 4

Voltage - Threshold:: Adjustable/Selectable

Output:: Open Drain or Open Collector

Reset:: Active High

Reset Timeout:: -

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-QSOP

ADM1186-2ARQZ FAQ

1.How can I place an order for ADM1186-2ARQZ through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM1186-2ARQZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM1186-2ARQZ reliable?

The price and inventory of ADM1186-2ARQZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1186-2ARQZ is usually 5 days.

3.What payment methods are accepted for ADM1186-2ARQZ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1186-2ARQZ transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM1186-2ARQZ?

ADM1186-2ARQZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM1186-2ARQZ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM1186-2ARQZ?

For technical support, including ADM1186-2ARQZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1186-2ARQZ requirements.

6.How does Aetrix verify that ADM1186-2ARQZ is sourced from the original manufacturer or authorized distributors?

All ADM1186-2ARQZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1186-2ARQZ meets industry standards.

7.What is the process for return or replacement of ADM1186-2ARQZ?

All ADM1186-2ARQZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM1186-2ARQZ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM1186-2ARQZ part is unused and in its original packaging.

Return procedure for ADM1186-2ARQZ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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