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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM12914-1ARQZ

Name: ADM12914-1ARQZ
Brand: Analog Devices Inc.
SKU: ADM12914-1ARQZ
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADM12914-1ARQZ

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 16-SSOP (0.154", 3.90mm Width)

Datasheet:: ADM12914-1ARQZ.pdf

Description:: IC SUPERVISOR 4 CHANNEL 16QSOP

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Product details

Overview

ADM12914-1ARQZ from Analog Devices is a quad undervoltage/overvoltage (UV/OV) supervisor IC designed for precise monitoring of up to four positive or negative voltage rails in high-reliability systems. It delivers ±0.8% threshold accuracy over −40°C to +125°C, features 1 V buffered reference output (REF), open-drain UV/OV reset outputs, and adjustable reset timeout via external capacitor. It is deployed in FPGA core/I/O supply monitoring where tight rail tolerance enforcement is critical.

For engineers reviewing the ADM12914-1ARQZ datasheet, ADM12914-1ARQZ pinout, ADM12914-1ARQZ application, or ADM12914-1ARQZ equivalent, key selection considerations include its latching OV output behavior, dual-polarity rail support via SEL pin, shunt-regulated VCC operation up to 6.8 V, and guaranteed functionality down to VCC = 0.9 V - all validated for server and medical power integrity applications.

Technical Context

The ADM12914-1ARQZ implements four independent UV/OV comparators, each using a precision 0.5 V internal reference with ±0.8% accuracy across temperature. Each monitored rail uses dedicated VHx/VLx input pairs: VHx detects UV on positive rails (or OV on negative rails), VLx detects OV on positive rails (or UV on negative rails), with polarity determined by the three-state SEL pin.

It integrates a 6.6 V shunt regulator on VCC enabling direct connection to supplies up to 6.8 V (with current-limiting resistor), supports reset timeout programming via TIMER pin capacitor (7.5–10.5 ms typical), and guarantees UV/OV output assertion even at VCC = 0.9 V. The LATCH pin provides OV latch clear functionality unique to the -1 variant.

Key Specifications

Parameter	Value and Actual Design Meaning
UV/OV Threshold Accuracy	±0.8% over −40°C to +125°C - enables reliable detection within narrow FPGA core voltage bands (e.g., 1 V ±2.6% supply with ±5% IC tolerance).
VCC Operating Range	2.3 V to 6.0 V direct supply; up to 6.8 V with shunt regulation - supports direct integration into 3.3 V, 5 V, and higher intermediate bus systems with dropper resistor.
Reference Output	1 V buffered REF (±0.6% max deviation) - provides stable offset for negative rail monitoring without external reference.
Supply Current	62 µA typical at 25°C - minimizes loading on low-power auxiliary rails during supervision.
UV/OV Timeout Period	7.5–10.5 ms with 1 nF timer capacitor - ensures sufficient hold time for multi-rail power-up sequencing stability.
Input Voltage Range (VHx/VLx)	−0.3 V to +7.5 V - accommodates direct connection to negative rails (e.g., −5 V) when used with REF offset.
Operating Temperature	−40°C to +125°C - qualified for under-hood automotive, industrial, and telecom base station environments.

Pinout & Package

ADM12914-1ARQZ is housed in a 16-lead QSOP package (104 °C/W θ_JA), surface-mount compatible with standard reflow profiles and rated for extended industrial temperature operation.

Pin/Terminal	Circuit Role	Design Meaning
VH1–VH4	Voltage High Input (x1–x4)	Detects undervoltage on positive rails or overvoltage on negative rails; threshold = 0.5 V ±0.8%.
VL1–VL4	Voltage Low Input (x1–x4)	Detects overvoltage on positive rails or undervoltage on negative rails; threshold = 0.5 V ±0.8%.
UV	Active-Low Undervoltage Reset Output	Open-drain output asserted low during any UV fault; held low for programmable timeout after fault clearance.
OV	Active-Low Overvoltage Reset Output	Open-drain output asserted low during any OV fault; latched low until LATCH pin toggled (ADM12914-1 specific).
LATCH	OV Latch Clear Input	Pulled high to clear latched OV output; pulled low to maintain latch - enables manual or system-controlled OV fault acknowledgment.
SEL	Polarity Select Input	Three-state control (VCC/GND/open) configuring VH3/VL3/VH4/VL4 for positive or negative rail monitoring.
REF	1 V Buffered Reference Output	Sources/sinks ±1 mA; used as offset for negative rail divider networks - eliminates need for external reference in dual-polarity systems.
TIMER	Reset Timeout Timing Input	Connects to external capacitor (10 pF–100 nF) to set UV/OV assertion hold time; tied to VCC to bypass timeout.
VCC	Supply Voltage Input	Accepts 2.3–6.0 V directly; operates as 6.6 V shunt regulator above 6 V - requires series resistor if input >6 V to limit ICC ≤10 mA.
GND	Ground Reference	Analog and digital ground return; must be low-impedance path for accurate comparator referencing.

Key Features

Feature	Design Value
Quad UV/OV supervision with shared outputs	Single UV and single OV pin aggregate fault status from four independent rails - simplifies host processor interrupt handling and reduces GPIO count.
±0.8% threshold accuracy over full temperature range	Enables reliable monitoring of low-voltage rails (e.g., 1 V FPGA cores) where ±2.6% supply tolerance leaves only ~24 mV margin for threshold placement.
Latching OV output (ADM12914-1)	OV remains asserted until explicitly cleared via LATCH pin - prevents premature system restart during transient OV events in high-noise environments.
1 V buffered REF output	Provides stable, low-output-impedance offset for negative rail monitoring circuits - eliminates external reference IC and associated layout complexity.
VCC shunt regulator (6.6 V)	Allows direct connection to 12 V or 5 V intermediate buses without external LDO - reduces BOM count and improves system-level efficiency.

Applications

Server Supply Monitoring	FPGA/DSP Core Voltage Monitoring
Use Scenario: Real-time supervision of 12 V, 5 V, 3.3 V, and 1.2 V rails in dual-socket server motherboards with hot-swap capability. IC Role / Device Role / Timing Role: Quad UV/OV supervisor asserting common UV/OV signals to BMC for graceful shutdown or alert logging. Use Value: Prevents system lockup or data corruption by detecting out-of-spec rail conditions before ASICs enter undefined states - enabled by ±0.8% accuracy and −40°C to +125°C qualification.	Use Scenario: Monitoring 1 V core and 2.5 V I/O supplies of Xilinx Kintex Ultrascale+ FPGAs in 5G radio units. IC Role / Device Role / Timing Role: Provides synchronized UV/OV reset assertion with programmable timeout to align with FPGA configuration timing windows. Use Value: Ensures FPGA configuration completes only after all supplies stabilize - achieved via TIMER-pin-programmable 7.5–10.5 ms hold time and glitch-immune comparator inputs.
Telecommunications Equipment	Medical Imaging Power Systems
Use Scenario: Supervision of ±5 V, +3.3 V, and −12 V analog front-end supplies in LTE baseband transceivers. IC Role / Device Role / Timing Role: Polarity-configurable supervisor (via SEL pin) monitoring both positive and negative rails with single REF output. Use Value: Eliminates need for separate positive/negative supervisors - reduces PCB area and component count while maintaining ±0.8% threshold integrity across rail polarities.	Use Scenario: Monitoring isolated +5 V, +15 V, and −15 V supplies powering CT scanner detector ASICs. IC Role / Device Role / Timing Role: High-accuracy supervisor ensuring compliance with IEC 62304 safety-critical power sequencing requirements. Use Value: Guarantees fault detection before patient exposure - supported by −40°C to +125°C rating, 62 µA quiescent current, and VCC operation down to 0.9 V for brownout resilience.

Server Supply Monitoring

FPGA/DSP Core Voltage Monitoring

Use Scenario: Real-time supervision of 12 V, 5 V, 3.3 V, and 1.2 V rails in dual-socket server motherboards with hot-swap capability.

IC Role / Device Role / Timing Role: Quad UV/OV supervisor asserting common UV/OV signals to BMC for graceful shutdown or alert logging.

Use Value: Prevents system lockup or data corruption by detecting out-of-spec rail conditions before ASICs enter undefined states - enabled by ±0.8% accuracy and −40°C to +125°C qualification.

Use Scenario: Monitoring 1 V core and 2.5 V I/O supplies of Xilinx Kintex Ultrascale+ FPGAs in 5G radio units.

IC Role / Device Role / Timing Role: Provides synchronized UV/OV reset assertion with programmable timeout to align with FPGA configuration timing windows.

Use Value: Ensures FPGA configuration completes only after all supplies stabilize - achieved via TIMER-pin-programmable 7.5–10.5 ms hold time and glitch-immune comparator inputs.

Telecommunications Equipment

Medical Imaging Power Systems

Use Scenario: Supervision of ±5 V, +3.3 V, and −12 V analog front-end supplies in LTE baseband transceivers.

IC Role / Device Role / Timing Role: Polarity-configurable supervisor (via SEL pin) monitoring both positive and negative rails with single REF output.

Use Value: Eliminates need for separate positive/negative supervisors - reduces PCB area and component count while maintaining ±0.8% threshold integrity across rail polarities.

Use Scenario: Monitoring isolated +5 V, +15 V, and −15 V supplies powering CT scanner detector ASICs.

IC Role / Device Role / Timing Role: High-accuracy supervisor ensuring compliance with IEC 62304 safety-critical power sequencing requirements.

Use Value: Guarantees fault detection before patient exposure - supported by −40°C to +125°C rating, 62 µA quiescent current, and VCC operation down to 0.9 V for brownout resilience.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad voltage supervisor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM12914-2ARQZ	Replaces latching OV with disable (DIS) pin; OV/UV outputs disabled when DIS = high.	Suitable for systems requiring software-controlled suppression of reset signals during maintenance mode.	Select ADM12914-2ARQZ when OV latching is unnecessary and active disable functionality is preferred over manual latch clearing.
TPS3307-18DGNR	Triple supervisor (not quad); fixed 1.8 V, 3.3 V, 5 V thresholds; no negative rail support; ±2.5% accuracy.	Applicable only to simpler, positive-only, lower-accuracy multi-rail systems without FPGA-level tolerance demands.	Choose TPS3307-18DGNR only for cost-sensitive, non-critical applications where quad monitoring and ±0.8% accuracy are not required.

Compared with ADM12914-2ARQZ, ADM12914-1ARQZ provides deterministic OV fault acknowledgment via hardware latch clear, whereas TPS3307-18DGNR lacks quad capability, negative rail support, and fails to meet the ±0.8% accuracy needed for sub-1.2 V core monitoring - making ADM12914-1ARQZ uniquely suited for high-integrity, multi-polarity, tightly-toleranced systems.

Availability

ADM12914-1ARQZ is available at Aetrix Electronics and suitable for server supply monitoring, FPGA/DSP core voltage monitoring, telecommunications equipment, and medical imaging power systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for ADM12914-1ARQZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The ADM12914 product line delivers precision quad voltage supervision for mission-critical power integrity in high-density computing and instrumentation systems - engineered specifically for applications demanding simultaneous positive/negative rail monitoring with sub-1% threshold accuracy.

FAQ

What is the function of the SEL pin on the ADM12914-1ARQZ?

The SEL pin on the ADM12914-1ARQZ is a three-state input that configures the polarity of VH3/VL3 and VH4/VL4 for monitoring either positive or negative voltage rails. When tied to VCC, both inputs monitor positive rails; when left open, VH3/VL3 monitor positive and VH4/VL4 monitor negative; when tied to GND, both monitor negative rails. This eliminates the need for separate supervisors in mixed-polarity systems and is a defining feature of the ADM12914-1ARQZ architecture.

How does the ADM12914-1ARQZ achieve ±0.8% threshold accuracy across temperature?

The ADM12914-1ARQZ achieves ±0.8% threshold accuracy by using a trimmed, laser-calibrated 0.5 V internal reference combined with matched comparator input stages and proprietary process compensation. This accuracy is maintained from −40°C to +125°C and is verified per Table 1 in the Rev. F datasheet - enabling reliable detection in narrow-margin applications like 1 V FPGA core monitoring where supply tolerances leave less than 25 mV for threshold placement.

Can the ADM12914-1ARQZ monitor negative voltage rails without external components?

Yes, the ADM12914-1ARQZ can monitor negative voltage rails without external references because it integrates a 1 V buffered REF output used as an offset in the resistor divider network. When SEL configures VH3/VL3 or VH4/VL4 for negative rail monitoring, the REF pin connects to the high side of the divider, allowing direct sensing of rails such as −5 V. External resistors are still required for threshold scaling, but no additional reference IC is needed - a key advantage of the ADM12914-1ARQZ design.

What is the purpose of the LATCH pin on the ADM12914-1ARQZ?

The LATCH pin on the ADM12914-1ARQZ controls the behavior of the OV output: when pulled high, it clears a latched OV condition; when held low, it maintains the OV output in a latched low state after an overvoltage event. This allows system firmware or hardware logic to acknowledge and manually reset OV faults - distinguishing ADM12914-1ARQZ from non-latching alternatives and enhancing fault diagnostics in safety-critical applications.

Does the ADM12914-1ARQZ require an external timer capacitor for basic operation?

No, the ADM12914-1ARQZ does not require an external timer capacitor for basic UV/OV detection - it functions immediately upon valid VCC and input voltages. However, the TIMER pin capacitor (typically 1 nF) sets the UV/OV reset timeout period (7.5–10.5 ms). To bypass timeout entirely, tie TIMER to VCC. Omitting the capacitor results in immediate release of UV/OV outputs after fault clearance, which may cause instability in multi-rail power-up sequences - a behavior explicitly supported but not default in ADM12914-1ARQZ operation.

ADM12914-1ARQZ Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 16-SSOP (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Type:: Multi-Voltage Supervisor

Number of Voltages Monitored:: 4

Voltage - Threshold:: Adjustable/Selectable

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: Adjustable/Selectable

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-QSOP

ADM12914-1ARQZ FAQ

1.How can I place an order for ADM12914-1ARQZ through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM12914-1ARQZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM12914-1ARQZ reliable?

The price and inventory of ADM12914-1ARQZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM12914-1ARQZ is usually 5 days.

3.What payment methods are accepted for ADM12914-1ARQZ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM12914-1ARQZ transactions.

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4.How is shipping managed for ADM12914-1ARQZ?

ADM12914-1ARQZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM12914-1ARQZ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM12914-1ARQZ?

For technical support, including ADM12914-1ARQZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM12914-1ARQZ requirements.

6.How does Aetrix verify that ADM12914-1ARQZ is sourced from the original manufacturer or authorized distributors?

All ADM12914-1ARQZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM12914-1ARQZ meets industry standards.

7.What is the process for return or replacement of ADM12914-1ARQZ?

All ADM12914-1ARQZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM12914-1ARQZ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM12914-1ARQZ part is unused and in its original packaging.

Return procedure for ADM12914-1ARQZ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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