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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM12914-2ARQZ

Name: ADM12914-2ARQZ
Brand: Analog Devices Inc.
SKU: ADM12914-2ARQZ
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADM12914-2ARQZ

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 16-SSOP (0.154", 3.90mm Width)

Datasheet:: ADM12914-2ARQZ.pdf

Description:: IC SUPERVISOR 4 CHANNEL 16QSOP

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Product details

Overview

ADM12914-2ARQZ from Analog Devices is a quad positive/negative voltage supervisor IC designed for high-accuracy rail monitoring in multi-rail power systems. It monitors up to four independent voltage rails-two positive and two negative-with ±0.8% threshold accuracy over −40°C to +125°C, 500 mV internal reference comparator threshold, and open-drain UV/OV reset outputs. It is used in FPGA core/I/O supply supervision where tight tolerance margins demand precise fault detection.

For engineers reviewing the ADM12914-2ARQZ datasheet, ADM12914-2ARQZ pinout, ADM12914-2ARQZ application, or ADM12914-2ARQZ equivalent, key selection criteria include its dual-polarity support (via SEL pin), disable-controlled output override, 62 µA quiescent current, 1 V buffered REF output for negative rail offsetting, and adjustable 7.5–10.5 ms UV/OV timeout via external TIMER capacitor.

Technical Context

The ADM12914-2ARQZ implements four independent UV/OV comparators sharing a common 500 mV precision reference, with VHx/VLx input pairs per rail enabling simultaneous undervoltage and overvoltage detection. Its three-state SEL pin configures polarity for inputs VH3/VL3/VH4/VL4-supporting positive, negative, or mixed-supply monitoring without external level-shifting circuitry.

Unlike the latch-based ADM12914-1, the ADM12914-2ARQZ uses a dedicated DIS pin to override both UV and OV outputs high regardless of input conditions-except during VCC undervoltage lockout (UVLO at 1.94–2.06 V). Its internal 6.6 V shunt regulator enables operation from supplies up to 6 V directly or higher voltages with a dropper resistor, while maintaining guaranteed output functionality down to VCC = 0.9 V.

Key Specifications

Parameter	Value and Actual Design Meaning
Threshold Accuracy	±0.8% over −40°C to +125°C - ensures reliable trip points for low-voltage rails like 1 V FPGA cores within tight ±5% input windows.
UV/OV Threshold	500 mV nominal - fixed internal reference enables consistent comparator decision point across all four monitored rails.
Supply Voltage Range	2.3 V to 6.0 V (direct); >6 V with dropper resistor - internal 6.6 V shunt regulator allows use in 12 V or 24 V backplane systems.
Quiescent Current	62 µA typical - enables always-on supervision in power-constrained applications such as telecom line cards.
Reset Timeout Range	7.5–10.5 ms with 1 nF timer capacitor - programmable delay prevents false resets during supply settling after power-up or transient recovery.
Reference Output	1 V buffered REF - provides stable offset for negative rail monitoring (e.g., −5 V) using standard resistor dividers without external references.
Operating Temperature	−40°C to +125°C - qualified for under-hood automotive, industrial PLC, and base station equipment environments.

Pinout & Package

ADM12914-2ARQZ is housed in a 16-lead QSOP package (θJA = 104°C/W), surface-mount compatible with standard reflow profiles and suitable for high-density PCB layouts.

Pin/Terminal	Circuit Role	Design Meaning
VH1, VH2	Positive-rail high-side UV sense	Asserts UV when voltage drops below 500 mV; connect to high-side divider tap for +V rails.
VL1, VL2	Positive-rail low-side OV sense	Asserts OV when voltage rises above 500 mV; connect to low-side divider tap for +V rails.
VH3, VH4, VL3, VL4	Configurable polarity inputs	SEL pin determines if these monitor positive (VHx < 500 mV → UV) or negative (VLx > 500 mV → UV) supplies.
DIS	UV/OV output disable control	Pulling high forces both UV and OV high-useful during system initialization or safe-mode entry.
REF	1 V buffered reference output	Sources/sinks ±1 mA; used as offset for negative rail monitoring (e.g., −5 V referenced to 1 V).
UV / OV	Open-drain reset outputs	Active-low signals with weak internal pull-up to VCC; can be externally pulled to 16 V for mixed-voltage logic interfacing.
TIMER	External timeout capacitor node	Connects to ground via CTIMER (10 pF–100 nF) to set UV/OV assertion hold time; tie to VCC to bypass.
SEL	Three-state polarity select	Connect to VCC (positive), GND (negative), or leave open (mixed) to configure VH3/VL3/VH4/VL4 behavior.

Key Features

Feature	Design Value
Dual-polarity rail supervision	Monitors both positive and negative supplies (e.g., +1.0 V and −5.0 V) using same device and REF pin-eliminates need for separate supervisors.
Disable-controlled reset override	DIS pin forces UV/OV high independently of input conditions-enables deterministic system reset sequencing during firmware updates or safety shutdowns.
Glitch-immune comparator architecture	Immune to transients <100 µs at ≤10% overdrive-prevents spurious resets from switching noise on DC/DC converter outputs.
Extended temperature operation	Specified from −40°C to +125°C with <±0.8% threshold drift-ensures reliability in uncooled industrial enclosures and automotive engine bays.
Low-power always-on monitoring	62 µA supply current at 3.3 V-supports continuous supervision in battery-backed or energy-harvested subsystems.

Applications

FPGA Core & I/O Supply Monitoring	Server PSU Redundancy Control
Use Scenario: Supervising 1 V FPGA core and 1.8 V I/O rails in high-performance compute blades where supply regulation tolerances are ±2.6% and FPGA input limits are ±5%. IC Role / Device Role / Timing Role: Quad UV/OV supervisor providing independent fault detection per rail, with 500 mV thresholds scaled via precision resistors to match exact trip points. Use Value: ±0.8% threshold accuracy ensures UV/OV windows fit within the narrow 24 mV margin between supply regulation and FPGA input spec-preventing false trips or missed faults.	Use Scenario: Coordinating failover between redundant 12 V server PSUs in enterprise rack servers requiring hot-swap capability and graceful shutdown on primary PSU loss. IC Role / Device Role / Timing Role: Monitors primary and backup 12 V rails via resistor dividers; DIS pin synchronized to system management controller to suppress resets during controlled switchover. Use Value: Adjustable 7.5–10.5 ms timeout prevents momentary dips during PSU handoff from triggering system reset-maintaining uptime during redundancy transitions.
Telecom Line Card Power Integrity	Medical Imaging Power Sequencing
Use Scenario: Ensuring clean startup and fault-free operation of +3.3 V, +5 V, −5 V, and −12 V analog signal chains in optical transport network (OTN) line cards operating at −40°C to +85°C. IC Role / Device Role / Timing Role: Single-chip solution supervising all four rails with polarity-selectable inputs (SEL pin tied to GND for negative rails), REF pin driving −5 V/−12 V divider offsets. Use Value: 16-lead QSOP footprint and −40°C to +125°C rating enable compact, rugged implementation in space-constrained, thermally demanding telecom chassis.	Use Scenario: Verifying correct power-up sequence of detector bias supplies (+100 V, −100 V), analog front-end rails (+5 V, −5 V), and digital core (1.2 V) in portable X-ray imaging modules. IC Role / Device Role / Timing Role: Uses DIS pin to gate UV/OV outputs until all rails reach valid levels, then releases reset only after full timeout-enforcing strict sequencing before image acquisition begins. Use Value: Guaranteed operation down to VCC = 0.9 V ensures supervision remains active even during brownout conditions on auxiliary supplies-critical for patient safety compliance.

FPGA Core & I/O Supply Monitoring

Server PSU Redundancy Control

Use Scenario: Supervising 1 V FPGA core and 1.8 V I/O rails in high-performance compute blades where supply regulation tolerances are ±2.6% and FPGA input limits are ±5%.

IC Role / Device Role / Timing Role: Quad UV/OV supervisor providing independent fault detection per rail, with 500 mV thresholds scaled via precision resistors to match exact trip points.

Use Value: ±0.8% threshold accuracy ensures UV/OV windows fit within the narrow 24 mV margin between supply regulation and FPGA input spec-preventing false trips or missed faults.

Use Scenario: Coordinating failover between redundant 12 V server PSUs in enterprise rack servers requiring hot-swap capability and graceful shutdown on primary PSU loss.

IC Role / Device Role / Timing Role: Monitors primary and backup 12 V rails via resistor dividers; DIS pin synchronized to system management controller to suppress resets during controlled switchover.

Use Value: Adjustable 7.5–10.5 ms timeout prevents momentary dips during PSU handoff from triggering system reset-maintaining uptime during redundancy transitions.

Telecom Line Card Power Integrity

Medical Imaging Power Sequencing

Use Scenario: Ensuring clean startup and fault-free operation of +3.3 V, +5 V, −5 V, and −12 V analog signal chains in optical transport network (OTN) line cards operating at −40°C to +85°C.

IC Role / Device Role / Timing Role: Single-chip solution supervising all four rails with polarity-selectable inputs (SEL pin tied to GND for negative rails), REF pin driving −5 V/−12 V divider offsets.

Use Value: 16-lead QSOP footprint and −40°C to +125°C rating enable compact, rugged implementation in space-constrained, thermally demanding telecom chassis.

Use Scenario: Verifying correct power-up sequence of detector bias supplies (+100 V, −100 V), analog front-end rails (+5 V, −5 V), and digital core (1.2 V) in portable X-ray imaging modules.

IC Role / Device Role / Timing Role: Uses DIS pin to gate UV/OV outputs until all rails reach valid levels, then releases reset only after full timeout-enforcing strict sequencing before image acquisition begins.

Use Value: Guaranteed operation down to VCC = 0.9 V ensures supervision remains active even during brownout conditions on auxiliary supplies-critical for patient safety compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad voltage supervisor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM12914-1ARQZ	Latching OV output cleared by LATCH pin; no DIS pin-OV remains asserted until manually cleared.	Suitable for fault-logging systems requiring persistent OV indication until service intervention.	Select ADM12914-1ARQZ only if latched fault reporting is required; ADM12914-2ARQZ is preferred for reset coordination with active control.
TPS3307-33DGNR	Triple supervisor (not quad); fixed 3.3 V, 5 V, and adjustable thresholds; no negative rail support or REF output.	Limited to positive-only, lower channel count applications-requires additional ICs for full quad + negative coverage.	Choose TPS3307-33DGNR only for simpler 3-rail +3.3 V/5 V systems; ADM12914-2ARQZ provides integrated quad + polarity flexibility.

Compared with ADM12914-1ARQZ and TPS3307-33DGNR, the ADM12914-2ARQZ uniquely combines quad-channel supervision, configurable polarity, disable-controlled outputs, and a buffered 1 V reference-making it the only single-package solution for mixed positive/negative rail monitoring with deterministic reset timing.

Availability

ADM12914-2ARQZ is available at Aetrix Electronics and suitable for server power supply monitoring, FPGA/DSP voltage supervision, telecommunications infrastructure, medical imaging systems, and industrial control requiring stable component supply across extended temperature ranges.

Supply support for ADM12914-2ARQZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.

The ADM12914 product line delivers precision voltage supervision for complex multi-rail systems-designed specifically for applications demanding ±0.8% threshold accuracy, wide temperature operation, and flexible polarity configuration without external components.

FAQ

What is the function of the DIS pin on the ADM12914-2ARQZ?

The DIS (Disable) pin on the ADM12914-2ARQZ forces both UV and OV outputs high when driven logic-high, overriding all internal fault detection. This enables controlled reset suppression during system initialization or safe-mode entry. The ADM12914-2ARQZ maintains this state until DIS is deasserted, except during VCC undervoltage lockout (below 1.94 V), where UV/OV assert regardless of DIS state.

How does the ADM12914-2ARQZ monitor negative voltage rails?

The ADM12914-2ARQZ monitors negative rails using its 1 V buffered REF output as an offset reference. With SEL pin configured (e.g., tied to GND), inputs VH3/VL3/VH4/VL4 interpret rising VLx or falling VHx relative to 500 mV as UV/OV events. For example, a −5 V rail connects through a resistor divider to REF (1 V) and GND, producing VL4 > 500 mV during undervoltage-triggering UV assertion. The ADM12914-2ARQZ requires no external op-amps or level shifters.

What is the minimum and maximum timeout period achievable with the TIMER pin on the ADM12914-2ARQZ?

The ADM12914-2ARQZ supports a UV/OV timeout period of 7.5 ms to 10.5 ms with a 1 nF capacitor at the TIMER pin, scaling linearly with capacitance (tUOTO ≈ CTIMER × 1.15 s/F). Using the recommended 10 pF–100 nF range, timeout spans ~11.5 µs to ~115 ms. Values below 10 pF risk insufficient charge; capacitors must exhibit leakage <1.7 µA to avoid timing error. The ADM12914-2ARQZ timer is disabled when TIMER is tied to VCC.

Can the ADM12914-2ARQZ operate from a 12 V supply?

Yes-the ADM12914-2ARQZ incorporates an internal 6.6 V shunt regulator on the VCC pin. To operate from 12 V, a dropper resistor must limit current into VCC to ≤10 mA (e.g., ≥1.2 kΩ for 12 V). Without the resistor, VCC must remain ≤6 V. The ADM12914-2ARQZ regulates internally, delivering stable operation and full specification compliance-including 62 µA ICC and ±0.8% threshold accuracy-even with higher input voltages.

What is the purpose of the SEL pin on the ADM12914-2ARQZ?

The SEL (Select) pin on the ADM12914-2ARQZ is a three-state input that configures the polarity interpretation of VH3/VL3/VH4/VL4. When tied to VCC, all four inputs monitor positive rails; when tied to GND, they monitor negative rails; when left open, VH3/VL3 monitor positive and VH4/VL4 monitor negative. This eliminates external polarity-reversal circuitry and allows one ADM12914-2ARQZ to supervise mixed-supply systems without redesign.

ADM12914-2ARQZ Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 16-SSOP (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Type:: Multi-Voltage Supervisor

Number of Voltages Monitored:: 4

Voltage - Threshold:: Adjustable/Selectable

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: Adjustable/Selectable

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-QSOP

ADM12914-2ARQZ FAQ

1.How can I place an order for ADM12914-2ARQZ through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM12914-2ARQZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM12914-2ARQZ reliable?

The price and inventory of ADM12914-2ARQZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM12914-2ARQZ is usually 5 days.

3.What payment methods are accepted for ADM12914-2ARQZ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM12914-2ARQZ transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM12914-2ARQZ?

ADM12914-2ARQZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM12914-2ARQZ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM12914-2ARQZ?

For technical support, including ADM12914-2ARQZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM12914-2ARQZ requirements.

6.How does Aetrix verify that ADM12914-2ARQZ is sourced from the original manufacturer or authorized distributors?

All ADM12914-2ARQZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM12914-2ARQZ meets industry standards.

7.What is the process for return or replacement of ADM12914-2ARQZ?

All ADM12914-2ARQZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM12914-2ARQZ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM12914-2ARQZ part is unused and in its original packaging.

Return procedure for ADM12914-2ARQZ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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