Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. ADM12914-2ARQZ-RL7

Name: ADM12914-2ARQZ-RL7
Brand: Analog Devices Inc.
SKU: ADM12914-2ARQZ-RL7
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: ADM12914-2ARQZ-RL7

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 16-SSOP (0.154", 3.90mm Width)

Datasheet:: ADM12914-2ARQZ-RL7.pdf

Description:: IC SUPERVISOR 4 CHANNEL 16QSOP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,010

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

ADM12914-2ARQZ-RL7 from Analog Devices is a quad positive/negative voltage supervisor IC with ±0.8% threshold accuracy over −40°C to +125°C, 1 V buffered reference output, open-drain UV/OV reset outputs, and adjustable reset timeout via external capacitor. It monitors up to four rails-including two negative supplies-using dedicated VHx/VLx input pairs per rail, and features a DIS pin to override both UV and OV outputs. Used in FPGA core/I/O voltage monitoring and telecom power systems.

For engineers reviewing the ADM12914-2ARQZ-RL7 datasheet, ADM12914-2ARQZ-RL7 pinout, ADM12914-2ARQZ-RL7 application, or ADM12914-2ARQZ-RL7 equivalent, key selection criteria include its dual-polarity supervision capability, 62 µA quiescent current, guaranteed operation down to VCC = 0.9 V, ±0.8% threshold accuracy across temperature, and disable-controlled fault response for high-reliability server and medical power management.

Technical Context

The ADM12914-2ARQZ-RL7 implements four independent voltage comparators (two per monitored rail), each referenced to a precision 500 mV internal threshold with ±0.8% accuracy over −40°C to +125°C. Its SEL pin configures polarity for inputs VH3/VL3/VH4/VL4-supporting both positive and negative supply monitoring using the same pin set.

It integrates a 6.6 V shunt regulator on VCC for operation from supplies >6 V (with dropper resistor), a 1 V buffered REF output used as offset for negative rail sensing, and a TIMER pin that sets UV/OV timeout (7.5–10.5 ms with 1 nF) via external capacitor. The DIS pin forces UV/OV high regardless of input conditions unless VCC falls below UVLO (2.0 V).

Key Specifications

Parameter	Value and Actual Design Meaning
Threshold Accuracy	±0.8% over −40°C to +125°C - enables tight UV/OV detection for 1 V FPGA cores with ±5% tolerance and ±2.6% supply regulation.
UV/OV Threshold Voltage	500 mV nominal - fixed internal reference; actual trip points are VHx < 496 mV (UV) or VLx > 504 mV (OV) at TA = 25°C.
Supply Voltage Range	2.3 V to 6.0 V direct; up to 16 V with shunt regulator - supports wide-input systems when paired with dropper resistor limiting ICC ≤ 10 mA.
Quiescent Current	62 µA typical - enables low-power always-on supervision in battery-backed or energy-sensitive applications.
Reset Timeout Range	7.5–10.5 ms with 1 nF timer capacitor - programmable delay ensures stable power-up sequencing before system release.
Reference Output	1 V buffered REF (±0.6% over temp) - provides stable offset for negative rail monitoring without external reference.
Operating Temperature	−40°C to +125°C - qualified for industrial, telecom, and automotive under-hood power monitoring environments.

Pinout & Package

ADM12914-2ARQZ-RL7 is housed in a 16-lead QSOP package (3.9 mm × 4.9 mm, 1.0 mm height) with standard gull-wing leads and 0.635 mm pitch.

Pin/Terminal	Circuit Role	Design Meaning
VH1, VH2	Positive-rail high-side voltage input	Detects undervoltage when voltage drops below 500 mV; connect to high-side divider tap for +V rails.
VL1, VL2	Positive-rail low-side voltage input	Detects overvoltage when voltage rises above 500 mV; connect to low-side divider tap for +V rails.
VH3, VH4, VL3, VL4	Polarity-configurable inputs	SEL pin determines if these monitor +V (UV: VHx < 500 mV) or −V (UV: VLx > 500 mV); enables dual-polarity support.
DIS	Disable control input	Pulling high forces UV/OV outputs high regardless of input faults - critical for controlled system reset inhibition.
UV / OV	Open-drain reset outputs	Active-low signals asserted during fault; weak internal pull-up to VCC but can be externally pulled to 16 V for level-shifting.
REF	Buffered 1 V reference output	Sources/sinks ±1 mA; used as offset for negative rail sensing (e.g., −5 V monitoring with REF as 1 V reference node).
TIMER	Timeout capacitor connection	External capacitor (10 pF–100 nF) sets UV/OV assertion hold time; tie to VCC to bypass timing.
VCC	Supply input with shunt regulator	Operates directly at 2.3–6.0 V; internal 6.6 V shunt allows use with higher supplies when current-limited by dropper resistor.

Key Features

Feature	Design Value
Quad UV/OV supervision with polarity select	Monitors four independent rails (two positive, two configurable for negative) using single IC - reduces BOM count and layout area vs. discrete supervisors.
±0.8% threshold accuracy over full temp range	Eliminates need for calibration or trimming in high-precision applications like 1 V FPGA core monitoring where margin is <24 mV.
1 V buffered reference output	Enables accurate negative rail monitoring without external reference IC or precision resistors - simplifies −5 V/−12 V PSU supervision.
Disable-controlled fault response	DIS pin overrides UV/OV outputs independently of input conditions - supports safe firmware-controlled reset suppression during diagnostics or maintenance.
Glitch-immune comparator architecture	Rejects transients <100 µs at 5% overdrive - prevents false resets from switching noise on DC-DC converter outputs.

Applications

Server Supply Monitoring	FPGA Core & I/O Voltage Monitoring
Use Scenario: Real-time supervision of 12 V, 5 V, 3.3 V, and −5 V rails in dual-socket rack servers with hot-swap capability. IC Role / Device Role / Timing Role: Quad supervisor detects UV/OV faults across primary and auxiliary supplies; DIS pin synchronizes reset inhibition during firmware updates. Use Value: Prevents uncontrolled reboots during transient load steps by holding UV/OV asserted until all rails stabilize (programmable via TIMER capacitor).	Use Scenario: Monitoring 1 V core and 2.5 V I/O supplies for Xilinx Kintex Ultrascale+ FPGAs in 5G baseband units. IC Role / Device Role / Timing Role: Uses VH1/VL1 for 1 V core (±5% tolerance), VH2/VL2 for 2.5 V I/O, and VH3/VL3 (SEL = GND) for −1.2 V analog bias rail. Use Value: ±0.8% threshold accuracy ensures UV/OV detection stays within 1.026–1.05 V (OV) and 0.95–0.974 V (UV) bands despite supply regulation and resistor tolerances.
Telecommunications Equipment	Medical Imaging Power Systems
Use Scenario: Supervision of redundant −48 V DC distribution, +3.3 V control logic, +12 V fan power, and +5 V interface rails in LTE macro base stations. IC Role / Device Role / Timing Role: Configures VH3/VL3 and VH4/VL4 as negative inputs (SEL = GND) to supervise −48 V with 1 V REF offset; UV/OV outputs feed FPGA-based fault manager. Use Value: 62 µA supply current minimizes standby loss in always-on telecom modules; extended −40°C to +125°C rating supports outdoor cabinet deployment.	Use Scenario: Monitoring high-stability ±15 V analog front-end supplies and 3.3 V digital control rails in MRI gradient amplifier subsystems. IC Role / Device Role / Timing Role: Uses REF output to bias negative rail dividers; DIS pin disables resets during MRI pulse sequence execution to avoid interruption. Use Value: Guaranteed operation down to VCC = 0.9 V ensures reliable fault reporting even during brownout events on backup batteries.

Server Supply Monitoring

FPGA Core & I/O Voltage Monitoring

Use Scenario: Real-time supervision of 12 V, 5 V, 3.3 V, and −5 V rails in dual-socket rack servers with hot-swap capability.

IC Role / Device Role / Timing Role: Quad supervisor detects UV/OV faults across primary and auxiliary supplies; DIS pin synchronizes reset inhibition during firmware updates.

Use Value: Prevents uncontrolled reboots during transient load steps by holding UV/OV asserted until all rails stabilize (programmable via TIMER capacitor).

Use Scenario: Monitoring 1 V core and 2.5 V I/O supplies for Xilinx Kintex Ultrascale+ FPGAs in 5G baseband units.

IC Role / Device Role / Timing Role: Uses VH1/VL1 for 1 V core (±5% tolerance), VH2/VL2 for 2.5 V I/O, and VH3/VL3 (SEL = GND) for −1.2 V analog bias rail.

Use Value: ±0.8% threshold accuracy ensures UV/OV detection stays within 1.026–1.05 V (OV) and 0.95–0.974 V (UV) bands despite supply regulation and resistor tolerances.

Telecommunications Equipment

Medical Imaging Power Systems

Use Scenario: Supervision of redundant −48 V DC distribution, +3.3 V control logic, +12 V fan power, and +5 V interface rails in LTE macro base stations.

IC Role / Device Role / Timing Role: Configures VH3/VL3 and VH4/VL4 as negative inputs (SEL = GND) to supervise −48 V with 1 V REF offset; UV/OV outputs feed FPGA-based fault manager.

Use Value: 62 µA supply current minimizes standby loss in always-on telecom modules; extended −40°C to +125°C rating supports outdoor cabinet deployment.

Use Scenario: Monitoring high-stability ±15 V analog front-end supplies and 3.3 V digital control rails in MRI gradient amplifier subsystems.

IC Role / Device Role / Timing Role: Uses REF output to bias negative rail dividers; DIS pin disables resets during MRI pulse sequence execution to avoid interruption.

Use Value: Guaranteed operation down to VCC = 0.9 V ensures reliable fault reporting even during brownout events on backup batteries.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad voltage supervisor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADM12914-1ARQZ-RL7	Latching OV output cleared by LATCH pin; no DIS pin - OV remains asserted until manually cleared.	Suitable for fault-logging systems requiring persistent OV indication until operator intervention.	Select ADM12914-1ARQZ-RL7 only if latched fault reporting is required; ADM12914-2ARQZ-RL7 is preferred for automatic timeout recovery.
TPS3307-33DGNR	Triple supervisor (not quad); no negative rail support; ±2.5% threshold accuracy; no REF output.	Limited to positive-only, lower-accuracy monitoring of three rails - insufficient for −5 V/−48 V telecom or dual-polarity medical systems.	Use TPS3307-33DGNR only in cost-sensitive, single-polarity, triple-rail applications where ±0.8% accuracy is not required.

Compared with ADM12914-1ARQZ-RL7, the ADM12914-2ARQZ-RL7 replaces latched OV behavior with DIS-controlled override - enabling deterministic reset suppression without manual clearing. Versus TPS3307-33DGNR, it adds quad supervision, negative rail capability, ±0.8% accuracy, and 1 V REF - making it uniquely suited for high-integrity, multi-polarity power monitoring.

Availability

ADM12914-2ARQZ-RL7 is available at Aetrix Electronics and suitable for server supply monitoring, FPGA/DSP core and I/O voltage monitoring, telecommunications equipment, and medical imaging power systems requiring stable component supply across extended temperature and long product lifecycles.

Supply support for ADM12914-2ARQZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets with precision power management and signal conditioning solutions.

The ADM12914 product line delivers highly accurate, multi-rail voltage supervision for mission-critical power systems - designed specifically for applications demanding ±0.8% threshold stability across −40°C to +125°C and robust fault handling in telecom, server, and medical infrastructure.

FAQ

What is the function of the DIS pin on the ADM12914-2ARQZ-RL7?

The DIS (Disable) pin on the ADM12914-2ARQZ-RL7 forces both UV and OV outputs high when pulled to a logic high level (>1.2 V), overriding all input-based fault detection. This allows firmware or system controller to suppress resets during maintenance, diagnostics, or safe-mode transitions. When DIS is left open or pulled low, normal UV/OV supervision resumes. The ADM12914-2ARQZ-RL7 uses this pin instead of the LATCH pin found on the ADM12914-1 variant.

How does the ADM12914-2ARQZ-RL7 monitor negative voltage rails?

The ADM12914-2ARQZ-RL7 monitors negative rails using its 1 V buffered REF output as an offset reference. With SEL tied to GND or left floating, inputs VH3/VL3 and VH4/VL4 are configured for negative polarity: an undervoltage condition occurs when VLx exceeds 500 mV (i.e., −5 V becomes less negative than −4.575 V), and overvoltage when VHx drops below 500 mV (i.e., −5 V becomes more negative than −5.425 V). The REF pin connects to the high side of the resistor divider for accurate scaling.

What is the minimum VCC voltage required for valid operation of the ADM12914-2ARQZ-RL7?

The ADM12914-2ARQZ-RL7 guarantees functional operation down to VCC = 0.9 V, with UV and OV outputs remaining valid and responsive to input faults at this level. Below 0.9 V, behavior is unspecified. The device's supply UVLO activates at 2.0 V (typical), asserting UV low during power-up until VCC exceeds this threshold. This 0.9 V minimum enables reliable fault reporting during deep brownout conditions common in battery-backed systems.

Can the ADM12914-2ARQZ-RL7 be used with supply voltages above 6 V?

Yes - the ADM12914-2ARQZ-RL7 incorporates an internal 6.6 V shunt regulator on the VCC pin, allowing operation from supplies up to 16 V when a current-limiting dropper resistor is used. The resistor must limit VCC current to ≤10 mA (e.g., 1 kΩ for 16 V input). Without the resistor, VCC must remain ≤6 V to avoid exceeding absolute maximum ratings. This feature eliminates the need for external regulators in high-voltage industrial or telecom power systems.

What external components are required for basic operation of the ADM12914-2ARQZ-RL7?

For basic operation, the ADM12914-2ARQZ-RL7 requires: (1) a 0.1 µF ceramic bypass capacitor between VCC and GND; (2) external resistor dividers for each monitored rail (VHx/VLx connections); (3) a capacitor (10 pF–100 nF) between TIMER and GND to set UV/OV timeout; and (4) pull-up resistors on UV/OV if interfacing with higher-voltage logic (though internal weak pull-ups exist). The REF pin may drive up to 1 nF directly; larger loads require buffering.

ADM12914-2ARQZ-RL7 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 16-SSOP (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Multi-Voltage Supervisor

Number of Voltages Monitored:: 4

Voltage - Threshold:: Adjustable/Selectable

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: Adjustable/Selectable

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-QSOP

ADM12914-2ARQZ-RL7 FAQ

1.How can I place an order for ADM12914-2ARQZ-RL7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADM12914-2ARQZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADM12914-2ARQZ-RL7 reliable?

The price and inventory of ADM12914-2ARQZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM12914-2ARQZ-RL7 is usually 5 days.

3.What payment methods are accepted for ADM12914-2ARQZ-RL7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM12914-2ARQZ-RL7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADM12914-2ARQZ-RL7?

ADM12914-2ARQZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADM12914-2ARQZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADM12914-2ARQZ-RL7?

For technical support, including ADM12914-2ARQZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM12914-2ARQZ-RL7 requirements.

6.How does Aetrix verify that ADM12914-2ARQZ-RL7 is sourced from the original manufacturer or authorized distributors?

All ADM12914-2ARQZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM12914-2ARQZ-RL7 meets industry standards.

7.What is the process for return or replacement of ADM12914-2ARQZ-RL7?

All ADM12914-2ARQZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADM12914-2ARQZ-RL7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADM12914-2ARQZ-RL7 part is unused and in its original packaging.

Return procedure for ADM12914-2ARQZ-RL7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…