Analog Devices Inc. ADM13305-33ARZ-RL7
- Part No.:
- ADM13305-33ARZ-RL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
ADM13305-33ARZ-RL7.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADM13305-33ARZ-RL7 from Analog Devices is a dual-voltage supervisor IC designed to monitor 5 V and 3.3 V power rails in microprocessor-based systems, providing both active-high and active-low push-pull reset outputs with 140 ms minimum timeout and 1.6 sec typical watchdog timer. It operates from 2.7 V to 5.5 V supply, draws ≤40 μA, and functions across −40°C to +85°C for industrial embedded control.
For engineers reviewing the ADM13305-33ARZ-RL7 datasheet, ADM13305-33ARZ-RL7 pinout, ADM13305-33ARZ-RL7 application, or ADM13305-33ARZ-RL7 equivalent, key selection criteria include fixed 4.55 V / 2.93 V undervoltage thresholds, RESET validity down to VDD ≥ 1.1 V, watchdog input (WDI) sensitivity, manual reset (MR) timing, and SOIC_N package compatibility with legacy board layouts.
Technical Context
The ADM13305-33ARZ-RL7 integrates two independent voltage comparators with pretrimmed thresholds (4.55 V for SENSE1, 2.93 V for SENSE2), hysteresis of 40 mV and 30 mV respectively, and transition detection logic that asserts RESET when either sensed rail falls below its falling threshold (VIT−). Its internal oscillator drives both the 140–280 ms reset timeout and 1.1–2.3 sec watchdog timer.
It features dual reset outputs (push-pull RESET and RESET), manual reset input (MR) with 100 ns minimum pulse width, watchdog input (WDI) requiring toggling every ~1.6 sec to prevent timeout, and supply current stable at ≤40 μA across 2.7–5.5 V VDD - enabling low-power supervision without external biasing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.7 V to 5.5 V - supports operation across common logic and I/O supply domains including 3.3 V and 5 V systems. |
| SENSE1 Threshold (VIT−) | 4.46–4.67 V - monitors 5 V rail with ±2.5% tolerance over −40°C to +85°C; hysteresis = 40 mV prevents chatter during brownout recovery. |
| SENSE2 Threshold (VIT−) | 2.86–3.02 V - monitors 3.3 V rail with ±2.5% tolerance; hysteresis = 30 mV ensures stable release after voltage recovery. |
| Reset Timeout | 140–280 ms - guarantees minimum reset assertion duration after power-up or fault, masking transient supply dips. |
| Watchdog Timeout | 1.1–2.3 sec (typ. 1.6 sec) - provides fail-safe restart window for firmware lockup detection in DSP/microcontroller applications. |
| Supply Current | ≤40 μA - enables integration into battery-backed or energy-constrained systems without significant load on VDD. |
| RESET Validity | Down to VDD ≥ 1.1 V - ensures deterministic reset behavior during deep brownout, critical for safe processor initialization. |
Pinout & Package
ADM13305-33ARZ-RL7 is housed in an 8-lead narrow-body SOIC (SOIC_N, package code R-8), JEDEC MS-012-AA compliant, with 1.27 mm lead pitch and 5.00 mm × 4.00 mm body dimensions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SENSE1 | Voltage sense input 1 | Monitors 5 V rail; internally biased to 4.55 V falling threshold (VIT−); requires no external components. |
| 2 - SENSE2 | Voltage sense input 2 | Monitors 3.3 V rail; internally biased to 2.93 V falling threshold (VIT−); immune to short glitches. |
| 3 - WDI | Watchdog timer input | Edge-sensitive input; toggling resets watchdog counter; floating disables watchdog function. |
| 4 - GND | Analog/digital ground reference | Common return path for all internal circuits; must be low-impedance and decoupled with 0.1 μF capacitor near VDD. |
| 5 - RESET | Active-low push-pull reset output | Drives low during reset assertion; sinks up to 2 mA at 3.3 V; compatible with standard CMOS/LVTTL inputs. |
| 6 - RESET | Active-high push-pull reset output | Drives high during reset assertion; sources up to 2 mA at 3.3 V; eliminates need for external inverter. |
| 7 - MR | Manual reset input | Active-low; 100 ns minimum pulse width required; debounced internally; supports external push-button interface. |
| 8 - VDD | Power supply input | Accepts 2.7–5.5 V; powers all internal circuitry; requires local 0.1 μF ceramic decoupling to GND. |
Key Features
| Feature | Design Value |
|---|---|
| Dual fixed-threshold supervision | Simultaneous monitoring of 5 V (SENSE1) and 3.3 V (SENSE2) rails with factory-trimmed accuracy avoids external resistor networks. |
| Guaranteed RESET operation down to VDD = 1.1 V | Ensures reliable power-on reset sequencing even during severe brownout conditions before full VDD stabilization. |
| Independent watchdog and manual reset paths | WDI and MR provide redundant reset initiation methods - one for firmware failure, one for user/system-initiated recovery. |
| Push-pull RESET and RESET outputs | Eliminates need for external pull-up resistors or inverters, reducing BOM count and PCB footprint in space-constrained designs. |
| Low quiescent current (≤40 μA) | Minimizes impact on system power budget - especially critical in portable, battery-powered, or always-on embedded devices. |
Applications
| Industrial PLC Controller | Notebook Power Sequencing |
|---|---|
Use Scenario: Supervises dual-rail power (5 V I/O, 3.3 V core) in programmable logic controllers exposed to voltage transients and temperature extremes. IC Role / Device Role / Timing Role: Dual-supply monitor with independent reset assertion and watchdog timeout - ensures deterministic restart after brownout or firmware hang. Use Value: Prevents corrupted state execution by guaranteeing reset hold time ≥140 ms and enabling watchdog recovery within 1.6 sec of software stall. |
Use Scenario: Manages power-up sequencing and runtime supervision of CPU core (3.3 V) and peripheral (5 V) rails in compact notebook motherboards. IC Role / Device Role / Timing Role: Provides synchronized reset signaling to CPU and chipset via both active-high and active-low outputs, eliminating level-shifting. Use Value: Reduces component count by integrating dual-rail monitoring, watchdog, and manual reset - saving PCB area and simplifying layout. |
| Wireless Baseband Module | Industrial Data Acquisition Node |
Use Scenario: Ensures reliable boot and runtime integrity of FPGA+ARM SoC subsystems in LTE/5G remote radio units operating at −40°C to +85°C. IC Role / Device Role / Timing Role: Monitors 5 V analog front-end and 3.3 V digital domain supplies; uses WDI to detect baseband processor lockup. Use Value: Enables autonomous recovery from communication stack crashes without host intervention - improving field uptime and MTBF. |
Use Scenario: Supervises isolated sensor interface (5 V) and microcontroller (3.3 V) rails in DIN-rail mounted data loggers deployed in factory environments. IC Role / Device Role / Timing Role: Delivers robust reset signaling under EMI-rich conditions using glitch-immune SENSE inputs and MR for field service reset. Use Value: Maintains data integrity by preventing partial initialization during unstable power events - critical for accurate timestamped logging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6816EPA+ | Single 3.3 V supervisor (no dual-rail), no watchdog timer, 200 ms reset timeout, DIP-8 package | Lacks 5 V monitoring and WDI functionality; suitable only for single-rail 3.3 V systems with no firmware supervision needs | Select only if design uses only 3.3 V rail and does not require watchdog or manual reset capability. |
| TPS3808G33DBVR | Single 3.3 V supervisor with adjustable delay (0.5–10 s), no second sense input, SOT-23-6 package | Cannot monitor dual rails simultaneously; lacks active-high reset output and manual reset input | Choose when space-constrained single-rail supervision is needed, but not for ADM13305-33ARZ-RL7's dual-supply, dual-output, watchdog-enabled use case. |
Compared with MAX6816EPA+ and TPS3808G33DBVR, ADM13305-33ARZ-RL7 uniquely delivers integrated dual-rail monitoring, push-pull dual-reset outputs, and watchdog timer in a standard SOIC-8 - making it irreplaceable for applications requiring coordinated supervision of 5 V and 3.3 V domains with autonomous recovery.
Availability
ADM13305-33ARZ-RL7 is available at Aetrix Electronics and suitable for industrial PLC controllers, notebook power sequencing, wireless baseband modules, and industrial data acquisition nodes requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ADM13305-33ARZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, serving industrial, automotive, communications, and healthcare markets.
The ADM13305 family was engineered specifically for robust dual-rail power supervision in DSP and microcontroller systems - emphasizing precision threshold accuracy, low power, wide temperature operation, and integrated watchdog reliability.
FAQ
What is the exact undervoltage threshold for each sense input on the ADM13305-33ARZ-RL7?
The ADM13305-33ARZ-RL7 has factory-trimmed thresholds: SENSE1 (pin 1) is set to 4.55 V typical falling threshold (VIT−), with range 4.46–4.67 V over −40°C to +85°C; SENSE2 (pin 2) is set to 2.93 V typical (VIT−), with range 2.86–3.02 V. These values are fixed and do not require external resistors.
Does the ADM13305-33ARZ-RL7 support operation below 3.3 V VDD?
Yes, the ADM13305-33ARZ-RL7 operates from 2.7 V to 5.5 V VDD. Its internal circuitry remains functional and RESET outputs are guaranteed valid down to VDD ≥ 1.1 V - enabling reliable reset assertion even during deep brownout conditions before full rail stabilization.
Can the watchdog timer in ADM13305-33ARZ-RL7 be disabled?
Yes, the watchdog timer in ADM13305-33ARZ-RL7 is disabled by leaving the WDI (pin 3) floating. When actively used, WDI must be toggled (low-to-high or high-to-low) at least once every ~1.6 sec to prevent timeout and reset assertion - providing fail-safe recovery from firmware hangs.
What is the reset timeout duration for ADM13305-33ARZ-RL7, and is it adjustable?
The ADM13305-33ARZ-RL7 features a fixed reset timeout of 140 ms minimum (200 ms typical, 280 ms maximum), determined by internal RC timing. This duration is not user-adjustable and ensures sufficient hold time for processor initialization across voltage and temperature variations.
How does the manual reset (MR) input behave on ADM13305-33ARZ-RL7?
The MR input (pin 7) is active-low: driving MR low asserts both RESET and RESET outputs. After MR returns high, reset remains asserted for the full timeout period (140–280 ms) before deassertion - ensuring clean, debounced reset pulses without external timing components.
ADM13305-33ARZ-RL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 2.93V, 4.55V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
ADM13305-33ARZ-RL7 FAQ
1.How can I place an order for ADM13305-33ARZ-RL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM13305-33ARZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM13305-33ARZ-RL7 reliable?
The price and inventory of ADM13305-33ARZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM13305-33ARZ-RL7 is usually 5 days.
3.What payment methods are accepted for ADM13305-33ARZ-RL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM13305-33ARZ-RL7 transactions.
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ADM13305-33ARZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM13305-33ARZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM13305-33ARZ-RL7?
For technical support, including ADM13305-33ARZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM13305-33ARZ-RL7 requirements.
6.How does Aetrix verify that ADM13305-33ARZ-RL7 is sourced from the original manufacturer or authorized distributors?
All ADM13305-33ARZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM13305-33ARZ-RL7 meets industry standards.
7.What is the process for return or replacement of ADM13305-33ARZ-RL7?
All ADM13305-33ARZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADM13305-33ARZ-RL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM13305-33ARZ-RL7 part is unused and in its original packaging.
Return procedure for ADM13305-33ARZ-RL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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