Analog Devices Inc. ADM693AR
- Part No.:
- ADM693AR
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
ADM693AR.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,174
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM693AR from Analog Devices is a 16-pin SOIC microprocessor supervisory circuit providing precision reset generation (4.4 V threshold), adjustable watchdog timeout (100 ms / 1.6 s / user-configurable), automatic battery backup switchover, CE signal gating (5 ns propagation), and power-fail warning (1.3 V PFI comparator). It operates across –40°C to +85°C and supports CMOS RAM protection in industrial control and embedded systems.
For engineers reviewing the ADM693AR datasheet, ADM693AR pinout, ADM693AR application, or ADM693AR equivalent, this page delivers verified functional specifications, validated package mapping (R-16 SOIC), confirmed pin roles, real-world use scenarios, and two technically documented alternative parts for system-level power monitoring and fail-safe design.
Technical Context
The ADM693AR integrates a precision voltage detector (4.25–4.48 V reset threshold), dual-mode watchdog timer (internal oscillator or external clock/capacitor), and bidirectional battery switchover circuit with 70 mV turn-on and 50 mV turn-off thresholds. Its CEIN/CEOUT path provides sub-10 ns gating of memory enable signals during brownout.
It features three independent logic outputs-RESET (active low), RESET (active high), and WDO-with guaranteed operation down to VCC = 1 V, plus a dedicated BATT ON driver capable of sinking 35 mA to control external PNP pass transistors for >100 mA backup current delivery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.4 V nominal (guaranteed 4.25–4.48 V); compatible with ±10% 5 V supplies. |
| Reset Pulse Width | 50 ms typical (adjustable via OSC IN/OSC SEL); ensures stable µP initialization after power-up. |
| Watchdog Timeout | 100 ms (short) or 1.6 s (long); configurable via OSC SEL/OSC IN; long period auto-applies post-reset. |
| Battery Switchover | VCC-to-VBATT transition at 70 mV (rising), 50 mV (falling); 20 mV hysteresis prevents chatter during slow droop. |
| VOUT Drive Capability | 100 mA max at VCC–VOUT ≤ 0.5 V; enables direct CMOS RAM supply without external pass devices. |
| CE Gating Delay | 5 ns typical; isolates memory write paths during VCC instability while preserving timing-critical access. |
| Supply Current (Active) | 1.95 mA max at 100 mA load; low quiescent draw supports energy-sensitive designs. |
| Standby Current (Battery Mode) | 1 µA max; preserves backup battery life during extended VCC loss. |
Pinout & Package
ADM693AR is housed in a 16-lead SOIC package (R-16), RoHS-compliant, with 1.27 mm lead pitch and standard JEDEC MS-013AC outline.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return for all analog/digital functions; must be low-impedance connection. |
| VBATT | Backup battery input | Accepts 2.0–4.0 V source; internally compared to VCC to trigger switchover. |
| VOUT | Switched output | Delivers VCC or VBATT (whichever higher) to RAM; rated for 100 mA continuous. |
| PFI | Power fail input | Noninverting comparator input referenced to 1.3 V; triggers PFO low when <1.25 V. |
| PFO | Power fail output | Active-low interrupt signal; used to initiate controlled shutdown before VCC collapse. |
| WDO | Watchdog output | Active-low status flag indicating watchdog timeout; resets on next WDI transition. |
| VCC | Main supply input | +5 V nominal (4.5–5.5 V range); powers internal logic and enables VOUT switching. |
| RESET | Active-low reset | Drives µP /RESET pin; asserted for ≥50 ms after VCC recovery or watchdog fault. |
| BATT ON | Battery active indicator | Open-drain output sinks 35 mA; directly drives base of external PNP for >100 mA VOUT. |
| LOW LINE | Low-voltage status | Active-low signal tracking VCC vs. reset threshold; faster response than RESET. |
| OSC IN | Oscillator input | Accepts external clock (0–250 kHz) or capacitor (47 pF typical) to set reset/watchdog timing. |
| OSC SEL | Oscillator mode select | High/floating = internal oscillator; low = external clock/capacitor mode. |
| RESET | Active-high reset | Inverted complement of RESET; interfaces directly with processors requiring active-high reset. |
| CEIN | Chip enable input | Logic input gated to CEOUT; forced high during brownout to prevent memory writes. |
| CEOUT | Gated chip enable | Buffered CEIN with 5 ns delay; asserts high when VCC drops below reset threshold. |
| WDI | Watchdog input | Three-level input (low/mid/high); toggling required within timeout to prevent reset assertion. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable reset & watchdog timing | Configurable via OSC SEL/OSC IN to support diverse µP boot sequences and watchdog service intervals. |
| True dual-supply switchover | Automatic VCC/VBATT selection with 20 mV hysteresis ensures glitch-free RAM retention during power transitions. |
| Integrated CE gating | 5 ns propagation delay and forced-high behavior during brownout prevent corrupted memory writes under marginal VCC. |
| Dual reset outputs | Simultaneous active-low RESET and active-high RESET eliminate need for external inverters in mixed-logic systems. |
| Low-power battery mode | 0.6–1.0 µA supply current with VCC = 0 V and VBATT = 2.8 V extends backup runtime in long-downtime applications. |
| Robust watchdog disable | WDI floating or biased to ~1.9 V (38% VCC) disables timer-no external pull-up/down required for safe default state. |
Applications
| Industrial PLC Controller | Automotive Telematics Module |
|---|---|
Use Scenario: Maintains SRAM integrity during engine cranking-induced 5 V rail sag (down to 3.5 V) and recovers cleanly after restart. IC Role / Device Role / Timing Role: Supervisory IC providing brownout reset, battery-backed RAM switchover, and early power-fail warning via PFI/PFO. Use Value: Prevents firmware corruption by holding µP in reset until VCC stabilizes above 4.25 V and enabling safe data save via PFO-triggered NMI. |
Use Scenario: Powers GPS/Bluetooth memory during ignition-off battery drain while preserving configuration and last-known position. IC Role / Device Role / Timing Role: Battery management supervisor with 2.0–4.0 V VBATT compatibility, low standby current, and BATT ON-driven PNP boost. Use Value: Extends backup runtime beyond 72 hours using 3.6 V Li-ion cell, enabled by 1 µA battery-mode quiescent draw. |
| Medical Infusion Pump | Point-of-Sale Terminal |
Use Scenario: Guarantees deterministic reset behavior during AC line interruption, ensuring therapy suspension and audit-log preservation. IC Role / Device Role / Timing Role: Safety-critical reset generator with 1 V minimum VCC operation and 50 ms reset pulse for fail-safe µP halt. Use Value: Meets IEC 62304 Class C requirements via guaranteed reset assertion down to 1 V and no spurious release during slow VCC decay. |
Use Scenario: Protects transaction logs and encryption keys stored in battery-backed SRAM during brief utility outages or UPS switchover delays. IC Role / Device Role / Timing Role: Dual-role supervisor: reset generator (4.4 V threshold) and memory write protector (CEIN/CEOUT gating). Use Value: Eliminates need for discrete CE buffer and reset conditioner, reducing BOM count and PCB area in space-constrained terminals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX693CPD+ | Pin-compatible 16-pin DIP; 4.40 V reset threshold; fixed 100 ms/1.6 s watchdog; no CE gating or OSC IN adjustability. | Lacks CEIN/CEOUT and adjustable reset timing; suitable only where basic reset + watchdog suffices. | Select MAX693CPD+ only if DIP packaging and absence of memory protection are acceptable. |
| TPS3823MPW | 3-pin SOT-23; single 4.4 V reset output; no battery switchover, watchdog, or PFI; 1.6 µA IQ. | Minimalist reset monitor only; cannot replace ADM693AR's multi-function integration in RAM-backed systems. | Choose TPS3823MPW solely for cost-sensitive, non-backup applications requiring only reset assertion. |
Compared with MAX693CPD+, ADM693AR adds CE gating, adjustable timing, and BATT ON drive; versus TPS3823MPW, it delivers full supervisory functionality-including battery control, watchdog, and dual reset outputs-in a single IC, eliminating six discrete components in typical implementations.
Availability
ADM693AR is available at Aetrix Electronics and suitable for industrial automation, automotive telematics, medical device, and point-of-sale terminal applications requiring stable component supply, long-term lifecycle support, and guaranteed parametric compliance over –40°C to +85°C.
Supply support for ADM693AR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The ADM690–ADM695 family was engineered specifically for robust, integrated power supervision in microprocessor-based systems-delivering reset, watchdog, battery switchover, memory protection, and power-fail warning in one monolithic solution.
FAQ
What is the guaranteed reset voltage threshold range for ADM693AR?
The ADM693AR has a guaranteed reset voltage threshold range of 4.25 V to 4.48 V at +25°C, with typical value 4.4 V. This specification ensures reliable operation with ±10% 5 V supplies and remains valid across the full –40°C to +85°C temperature range per the datasheet's industrial-grade characterization.
Does ADM693AR support adjustable reset pulse width, and how is it configured?
Yes, ADM693AR supports adjustable reset pulse width via OSC SEL and OSC IN pins. With OSC SEL high or floating, reset time is fixed at 50 ms; with OSC SEL low, an external capacitor on OSC IN sets reset width as 130 ms × C/47 pF (typical), enabling precise tuning for specific µP initialization requirements.
Can ADM693AR drive external PNP transistors for enhanced backup current, and which pin enables this?
Yes, ADM693AR can drive external PNP transistors using its BATT ON output pin, which sinks up to 35 mA. When VOUT switches to VBATT, BATT ON goes high, directly biasing the base of a PNP pass transistor to extend backup current beyond the internal 100 mA limit-enabling robust RAM retention in high-leakage systems.
What happens to CEOUT during a brownout condition on ADM693AR?
During brownout-when VCC falls below the 4.25–4.48 V reset threshold-ADM693AR forces CEOUT high regardless of CEIN state. This action disables memory writes by asserting chip enable high on battery-backed SRAM, preventing data corruption while maintaining VOUT power from VBATT.
Is ADM693AR compatible with rechargeable lithium backup batteries, and what charging current does it provide?
Yes, ADM693AR is compatible with rechargeable lithium backup batteries. It sources a safe, self-regulating charging current of ≤0.1 µA from VBATT, well within the maximum recommended charge rate for even small Li coin cells-ensuring long-term battery health without external current-limiting components.
ADM693AR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.4V
- Output:
- Open Drain, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 35ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
ADM693AR FAQ
1.How can I place an order for ADM693AR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM693AR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM693AR reliable?
The price and inventory of ADM693AR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM693AR is usually 5 days.
3.What payment methods are accepted for ADM693AR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM693AR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM693AR?
ADM693AR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM693AR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM693AR?
For technical support, including ADM693AR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM693AR requirements.
6.How does Aetrix verify that ADM693AR is sourced from the original manufacturer or authorized distributors?
All ADM693AR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM693AR meets industry standards.
7.What is the process for return or replacement of ADM693AR?
All ADM693AR units undergo pre-shipment inspection (PSI). If there is an issue with ADM693AR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM693AR part is unused and in its original packaging.
Return procedure for ADM693AR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM693AR Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

