Analog Devices Inc. ADM696AQ

Overview

ADM696AQ from Analog Devices is a microprocessor supervisory circuit integrating power-on/brownout reset, battery backup switchover, watchdog timer, low-line detection, and power-fail warning in a single 16-pin CERDIP package. It asserts RESET down to 1 V VCC, provides 100 mA VOUT drive with <50 mV dropout, and supports 100 ms or 1.6 s watchdog timeout. Used in industrial controllers for reliable power monitoring and RAM retention during outages.

For engineers reviewing the ADM696AQ datasheet, ADM696AQ pinout, ADM696AQ application, or ADM696AQ equivalent, key selection considerations include its guaranteed reset operation at 1 V VCC, automatic VBATT/VCC switchover with 70 mV turn-on hysteresis, 600 nA standby current in battery-backup mode, and dual-mode watchdog (internal oscillator or external clock/capacitor).

Technical Context

The ADM696AQ implements a dual-threshold comparator architecture for LLIN (1.3 V ±50 mV) and PFI (1.3 V ±50 mV), each with independent outputs (LOW LINE, PFO). Its reset generator uses an internal timebase with adjustable delay (35–70 ms) via OSC SEL/OSC IN configuration, and guarantees active-low RESET assertion even when VCC drops to 1 V.

The battery switchover circuit employs PMOS and NMOS switches: a 1.5 Ω on-resistance internal PMOS delivers up to 100 mA from VCC to VOUT, while a 20 Ω MOSFET enables low-dropout VBATT-to-VOUT switching during backup. BATT ON output drives external PNP transistors for >100 mA loads.

Key Specifications

Pinout & Package

ADM696AQ is housed in a 16-lead hermetically sealed ceramic DIP (Q-16) package rated for –40°C to +85°C operation. Pin layout matches industry-standard 16-pin DIP footprint with 0.3-inch width.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX696CPE+ and TPS3823MPW, the ADM696AQ uniquely combines sub-2 V reset guarantee, integrated battery switchover, and configurable watchdog in one Q-16 package-enabling single-chip power integrity for safety-critical embedded systems without layout or BOM expansion.

Availability

ADM696AQ is available at Aetrix Electronics and suitable for industrial PLCs, automotive telematics units, medical infusion pumps, and ANSI-compliant energy meters requiring stable component supply across extended temperature ranges.

Supply support for ADM696AQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and automotive markets since 1965.

The ADM696AQ belongs to Analog Devices' microprocessor supervisory product line, engineered specifically for fault-tolerant power monitoring in harsh environments where guaranteed reset, battery-backed memory retention, and watchdog supervision are mandatory.

FAQ

What is the minimum VCC voltage at which ADM696AQ guarantees RESET assertion?

The ADM696AQ guarantees active-low RESET assertion down to 1 V VCC, as verified in the Absolute Maximum Ratings and Electrical Characteristics tables. This ensures the microprocessor remains held in reset during severe brownout conditions where other supervisory ICs (e.g., MAX696) would release reset prematurely. The ADM696AQ maintains this specification across its full –40°C to +85°C operating range, making it suitable for applications with unstable or marginally regulated supplies.

How does ADM696AQ handle battery switchover during power failure?

The ADM696AQ automatically switches VOUT from VCC to VBATT when VCC falls 50 mV below VBATT (power-down threshold), and reverts to VCC when VCC rises 70 mV above VBATT (power-up threshold), providing 20 mV hysteresis to prevent oscillation. During switchover, BATT ON goes high to indicate battery mode, and VOUT sustains up to 100 mA with ≤50 mV dropout. In battery-backup mode, supply current drops to 0.6 µA typical, preserving backup source life.

Can ADM696AQ's watchdog timer be disabled, and how?

Yes, the ADM696AQ watchdog timer is disabled when WDI is left floating or driven to midsupply (~38% of VCC), as stated in the PIN FUNCTION DESCRIPTION. This occurs because WDI is a three-level input with internal bias; floating or mid-rail conditions disconnect it from the timer circuit. Driving WDI externally to VCC/2 (e.g., via resistor divider) achieves the same effect. No configuration register or command is needed-disabling is purely analog and hardware-based.

What is the function of the dual RESET outputs on ADM696AQ?

The ADM696AQ provides two complementary reset outputs: pin 15 (RESET, active-low) and pin 16 (RESET, active-high). This eliminates the need for external inverters when interfacing with microprocessors that require opposite reset polarities-for example, ARM Cortex-M series (active-low) alongside legacy 8051 derivatives (active-high). Both outputs are synchronized and asserted simultaneously during any reset event (LLIN drop, watchdog timeout, or power-up).

Does ADM696AQ support external timing components, and if so, how?

Yes, ADM696AQ supports external timing via OSC IN and OSC SEL pins. With OSC SEL low, OSC IN accepts either an external clock (0–250 kHz) or a capacitor to ground (e.g., 47 pF for 1.6 s timeout). The oscillator frequency scales linearly with capacitance: F_OSC ≈ 184,000 / C(pF). This enables precise adjustment of both reset delay and watchdog timeout beyond the fixed 100 ms/1.6 s options, supporting custom timing requirements without firmware changes.