Analog Devices Inc. ADM696AR

Overview

ADM696AR from Analog Devices is a microprocessor supervisory circuit integrating power-on/brownout reset, battery backup switchover, watchdog timer, low-line detection, and power-fail warning in a single 16-pin SOIC package. It asserts RESET down to 1 V VCC, provides 100 mA VOUT drive with <50 mV dropout, supports adjustable 50 ms–1.6 s reset timeout and 100 ms/1.6 s watchdog periods, and enables automatic VBATT-to-VOUT switching when VCC falls below VBATT by 50 mV - used in industrial controllers for reliable RAM retention during AC loss.

For engineers reviewing the ADM696AR datasheet, ADM696AR pinout, ADM696AR application, or ADM696AR equivalent, this page delivers verified functional identity, exact pin roles, temperature-rated timing specs (–40°C to +85°C), battery switchover hysteresis (20 mV), and real-world design meaning for reset assertion, watchdog transition detection, and PFI/PFO comparator behavior - all confirmed from Analog Devices' official ADM696/ADM697 Rev. 0 datasheet.

Technical Context

The ADM696AR implements dual independent comparators: one for LLIN (1.3 V threshold, 12 mV hysteresis) driving RESET/LOW LINE, and another for PFI (1.3 V threshold, ±15 mV tolerance vs. LLIN) driving PFO. Its watchdog uses a three-level WDI input (internally biased to 38% VCC, ~125 kΩ impedance) that resets on any high/low transition - not level-hold - enabling robust stall detection.

Reset generation combines analog threshold sensing with a digital timer: RESET remains active for 50 ms after LLIN rises above 1.3 V, and the internal oscillator (10.24 kHz nominal) or external capacitor/clock sets both reset delay and watchdog timeout. Battery switchover employs PMOS pass transistors with 1.5 Ω on-resistance (VCC→VOUT) and 20 Ω (VBATT→VOUT), with BATT ON providing 7 mA sink capability to drive external PNP boost transistors.

Key Specifications

Pinout & Package

ADM696AR is housed in a 16-pin SOIC (R-16) package with 1.27 mm pitch, 10.3 mm × 7.5 mm body size, and exposed pad optional per Analog Devices' R-16 mechanical drawings.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX696CPE+, ADM696AR delivers 67% lower battery-mode current and integrated BATT ON drive; versus TPS3823DBVR, it provides full supervisory functionality - making ADM696AR the sole choice when battery switchover, adjustable watchdog, and dual-comparator monitoring are required.

Availability

ADM696AR is available at Aetrix Electronics and suitable for industrial controllers, automotive body electronics, medical infusion pumps, and smart energy meters requiring stable component supply across extended temperature ranges (–40°C to +85°C) and long-term lifecycle support.

Supply support for ADM696AR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, industrial automation, and reliable power management.

The ADM696AR belongs to Analog Devices' microprocessor supervisory IC product line, designed specifically to consolidate reset generation, battery backup control, watchdog supervision, and power-fail warning into a single IC for mission-critical embedded systems.

FAQ

What is the minimum VCC voltage at which ADM696AR guarantees RESET assertion?

ADM696AR guarantees active-low RESET output down to VCC = 1 V, as specified in the Absolute Maximum Ratings and confirmed in the RESET Output Voltage test condition (ISINK = 10 µA, VCC = 1 V). This ensures the microprocessor remains held in reset during deep brownout conditions where other supervisory ICs may release prematurely - a critical requirement for data integrity in battery-backed systems.

How does ADM696AR handle battery switchover hysteresis, and why is it important?

ADM696AR uses 70 mV hysteresis on power-up (VCC rising above VBATT) and 50 mV on power-down (VCC falling below VBATT), resulting in 20 mV total hysteresis. This prevents rapid on/off cycling of the VOUT switch when VCC decays slowly near the battery voltage - a common cause of RAM corruption in systems with marginal power supplies or aging batteries.

Can ADM696AR drive more than 100 mA on VOUT, and if so, how?

Yes - ADM696AR supports >100 mA VOUT drive using its BATT ON output (Pin 5) to directly drive the base of an external PNP transistor. The internal PMOS switch delivers up to 100 mA; adding an external PNP bypasses this limit while maintaining low dropout. Application Figure 14 in the datasheet shows the exact circuit, including recommended base resistor values and capacitor placement.

What is the function of the WDI pin on ADM696AR, and how should it be driven?

WDI is a three-level watchdog input internally biased to 38% of VCC (~1.9 V at 5 V). It detects transitions (high-to-low or low-to-high), not static levels - meaning software must toggle the pin within the selected timeout period (100 ms or 1.6 s) to prevent RESET. Leaving WDI floating disables the watchdog, while driving it to mid-supply (~2.5 V) also disables it safely.

Does ADM696AR support external timing components, and what are the options?

Yes - ADM696AR supports two external timing methods: (1) Connect a capacitor (e.g., 47 pF) between OSC IN (Pin 7) and GND to set oscillator frequency per F_OSC = 184,000/C(pF); (2) Drive OSC IN with an external clock (0–250 kHz) when OSC SEL (Pin 8) is low. Both methods adjust both reset delay and watchdog timeout simultaneously, enabling precise system-level timing calibration.