Analog Devices Inc. ADM705ARZ
- Part No.:
- ADM705ARZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
ADM705ARZ.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:975
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM705ARZ from Analog Devices is a low-cost microprocessor supervisory circuit with precision 4.65 V supply voltage monitoring, 200 ms reset pulse width, and integrated watchdog timer (1.60 s timeout). It guarantees valid RESET output down to VCC = 1 V and features debounced TTL/CMOS manual reset input (MR), making it suitable for reliable power-up sequencing and brownout protection in 5 V embedded systems.
For engineers reviewing the ADM705ARZ datasheet, ADM705ARZ pinout, ADM705ARZ application, or ADM705ARZ equivalent, key selection criteria include reset threshold accuracy (4.65 V ±150 mV), guaranteed operation below 1 V VCC, watchdog timeout tolerance (±0.6 s), and SOIC-8 package compatibility with industrial temperature range (−40°C to +85°C).
Technical Context
The ADM705ARZ implements a dual-function supervisory architecture: a precision bandgap-based voltage monitor triggers active-low RESET during power-up, power-down, or brownout when VCC falls below 4.65 V, and an independent watchdog timer monitors WDI transitions with 1.60 s timeout. Both functions operate with VCC as low as 1 V, ensuring deterministic behavior across full supply collapse.
It integrates a 1.25 V power-fail comparator (PFI/PFO) for secondary supply monitoring and includes internal 250 µA MR pull-up current with 150 ns minimum MR pulse width. The device uses no external components for basic reset generation and supports bidirectional reset line interfacing via series current-limiting resistor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.65 V ±150 mV - ensures reliable reset assertion before 5 V system logic fails. |
| Reset Pulse Width | 200 ms typical - provides sufficient time for microprocessor stabilization after power-on. |
| Supply Current | 190 µA typical - enables low-power operation in battery-backed or energy-sensitive applications. |
| Watchdog Timeout | 1.60 s ±0.6 s - defines maximum software execution window before system-level fault detection. |
| VCC Validity Range | 1.0 V to 5.5 V - guarantees functional RESET output even during deep brownout or partial power loss. |
| MR Input Threshold | Logic Low ≤0.8 V, Logic High ≥2.0 V - ensures robust TTL/CMOS compatibility and noise immunity. |
| PFI Threshold | 1.25 V ±50 mV - enables accurate secondary supply or battery voltage monitoring via resistive divider. |
Pinout & Package
ADM705ARZ is housed in an 8-lead standard small outline IC (SOIC_N) package per JEDEC MS-012-AA, with 1.27 mm pitch, 4.90 mm × 3.90 mm body, and 1.75 mm height. Pin 1 is marked with a notch or dot; device orientation follows standard SOIC top-view convention.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (MR) | Manual Reset Input | Debounced TTL/CMOS-compatible input; internally pulled up with 250 µA; asserts RESET when driven below 0.8 V. |
| 2 (VCC) | Power Supply Input | 5 V nominal supply rail; requires 0.1 µF decoupling capacitor to GND for noise immunity. |
| 3 (GND) | Ground Reference | 0 V return path for all analog and digital functions; must be connected to system ground plane. |
| 4 (PFI) | Power Fail Input | Noninverting input to 1.25 V comparator; monitors auxiliary supply/battery via resistive divider. |
| 5 (PFO) | Power Fail Output | Active-low open-drain output signaling PFI < 1.25 V; sinks up to 3.2 mA. |
| 6 (WDI) | Watchdog Input | Three-level input (low/high/floating); resets 1.60 s timer on each transition; disabled if left floating. |
| 7 (RESET) | Reset Output | Active-low push-pull output; holds low for 200 ms after VCC rise or MR release; valid down to 1 V VCC. |
| 8 (WDO) | Watchdog Output | Active-low open-drain output; goes low on WDI timeout or VCC < 4.65 V; can drive NMI or MR. |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed RESET at 1 V VCC | Ensures fail-safe microprocessor hold condition during complete power collapse, eliminating need for external reset supervisor backup. |
| Integrated Watchdog Timer | 1.60 s timeout with edge-triggered WDI eliminates requirement for external timing RC network or dedicated watchdog IC. |
| Power-Fail Comparator (PFI/PFO) | 1.25 V reference enables early warning of supply degradation or battery depletion without adding discrete comparator circuitry. |
| Debounced Manual Reset Input | Internal 200 ms debounce eliminates need for external RC filter or firmware debouncing logic on MR switch inputs. |
| Industrial Temperature Range | −40°C to +85°C operation supports deployment in automotive control units, industrial PLCs, and outdoor embedded equipment. |
Applications
| Microprocessor Power-Up Sequencing | Embedded System Brownout Recovery |
|---|---|
Use Scenario: Ensuring deterministic boot sequence in 5 V microcontroller-based data loggers after cold start or battery insertion. IC Role / Device Role / Timing Role: Generates 200 ms active-low RESET pulse synchronized to VCC crossing 4.65 V threshold, holding CPU in reset until stable supply is confirmed. Use Value: Prevents corrupted firmware execution by guaranteeing minimum 200 ms reset assertion time regardless of VCC ramp rate or noise. | Use Scenario: Maintaining system integrity during transient grid dips or battery voltage sag in smart metering hardware. IC Role / Device Role / Timing Role: Monitors VCC continuously; asserts RESET immediately upon drop below 4.65 V and sustains it until VCC recovers and remains above threshold for 200 ms. Use Value: Guarantees valid RESET output down to 1 V VCC, enabling controlled shutdown before logic state corruption occurs. |
| Watchdog-Based Firmware Fault Detection | Secondary Supply Monitoring |
Use Scenario: Detecting infinite loops or stalled code in HVAC controller firmware running on ARM Cortex-M0+. IC Role / Device Role / Timing Role: Receives periodic WDI toggles from GPIO; triggers WDO low after 1.60 s of inactivity, which can be routed to NMI or MR. Use Value: Provides hardware-enforced recovery path independent of software stack, reducing risk of undetected lockup in safety-critical environments. | Use Scenario: Monitoring 12 V DC input to isolated DC-DC converter in industrial gateway using resistive divider on PFI. IC Role / Device Role / Timing Role: Compares divided 12 V signal against internal 1.25 V reference; asserts PFO low when input drops below 8 V (configurable trip point). Use Value: Enables preemptive shutdown or alert generation before main 5 V rail collapses, extending system operational margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX705CSA+ | 4.65 V reset threshold, 200 ms timeout, SOIC-8, but lacks PFI/PFO comparator and WDI/WDO watchdog interface. | Suitable only for basic reset supervision; cannot support power-fail warning or firmware watchdog functionality. | Select when only primary VCC monitoring is required and secondary supply monitoring or watchdog is handled externally. |
| TPS3808G18DBVR | 1.8 V fixed reset threshold, adjustable watchdog timeout (1.25 ms–10 s), SOT-23-6, no PFI/PFO, no manual reset input. | Designed for low-voltage microcontrollers (1.8–5.5 V); incompatible pinout and feature set for 5 V legacy designs requiring MR or PFI. | Choose for new ultra-low-power designs with 1.8–3.3 V supplies where compact size and programmable timeout outweigh need for MR/PFI. |
Compared with MAX705CSA+ and TPS3808G18DBVR, the ADM705ARZ uniquely combines 4.65 V precision reset, integrated watchdog, power-fail comparator, and manual reset in a single SOIC-8 package-enabling full supervisory functionality without external components in 5 V systems.
Availability
ADM705ARZ is available at Aetrix Electronics and suitable for microprocessor power-up sequencing, embedded system brownout recovery, watchdog-based firmware fault detection, and secondary supply monitoring requiring stable component supply across industrial temperature range and long-term production cycles.
Supply support for ADM705ARZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADM705/ADM706 family was designed specifically for cost-sensitive 5 V microprocessor supervisory applications requiring guaranteed reset validity down to 1 V, integrated watchdog, and power-fail warning capability in compact SOIC or PDIP packages.
FAQ
What is the reset threshold voltage for ADM705ARZ and how tightly is it specified?
The ADM705ARZ has a nominal reset threshold of 4.65 V, with a guaranteed range of 4.50 V to 4.75 V over full temperature and supply conditions. This tight specification ensures consistent reset assertion timing across 5 V systems, preventing premature release or delayed activation that could cause boot failures. The ADM705ARZ maintains this threshold accuracy without requiring external calibration or trimming components.
Does ADM705ARZ support operation below 5 V, and what is the minimum functional VCC?
Yes, ADM705ARZ operates from VCC = 1.0 V to 5.5 V and guarantees valid RESET output down to 1.0 V. At 1.0 V, the RESET output remains functional (low) with sink capability of 50 µA, enabling safe microprocessor hold during deep brownout. This capability is intrinsic to the ADM705ARZ design and does not require external pull-down resistors for basic operation.
How does the watchdog timer in ADM705ARZ function, and what is its timeout period?
ADM705ARZ incorporates an independent watchdog timer with a nominal timeout of 1.60 seconds. It resets on any transition (high-to-low or low-to-high) at the WDI pin and asserts WDO low if no transition occurs within the timeout window. The timer also clears automatically when RESET is asserted. This allows firmware to maintain system liveness by toggling WDI periodically, with ADM705ARZ providing hardware-enforced recovery if software stalls.
Can ADM705ARZ monitor a second power supply, and how is that implemented?
Yes, ADM705ARZ includes a dedicated power-fail comparator with PFI and PFO pins. By connecting a resistive divider from a secondary supply (e.g., 12 V) to PFI, the internal 1.25 V reference detects when the divided voltage falls below threshold, causing PFO to go low. This enables early warning of supply degradation or battery depletion without additional ICs. The ADM705ARZ datasheet provides design equations for hysteresis and noise immunity in this configuration.
What package type and RoHS status does ADM705ARZ have?
ADM705ARZ is supplied in an 8-lead standard small outline package (SOIC_N, JEDEC MS-012-AA), with lead pitch of 1.27 mm and body dimensions of 4.90 mm × 3.90 mm. The "Z" suffix confirms full RoHS compliance per EU Directive 2011/65/EU, including exemption 7a for lead in high-melting-temperature solder. This package is compatible with standard surface-mount assembly processes and reflow profiles.
ADM705ARZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active Low
- Reset Timeout:
- 160ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
ADM705ARZ FAQ
1.How can I place an order for ADM705ARZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM705ARZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM705ARZ reliable?
The price and inventory of ADM705ARZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM705ARZ is usually 5 days.
3.What payment methods are accepted for ADM705ARZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM705ARZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM705ARZ?
ADM705ARZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM705ARZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM705ARZ?
For technical support, including ADM705ARZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM705ARZ requirements.
6.How does Aetrix verify that ADM705ARZ is sourced from the original manufacturer or authorized distributors?
All ADM705ARZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM705ARZ meets industry standards.
7.What is the process for return or replacement of ADM705ARZ?
All ADM705ARZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM705ARZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM705ARZ part is unused and in its original packaging.
Return procedure for ADM705ARZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM705ARZ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

