Analog Devices Inc. ADM706TAR

Overview

ADM706TAR from Analog Devices is a 3.08 V precision microprocessor supervisory circuit in an 8-lead SOIC package, providing active-low reset output, 200 ms reset pulse width, 1.6 sec watchdog timeout, and 1.25 V power-fail comparator for 3 V/3.3 V systems. It ensures reliable power-on, brownout, and software fault recovery in embedded controllers.

For engineers reviewing the ADM706TAR datasheet, ADM706TAR pinout, ADM706TAR application, or ADM706TAR equivalent, key selection criteria include reset threshold accuracy (3.08 V ±75 mV), guaranteed RESET validity down to VCC = 1 V, debounced manual reset input, independent watchdog monitoring, and compatibility with TTL/CMOS logic interfaces.

Technical Context

The ADM706TAR integrates a precision voltage monitor with 3.08 V reset threshold and 20 mV hysteresis, a 1.6 sec watchdog timer cleared by WDI transitions, and a dedicated 1.25 V reference-based power-fail comparator (PFI/PFO). Its internal 70 µA MR pull-up enables direct switch interfacing without external biasing.

Reset assertion is triggered by VCC falling below 3.08 V or MR low, holding RESET low for 200 ms after recovery; WDO asserts low on watchdog timeout or VCC undervoltage, and PFO asserts low when PFI drops below 1.25 V - all outputs remain functional down to VCC = 1 V.

Key Specifications

Pinout & Package

ADM706TAR is housed in an 8-lead narrow SOIC (R-8) package per JEDEC MS-012-AA, with 1.27 mm lead pitch and 5.00 mm × 4.00 mm body dimensions. Pin 1 is marked by a beveled corner or dot.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX706TCSA+ and TPS3808G33DBVR, ADM706TAR uniquely combines precision 3.08 V reset, 1.6 s watchdog, and 1.25 V power-fail comparator in one SOIC-8 device - enabling compact, feature-complete supervision without external components.

Availability

ADM706TAR is available at Aetrix Electronics and suitable for industrial PLCs, portable medical instruments, communications baseband processors, and automotive body control modules requiring stable component supply and long-term lifecycle support.

Supply support for ADM706TAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.

The ADM706 family targets microprocessor supervisory functions in space-constrained, reliability-critical embedded systems - delivering integrated reset, watchdog, and power-fail monitoring with minimal external components.

FAQ

What is the exact reset threshold voltage of the ADM706TAR and how tightly is it specified?

The ADM706TAR has a nominal reset threshold of 3.08 V, with a guaranteed range of 3.00 V to 3.15 V over temperature and supply variations. This specification ensures precise supervision of 3.3 V power rails without requiring calibration or trimming. The 75 mV total tolerance supports robust design margins in noisy industrial environments. All ADM706TAR units meet this spec per Analog Devices Rev. E datasheet Table 1.

Does the ADM706TAR support operation down to 1 V supply voltage, and what happens to RESET output below that?

Yes, the ADM706TAR guarantees valid RESET output down to VCC = 1 V - meaning RESET remains actively driven low during brownout recovery. Below 1 V, internal drive capability diminishes; RESET voltage rises above 0.3 V and is no longer guaranteed. For applications requiring forced low state below 1 V, a 10 kΩ external pull-down resistor on the RESET pin is recommended per Figure 19 in the ADM706TAR datasheet.

How does the watchdog timer in the ADM706TAR interact with the reset generator and manual reset input?

The ADM706TAR watchdog timer operates independently: WDO asserts low on timeout but does not trigger RESET unless externally wired from WDO to MR. Manual reset (MR) directly initiates a 200 ms RESET pulse and clears the watchdog counter. During VCC undervoltage, both RESET and WDO are forced low regardless of timer state. This separation ensures fault isolation - a software hang won't corrupt power-on reset behavior.

Can the ADM706TAR monitor a second power supply, and how is the PFI input configured for that purpose?

Yes, the ADM706TAR's PFI input can monitor a secondary supply using a two-resistor voltage divider. Select R1 and R2 so that PFI voltage falls below 1.25 V when the monitored supply reaches its minimum acceptable level (e.g., 3.0 V for a 3.3 V rail). PFO can then drive MR to generate system reset, or feed an interrupt. The 1.25 V reference is stable and temperature-compensated, enabling accurate multi-rail supervision without additional ICs.

What package type and lead count does the ADM706TAR use, and are there thermal limitations to consider?

The ADM706TAR uses an 8-lead narrow SOIC (R-8) package per JEDEC MS-012-AA, with 1.27 mm pitch and 5.00 mm × 4.00 mm footprint. Its θJA thermal impedance is 110°C/W, and maximum power dissipation is 470 mW. At 100 µA quiescent current and typical 3.3 V operation, self-heating is negligible (<0.2°C), making thermal derating unnecessary in standard PCB layouts with minimal copper.