Analog Devices Inc. ADM802MARN
- Part No.:
- ADM802MARN
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
ADM802MARN.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADM802MARN from Analog Devices is a precision microprocessor supervisory circuit in SO-8 package, providing active-low reset assertion at 4.40 V threshold, 200 ms reset timeout, 1.6 s watchdog timer, and automatic battery switchover for CMOS RAM backup. It operates across –40°C to +85°C and supports VCC down to 1 V during reset hold.
For engineers reviewing the ADM802MARN datasheet, ADM802MARN pinout, ADM802MARN application, or ADM802MARN equivalent, key selection criteria include its 4.4 V reset threshold (vs. 4.65 V variants), ±2% power fail accuracy, battery switchover hysteresis of 40 mV, and compatibility with 3 V backup sources in industrial embedded systems.
Technical Context
The ADM802MARN integrates four core functions: a precision voltage monitor with 4.40 V reset threshold (guaranteed 4.25–4.50 V over temperature), a 1.6 s watchdog transition detector that resets on missing WDI toggles, a 1.25 V reference-based power fail comparator (PFI/PFO), and bidirectional battery switchover logic with 20 mV switchover threshold and 40 mV hysteresis.
Its internal PMOS switch delivers VOUT from VCC (normal mode) or VBATT (backup mode) with <1 Ω on-resistance and supports up to 100 mA load; quiescent current is 70–100 µA in main operation and only 0.05–1.0 µA in battery backup mode, enabling long-term RAM retention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.40 V (guaranteed 4.25–4.50 V); ensures reliable reset initiation for +5 V systems with tighter tolerance than 4.65 V variants. |
| Reset Timeout Delay | 200 ms (140–280 ms range); provides sufficient stabilization time for microprocessors after power-up or brownout recovery. |
| Watchdog Timeout | 1.6 s (1.0–2.25 s); detects software hangs by requiring WDI transitions at least every 1.6 s to prevent reset assertion. |
| Power Fail Accuracy | ±2% (ADM802M-specific); enables precise early-warning detection of supply decay using PFI/PFO with 1.25 V internal reference. |
| Battery Switchover Hysteresis | 40 mV; prevents oscillation during VCC/VBATT crossover by enforcing clean, noise-immune switchover at 20 mV power-down and +20 mV power-up thresholds. |
| Supply Current (Normal) | 70–100 µA; minimizes system standby power while maintaining full supervisory functionality across industrial temperature range. |
| VCC Operating Range | 4.5–5.5 V; compatible with standard +5 V rails and tolerant of nominal 5% regulation variation. |
Pinout & Package
ADM802MARN is housed in an 8-lead SOIC (SO-8) package per JEDEC MS-012, with 1.27 mm pitch, 5.00 mm × 4.00 mm body, and gull-wing leads. Pin 1 is marked by a beveled corner or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (PFO) | Power Fail Output | Open-drain active-low output signaling impending supply failure when PFI falls below 1.25 V; requires external pull-up for logic-level interface. |
| 2 (WDI) | Watchdog Input | Three-level input (high/low/floating); toggling within 1.6 s disables reset; floating disables watchdog entirely. |
| 3 (RESET) | Active-Low Reset Output | Push-pull output asserted low during VCC undervoltage or watchdog timeout; remains functional down to VCC = 1 V. |
| 4 (VBATT) | Battery Backup Input | Accepts 2.8–6 V backup source; supplies VOUT when VCC drops below reset threshold and VBATT > VCC + 20 mV. |
| 5 (VOUT) | Output Voltage Terminal | Switched output delivering VCC (normal) or VBATT (backup); supports up to 100 mA with <1 Ω internal PMOS switch resistance. |
| 6 (VCC) | Main Power Supply Input | +5 V nominal input (4.5–5.5 V range); powers all internal circuits and serves as primary source for VOUT. |
| 7 (GND) | Ground Reference | Common return path for VCC, VBATT, and all internal analog/digital blocks; must be low-impedance for noise immunity. |
| 8 (PFI) | Power Fail Input | Non-inverting input to 1.25 V comparator; used with external resistor divider to monitor any supply rail for early power-fail warning. |
Key Features
| Feature | Design Value |
|---|---|
| Precision 4.40 V reset threshold | Guaranteed 4.25–4.50 V over –40°C to +85°C; optimized for modern +5 V systems with tighter supply tolerances than legacy 4.65 V parts. |
| ±2% power fail accuracy | Enables reliable early-warning detection of supply decay using PFI/PFO; superior to generic comparators lacking factory-trimmed reference. |
| Automatic battery switchover with 40 mV hysteresis | Eliminates need for external diodes or control logic; prevents oscillation during VCC/VBATT crossover in RAM backup applications. |
| 1.6 s watchdog timer with transition detection | Detects stalled firmware by monitoring WDI activity-not just level-reducing false triggers from static I/O states. |
| 1 V minimum VCC reset hold capability | Ensures microprocessor remains held in reset until stable shutdown, even during deep brownout conditions where VCC drops to 1 V. |
Applications
| Industrial PLC Control Unit | Medical Diagnostic Instrument |
|---|---|
|
Use Scenario: Maintains volatile configuration memory and real-time clock during AC mains interruption in programmable logic controllers. IC Role / Device Role / Timing Role: Supervisory IC providing battery-backed VOUT, brownout-triggered RESET, and watchdog supervision of safety-critical firmware loops. Use Value: Prevents configuration loss and uncontrolled state transitions via guaranteed reset assertion down to 1 V VCC and ±2% PFI accuracy. |
Use Scenario: Preserves calibration data and patient session logs during brief power dips in portable ultrasound or ECG units. IC Role / Device Role / Timing Role: Dual-role supervisor: RAM backup controller (VBATT→VOUT switchover) and safety watchdog (WDI monitoring). Use Value: Enables uninterrupted operation with lithium coin-cell backup and eliminates risk of corrupted diagnostics due to undetected software lockup. |
| Telecom Base Station Controller | Automotive Infotainment Head Unit |
|
Use Scenario: Secures boot loader integrity and network stack state during 48 V DC supply transients in remote radio units. IC Role / Device Role / Timing Role: System-level supervisor asserting RESET on VCC droop and generating PFO interrupt for graceful TCP session teardown before power loss. Use Value: Reduces network downtime by enabling controlled disconnection instead of abrupt crash, leveraging 1.25 V PFI reference and 200 ms reset delay. |
Use Scenario: Retains user preferences and navigation history across ignition cycles in automotive head units with dual-supply architecture. IC Role / Device Role / Timing Role: Battery switchover manager (VBATT to VOUT) and watchdog enforcer for infotainment OS kernel threads. Use Value: Guarantees RAM retention with <1 µA battery standby current and prevents UI freeze via 1.6 s WDI timeout-critical for ASIL-B compliance paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM802LARN | 4.65 V reset threshold (vs. 4.40 V), identical pinout and package; same 200 ms timeout and 1.6 s watchdog. | Used where system VCC tolerance is looser (e.g., older +5 V designs with ±10% regulation) and higher reset threshold avoids nuisance resets. | Select ADM802LARN if design uses legacy 5 V regulators with wider output variation; otherwise ADM802MARN preferred for tighter-tolerance rails. |
| MAX802MESA+ | Pin-compatible Maxim replacement; 4.40 V threshold, but 240 ms reset timeout (vs. 200 ms) and no guaranteed ±2% PFI accuracy. | Suitable for cost-sensitive industrial controls where exact timing alignment with Analog Devices' 200 ms spec is non-critical. | Choose MAX802MESA+ only if second-source qualification allows longer reset delay and reduced PFI precision; not drop-in for high-accuracy PFI use cases. |
Compared with ADM802LARN, ADM802MARN offers lower reset threshold for tighter 5 V rail monitoring, while versus MAX802MESA+, it delivers superior PFI accuracy and exact 200 ms reset timing-both critical for medical and telecom applications demanding deterministic behavior.
Availability
ADM802MARN is available at Aetrix Electronics and suitable for industrial PLC control units, medical diagnostic instruments, telecom base station controllers, and automotive infotainment head units requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ADM802MARN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The ADM802MARN belongs to Analog Devices' microprocessor supervisory circuit family, designed specifically to replace discrete reset generators and battery switchover circuits in space-constrained embedded systems requiring guaranteed reliability over –40°C to +85°C.
FAQ
What is the guaranteed reset voltage threshold for ADM802MARN across temperature?
The ADM802MARN has a guaranteed reset voltage threshold of 4.25 V minimum to 4.50 V maximum over the full –40°C to +85°C operating range, with a typical value of 4.40 V. This specification is explicitly confirmed in the "RESET THRESHOLD" table of the official datasheet and applies uniquely to the ADM802M/ADM802MARN variant-not the 4.65 V ADM802L series.
Can ADM802MARN operate with VCC below 4.5 V, and what happens to RESET functionality?
Yes, ADM802MARN maintains RESET assertion functionality down to VCC = 1 V, ensuring the microprocessor remains held in reset during deep brownout conditions. However, normal operation-including watchdog monitoring and PFI comparison-requires VCC ≥ 4.5 V per the Absolute Maximum Ratings and Electrical Specifications tables; below this, only reset hold is guaranteed.
How does the battery switchover function work in ADM802MARN, and what is the switchover hysteresis?
The ADM802MARN switches VOUT from VCC to VBATT when VCC falls below VBATT by 20 mV (power-down), and reverts to VCC when VCC rises above VBATT by 20 mV (power-up), yielding a total hysteresis of 40 mV. This prevents oscillation during supply crossover and is implemented with internal PMOS switches-no external components required.
Is ADM802MARN pin-compatible with MAX802M, and what are the key functional differences?
ADM802MARN is pin-compatible with MAX802M in SO-8 package and shares 4.40 V reset threshold and 1.6 s watchdog, but differs in guaranteed power fail accuracy (±2% for ADM802MARN vs. unspecified for MAX802M) and reset timeout (200 ms vs. 240 ms). These differences affect timing-critical and precision-monitoring applications.
What is the maximum load current ADM802MARN can deliver through VOUT in battery backup mode?
In battery backup mode (VCC < VBATT – 0.2 V), ADM802MARN delivers VOUT from VBATT with a dropout voltage of ≤50 mV at 250 µA load, as specified in the "VOUT in Battery Backup Mode" parameter row. While not rated for high-current loads, it reliably powers CMOS RAM and low-power logic consuming <1 mA.
ADM802MARN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.4V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
ADM802MARN FAQ
1.How can I place an order for ADM802MARN through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM802MARN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM802MARN reliable?
The price and inventory of ADM802MARN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM802MARN is usually 5 days.
3.What payment methods are accepted for ADM802MARN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM802MARN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM802MARN?
ADM802MARN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM802MARN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM802MARN?
For technical support, including ADM802MARN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM802MARN requirements.
6.How does Aetrix verify that ADM802MARN is sourced from the original manufacturer or authorized distributors?
All ADM802MARN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM802MARN meets industry standards.
7.What is the process for return or replacement of ADM802MARN?
All ADM802MARN units undergo pre-shipment inspection (PSI). If there is an issue with ADM802MARN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM802MARN part is unused and in its original packaging.
Return procedure for ADM802MARN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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