Analog Devices Inc. ADM805LARNZ

Overview

ADM805LARNZ from Analog Devices is a precision microprocessor supervisory circuit with active-high RESET output, 4.65 V reset threshold, 200 ms reset timeout, 1.6 s watchdog timer, and automatic battery switchover for CMOS RAM backup. It operates over –40°C to +85°C in SO-8 package and is used in embedded controllers requiring reliable power-up/down sequencing and fail-safe restart.

For engineers reviewing the ADM805LARNZ datasheet, ADM805LARNZ pinout, ADM805LARNZ application, or ADM805LARNZ equivalent, key selection criteria include its active-high RESET logic, guaranteed 4.5 V–4.75 V reset threshold range, battery switchover hysteresis of 40 mV, PFI comparator reference at 1.25 V, and compatibility with 3 V backup cells in industrial control systems.

Technical Context

The ADM805LARNZ integrates four core functions: a precision voltage monitor triggering RESET when VCC falls below 4.65 V (min 4.5 V), a 1.6 s watchdog timer activated by WDI transitions, a 1.25 V reference-based power-fail comparator (PFI/PFO), and bidirectional battery switchover with <20 mV switchover threshold and 40 mV hysteresis.

Its internal PMOS switch delivers VOUT from VCC (normal mode) or VBATT (backup mode) with <1 Ω on-resistance and supports up to 100 mA load; RESET remains functional down to VCC = 1 V, and quiescent current is 100 µA typical under VCC = 4.75–5.5 V.

Key Specifications

Pinout & Package

ADM805LARNZ is housed in an 8-lead SOIC (SO-8) package with standard 1.27 mm pitch, 5.0 mm × 6.2 mm footprint, and gull-wing leads. Pin 1 is marked with a beveled corner or dot.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX805LCSA+, ADM805LARNZ adds integrated power-fail detection and battery management; compared with TPS3808G33DBVR, it supports dual-supply operation, active-high reset, and watchdog-but requires 5 V VCC and is not suitable for 3.3 V-only systems.

Availability

ADM805LARNZ is available at Aetrix Electronics and suitable for industrial PLC controllers, medical diagnostic instruments, telecom remote terminal units, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADM805LARNZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and control.

The ADM805LARNZ belongs to Analog Devices' microprocessor supervisory IC product line, engineered for robust power monitoring, fail-safe reset generation, and battery-backed memory retention in harsh industrial and medical environments.

FAQ

What is the reset voltage threshold specification for ADM805LARNZ?

The ADM805LARNZ has a nominal reset voltage threshold of 4.65 V, with a guaranteed range of 4.5 V to 4.75 V at TA = 25°C under falling VCC conditions. This threshold is factory-trimmed and applies specifically to the ADM805L variant-distinct from the 4.4 V threshold of the M-suffix versions. The ADM805LARNZ maintains RESET assertion down to VCC = 1 V, ensuring reliable hold-down during deep brownout events.

Does ADM805LARNZ support active-high reset output, and how is it implemented?

Yes, ADM805LARNZ provides an active-high RESET output (pin 7), which is the logical inverse of the complementary active-low RESET signal. When asserted, RESET outputs VCC or VBATT (whichever is higher) up to 5.5 V, with a minimum high-level voltage of VCC − 1.5 V at 800 µA source current. This eliminates external inverters for µPs requiring high-asserted reset, such as certain ARM and Renesas MCUs.

How does the battery switchover function work in ADM805LARNZ?

In ADM805LARNZ, battery switchover activates when VCC falls below VBATT by 20 mV (power-down) or rises above VBATT by 20 mV (power-up), with 40 mV hysteresis to prevent chatter. During switchover, an internal PMOS switch connects VBATT to VOUT, delivering backup power to CMOS RAM with dropout <50 mV at 250 µA. Quiescent battery current is as low as 0.05 µA, supporting multi-year operation on coin cells.

Can ADM805LARNZ monitor a non-5 V power rail using the PFI input?

Yes, ADM805LARNZ's PFI input accepts any DC voltage referenced to GND and compares it against an internal 1.25 V precision reference. To monitor rails like 3.3 V or 12 V, a resistor divider scales the rail down to ≤1.25 V at PFI. For example, a 3.3 V rail uses R1/R2 ≈ 1.64 per VT = 1.25(1 + R1/R2). No additional components are needed-the comparator and open-drain PFO output are fully integrated.

Is ADM805LARNZ pin-compatible with older Maxim supervisory ICs?

Yes, ADM805LARNZ is a pin-compatible upgrade for MAX805L in SO-8 package, sharing identical pinout, electrical behavior, and timing specifications-including 4.65 V reset threshold, 200 ms timeout, and active-high RESET. No PCB or firmware changes are required for migration; however, designers should verify VBATT leakage current (0.05 µA vs. MAX805L's 1 µA) for ultra-low-power backup applications.