Analog Devices Inc. ADM8691ARU

Overview

ADM8691ARU from Analog Devices is a 16-lead TSSOP microprocessor supervisory circuit providing precision reset generation (4.65 V threshold, 50 ms/adjustable pulse), battery backup switchover (VCC/VBATT to VOUT, 100 mA drive), watchdog timer (100 ms/1.6 s/adjustable), power-fail detection (1.3 V PFI threshold), and CE gating with 3 ns propagation delay for RAM write protection in 5 V systems.

For engineers reviewing the ADM8691ARU datasheet, ADM8691ARU pinout, ADM8691ARU application, or ADM8691ARU equivalent, key selection considerations include its dual reset outputs (active-low RESET and active-high LOW LINE), independent WDO status flag, adjustable timeout via OSC IN/OSC SEL, and guaranteed reset assertion down to VCC = 1 V - critical for robust power sequencing and data integrity in industrial controllers and automotive ECUs.

Technical Context

The ADM8691ARU integrates a precision 4.65 V reset voltage detector with 40 mV hysteresis, an internal oscillator selectable between 100 ms and 1.6 s watchdog periods (or externally adjustable via OSC IN), and a dedicated power-fail comparator with 1.3 V threshold referenced to VCC. Its battery switchover logic uses 70 mV rising / 50 mV falling thresholds with 20 mV hysteresis to prevent chatter during slow VCC decay.

It features three-level WDI input (internally biased to 38% VCC, ~5 MΩ impedance), CEIN-to-CEOUT gating with 3 ns propagation delay and automatic high-Z override during brownout, and separate open-drain outputs: RESET (active-low), LOW LINE (active-high), WDO (watchdog status), PFO (power-fail), and BATT ON (battery select enable).

Key Specifications

Pinout & Package

ADM8691ARU is housed in a 16-lead TSSOP package (4.4 mm × 5.0 mm, 0.65 mm pitch), RoHS-compliant and rated for −40°C to +85°C operation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX691ACPE+ and TPS3823-50DBVR, the ADM8691ARU uniquely integrates CE gating, dual reset polarity, adjustable watchdog, and PFI/PFO - making it the only option among the three that delivers full data-integrity protection for battery-backed RAM in demanding industrial environments.

Availability

ADM8691ARU is available at Aetrix Electronics and suitable for industrial PLC controllers, automotive body control modules, medical infusion pumps, and point-of-sale terminals requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.

Supply support for ADM8691ARU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.

The ADM8691ARU belongs to Analog Devices' microprocessor supervisory IC product line, designed specifically to ensure data integrity, power sequencing reliability, and fail-safe operation in mission-critical embedded systems with battery-backed memory.

FAQ

What is the function of the OSC SEL and OSC IN pins on the ADM8691ARU?

The OSC SEL pin selects the timing source: floating or high enables the internal oscillator (fixed 50 ms reset, 100 ms/1.6 s watchdog), while low enables external timing via OSC IN. OSC IN accepts either a 0–500 kHz clock or a capacitor (e.g., 47 pF) to set adjustable reset pulse width and watchdog timeout - a capability unique to the ADM8691ARU within its family.

Does the ADM8691ARU support both active-high and active-low reset signals?

Yes, the ADM8691ARU provides two independent reset outputs: pin 15 is active-low RESET, and pin 16 is active-high RESET (labeled "RESET" in the datasheet but functionally complementary). This eliminates external inversion circuitry and supports processors with either reset polarity requirement - a key differentiator from legacy supervisors like the ADM690.

How does the ADM8691ARU protect RAM during power failure?

The ADM8691ARU protects RAM using dual mechanisms: (1) CEIN-to-CEOUT gating forces CEOUT high during brownout (VCC < 4.65 V), blocking writes to RAM; (2) PFI input monitors supply voltage and asserts PFO low at 1.3 V, giving the MCU time to save data before RESET activates at 4.65 V. Both functions are implemented in silicon and require no firmware intervention.

What is the minimum VCC voltage at which the ADM8691ARU guarantees RESET assertion?

The ADM8691ARU guarantees RESET remains asserted down to VCC = 1 V, as confirmed in the General Description and Absolute Maximum Ratings sections of the Rev. C datasheet. This ensures the microprocessor stays held in reset throughout full power collapse - a critical feature for preserving state in systems with capacitor hold-up or battery backup.

Can the ADM8691ARU drive more than 100 mA to VOUT?

Yes - while the internal PMOS switch delivers up to 100 mA to VOUT, the ADM8691ARU includes the BATT ON output (pin 5) to drive the base of an external PNP transistor. When configured per Figure 24 in the datasheet, this extends VOUT current capability beyond 100 mA while maintaining low dropout and seamless switchover between VCC and VBATT sources.