Analog Devices Inc. ADM8691ARW

Overview

ADM8691ARW from Analog Devices is a 16-lead TSSOP microprocessor supervisory circuit providing precision reset generation (4.65 V threshold, 50 ms/adjustable timeout), battery backup switchover (0.7 Ω on-resistance, 100 mA VOUT drive), watchdog timer (100 ms / 1.6 s / adjustable), power-fail detection (1.3 V PFI threshold), and CE signal gating (3 ns propagation delay) for embedded microprocessor systems requiring robust power management and data integrity.

For engineers reviewing the ADM8691ARW datasheet, ADM8691ARW pinout, ADM8691ARW application, or ADM8691ARW equivalent, key selection considerations include its dual reset/watchdog output capability (RESET and WDO), active-high LOW LINE and WDO outputs, CEIN/CEOUT write-protection gating, and support for external oscillator or capacitor-based timing adjustment - all in a space-constrained 16-lead TSSOP package.

Technical Context

The ADM8691ARW integrates a precision 4.65 V reset voltage detector with 40 mV hysteresis and guarantees RESET assertion down to VCC = 1 V. Its internal oscillator (enabled when OSC SEL is high/floating) supports fixed 100 ms or 1.6 s watchdog timeout periods, while OSC SEL low enables external clock or capacitor-based timing configuration.

It implements dual-path battery switchover: a 0.7 Ω PMOS switch for VCC-to-VOUT delivery (up to 100 mA) and a 7 Ω MOSFET for VBATT-to-VOUT backup (0.4 μA standby current). CEIN/CEOUT gating enforces write protection by forcing CEOUT high during undervoltage, and WDO provides independent watchdog status reporting distinct from RESET.

Key Specifications

Pinout & Package

ADM8691ARW is housed in a 16-lead TSSOP package (4.4 mm × 5.0 mm, 0.65 mm pitch), compatible with industry-standard reflow profiles and PCB assembly processes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX691ACPE+ and TPS3823-50DBVR, the ADM8691ARW uniquely integrates battery switchover, CE gating, dual reset outputs, and independent WDO in a single 16-lead TSSOP - reducing BOM count by ≥4 discrete components and eliminating layout complexity for data-critical embedded systems.

Availability

ADM8691ARW is available at Aetrix Electronics and suitable for industrial PLC controllers, automotive infotainment head units, medical patient monitors, and network routers requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ADM8691ARW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.

The ADM8691ARW belongs to Analog Devices' microprocessor supervisory product line, engineered specifically for fault-tolerant embedded systems requiring concurrent reset generation, battery-backed memory preservation, and hardware-enforced data integrity - not general-purpose voltage monitoring.

FAQ

What is the guaranteed minimum operating VCC voltage for ADM8691ARW reset functionality?

The ADM8691ARW guarantees RESET assertion and full supervisory operation down to VCC = 1 V. This ensures the microprocessor remains held in reset during deep brownout conditions, preventing undefined behavior even as the supply collapses. The RESET output remains functional and drives valid logic levels at this voltage, as confirmed by the datasheet's "RESET Output Voltage at VCC = 1 V" specification (20 mV max sink voltage at 10 μA load).

Does ADM8691ARW support adjustable watchdog timeout periods, and how is it configured?

Yes, ADM8691ARW supports adjustable watchdog timeout periods via the OSC SEL and OSC IN pins. When OSC SEL is low, connecting an external capacitor (e.g., 47 pF) between OSC IN and GND sets the timeout to 1.6 sec × C/47 pF for the long period or 400 ms × C/47 pF for the short period. An external clock signal (0–500 kHz) applied to OSC IN provides cycle-accurate timeout control. This configurability is documented in Table 5 and Figures 17–20 of the ADM8691ARW datasheet.

How does the CEIN/CEOUT gating function protect RAM in ADM8691ARW?

The ADM8691ARW's CEIN/CEOUT gating forces CEOUT high whenever VCC falls below the 4.65 V reset threshold or during battery backup mode - regardless of CEIN state. This hardware-enforced action disables chip enable or write signals to connected CMOS RAM or EEPROM, preventing spurious writes during power instability. With a 3 ns propagation delay, the gating responds faster than most memory access cycles, ensuring data integrity without software overhead.

What is the maximum continuous output current ADM8691ARW can deliver from its VOUT pin?

The ADM8691ARW delivers up to 100 mA continuously from its VOUT pin when powered from VCC, with a typical VCC − VOUT dropout of 0.125 V at 100 mA load. In battery backup mode (VBATT → VOUT), it sustains 250 μA continuously with <2 mV dropout. For loads exceeding 100 mA, the BATT ON pin can directly drive an external PNP transistor base to augment current delivery - a capability verified in the "Battery Switchover Section" of the ADM8691ARW datasheet.

Can ADM8691ARW monitor a 3.3 V supply for power-fail detection?

Yes, ADM8691ARW can monitor a 3.3 V supply using its PFI input, which has a fixed 1.3 V threshold. By scaling the 3.3 V rail with a resistor divider (e.g., 15.8 kΩ top, 10 kΩ bottom), the voltage presented to PFI becomes ~1.28 V - within the specified 1.25–1.35 V trip range. The PFI input draws only ±0.01 nA, introducing negligible loading. This technique is explicitly supported in the "Power-Fail Warning Comparator" section and Figure 13 of the ADM8691ARW datasheet.