Analog Devices Inc. ADM8693ARNZ
- Part No.:
- ADM8693ARNZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
ADM8693ARNZ.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,321
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM8693ARNZ from Analog Devices is a microprocessor supervisory circuit providing precision reset generation, adjustable watchdog timeout, battery backup switchover, CE gating, and power-fail detection for 5 V systems. It asserts RESET down to 1 V VCC, delivers up to 100 mA from VOUT, and features 4.4 V nominal reset threshold with 40 mV hysteresis-designed for industrial embedded controllers requiring reliable power sequencing and data retention.
For engineers reviewing the ADM8693ARNZ datasheet, ADM8693ARNZ pinout, ADM8693ARNZ application, or ADM8693ARNZ equivalent, key selection considerations include its 16-lead TSSOP package, dual-mode watchdog (100 ms / 1.6 s), adjustable reset timing via OSC IN/OSC SEL, BATT ON output for external PNP drive, and guaranteed operation from −40°C to +85°C.
Technical Context
The ADM8693ARNZ integrates a precision 4.4 V reset comparator with 40 mV hysteresis, an internal oscillator selectable between 100 ms and 1.6 s watchdog periods, and an external-capacitor or external-clock configurable timing engine. Its battery switchover circuit activates when VCC drops below VBATT by 70 mV (rising) or 50 mV (falling), with 20 mV hysteresis to prevent chatter.
It provides three dedicated logic outputs: RESET (active low, 50 ms or adjustable), WDO (watchdog status), and BATT ON (battery-active flag). CEIN/CEOUT enable hardware write protection of CMOS RAM during brownout, with 3 ns propagation delay and forced-high CEOUT when VCC falls below threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.4 V ±0.15 V - matches 5 V ±10% supplies; guarantees reset assertion before microprocessor instability. |
| Reset Pulse Width | 50 ms typical or adjustable - sufficient for full microprocessor power stabilization on startup. |
| Watchdog Timeout | 100 ms (short) or 1.6 s (long), selectable - enables fast fault response or safe post-reset initialization window. |
| VOUT Drive Capability | 100 mA max at ≤0.2 V dropout - powers CMOS RAM directly without external pass transistor. |
| Battery Switchover | 70 mV rising / 50 mV falling threshold - ensures clean, chatter-free transition between main supply and backup. |
| Supply Current | 200 µA typical (normal), 1 µA max (battery backup) - minimizes battery drain in long-term memory retention. |
| PFI Comparator | 1.3 V ±25 mV threshold - provides early power-fail warning for controlled shutdown or data save. |
Pinout & Package
ADM8693ARNZ is housed in a 16-lead TSSOP package (RU-16), RoHS-compliant, with 0.65 mm lead pitch and exposed pad for thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Main power supply input | 5 V nominal supply; powers internal circuitry and feeds VOUT during normal operation. |
| VBATT | Backup battery input | Accepts 2.0–4.0 V battery; source for VOUT when VCC fails. |
| VOUT | Switched output rail | Delivers VCC or VBATT (whichever higher) to RAM; supports 100 mA load with <0.2 V dropout. |
| GND | Ground reference | Common 0 V return for all analog and digital functions. |
| RESET | Active-low reset output | Drives microprocessor reset pin; stays low until VCC exceeds 4.4 V and holds for ≥50 ms. |
| WDI | Watchdog input | Three-level input (low/mid/high); each transition resets timer; floating disables watchdog. |
| PFI | Power-fail comparator input | Non-inverting input referenced to 1.3 V; triggers PFO low when voltage drops below threshold. |
| PFO | Power-fail output | Active-low open-drain signal indicating imminent supply failure; used for early warning shutdown. |
| CEIN | Chip enable input | Logic input gated to CEOUT; must be driven high/low to control RAM write enable during valid VCC. |
| CEOUT | Gated chip enable output | Replicates CEIN when VCC is valid; forced high during brownout to block writes to protected memory. |
| BATT ON | Battery-active flag | Active-high open-drain output signaling VBATT is active on VOUT; drives base of external PNP for >100 mA loads. |
| LOW LINE | Complementary reset output | Active-high inverse of RESET; interfaces directly with processors requiring active-high reset assertion. |
| OSC IN | Oscillator timing input | Accepts external clock (0–500 kHz) or 47 pF capacitor to set adjustable reset/watchdog timing. |
| OSC SEL | Oscillator mode select | High/floating = internal oscillator; low = external clock/capacitor mode; 3 µA internal pull-up. |
| WDO | Watchdog status output | Active-low open-drain; goes low on watchdog timeout and returns high on next WDI transition. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable reset & watchdog timing | Configurable via OSC IN/OSC SEL using external capacitor (e.g., 47 pF → 1.6 s) or clock - eliminates need for external timing ICs. |
| Hardware write protection | CEIN-to-CEOUT gating with 3 ns delay and forced-high behavior during brownout - prevents corruption of battery-backed RAM during power collapse. |
| Low-dropout battery switchover | 0.7 Ω internal PMOS switch (VCC→VOUT) and 7 Ω NMOS (VBATT→VOUT) - maintains >2.8 V output at 100 mA with <0.2 V dropout. |
| Ultra-low standby current | 1 µA max in battery backup mode (VCC = 0 V, VBATT = 2.8 V) - extends lithium or supercapacitor backup life to years. |
| Dual watchdog modes | 100 ms short period for runtime monitoring + 1.6 s long period after reset - balances responsiveness with safe initialization time. |
Applications
| Industrial PLC Controller | Automotive Telematics Unit |
|---|---|
Use Scenario: Maintains real-time clock and configuration memory during engine cranking-induced 5 V rail sag (down to 3.5 V). IC Role / Device Role / Timing Role: Supervisory circuit asserting RESET, enabling CEOUT-based RAM write lock, and switching VOUT to VBATT within 70 mV VCC–VBATT differential. Use Value: Prevents firmware corruption and preserves GPS log history across repeated cold starts without external supervision logic. | Use Scenario: Powers SRAM and stores diagnostic trouble codes during vehicle ignition-off battery drain. IC Role / Device Role / Timing Role: Provides 100 mA VOUT from coin cell, monitors VCC for brownout, and asserts PFO 100 ms before VCC reaches 4.4 V threshold. Use Value: Enables deterministic last-write-before-power-loss for OBD-II compliance without MCU intervention. |
| Medical Infusion Pump | Smart Energy Meter |
Use Scenario: Guarantees safe shutdown and nonvolatile parameter retention when AC mains fail. IC Role / Device Role / Timing Role: Generates 200 ms RESET pulse (via OSC SEL/OSC IN config), gates CEOUT to freeze EEPROM writes, and switches to supercapacitor backup. Use Value: Meets IEC 62304 Class C requirements for fail-safe state capture and zero-data-loss power transition. | Use Scenario: Preserves tariff schedules and consumption logs during grid outages lasting hours. IC Role / Device Role / Timing Role: Uses BATT ON to drive external PNP for >200 mA backup load, while WDO monitors MCU heartbeat and forces safe metering halt on stall. Use Value: Eliminates need for discrete supervisor + backup controller + watchdog IC - reduces BOM count by 3 components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM8691ARNZ | Same 16-lead TSSOP package and pinout; identical 4.4 V reset threshold but fixed 4.65 V variant not applicable. | Offers same CE gating, watchdog, and battery switchover - differs only in reset threshold (4.65 V vs. 4.4 V), making it unsuitable for 5 V ±10% systems where ADM8693ARNZ is specified. | Select ADM8691ARNZ only if system uses 5 V +10%/−5% supply; otherwise ADM8693ARNZ ensures robustness across full 5 V ±10% range. |
| MAX692AESA+ | 8-pin SOIC; 4.63 V reset threshold; no CE gating or BATT ON output; fixed 140 ms reset timeout. | Lacks RAM write protection and battery-switching control - requires external transistors for >100 mA backup loads and separate logic for write disable. | Choose MAX692AESA+ only for space-constrained designs where CE gating and adjustable timing are unnecessary and 4.63 V threshold aligns with supply tolerance. |
Compared with ADM8691ARNZ and MAX692AESA+, the ADM8693ARNZ uniquely combines 4.4 V reset threshold compatibility with 5 V ±10% rails, hardware-enforced RAM write protection via CEOUT, and BATT ON-driven external PNP support - delivering integrated reliability unattainable with either alternative alone.
Availability
ADM8693ARNZ is available at Aetrix Electronics and suitable for industrial PLC controllers, automotive telematics units, medical infusion pumps, smart energy meters, and intelligent instrumentation requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ADM8693ARNZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The ADM869x family was designed specifically for microprocessor system supervision - integrating reset, watchdog, battery switchover, power-fail detection, and memory write protection into a single IC to eliminate discrete supervision circuits in embedded controllers.
FAQ
What is the guaranteed reset voltage threshold range for ADM8693ARNZ?
The ADM8693ARNZ has a guaranteed reset voltage threshold range of 4.25 V to 4.48 V, with a typical value of 4.4 V and 40 mV hysteresis. This specification ensures reliable reset assertion across the full industrial temperature range (−40°C to +85°C) and matches 5 V ±10% power supplies. The ADM8693ARNZ datasheet confirms this range in Table 2 under "Reset Voltage Threshold" for ADM8692/ADM8693 devices.
Does ADM8693ARNZ support adjustable reset timeout duration?
Yes, ADM8693ARNZ supports adjustable reset timeout via the OSC IN and OSC SEL pins. With OSC SEL low, connecting a capacitor (e.g., 47 pF) to OSC IN yields ~1.6 s reset pulse; with OSC SEL high or floating and OSC IN low, the reset pulse is fixed at 50 ms. Table 5 in the ADM8693ARNZ datasheet details all combinations, including external clock configurations for precise timing control.
Can ADM8693ARNZ drive more than 100 mA from VOUT during battery backup?
No - ADM8693ARNZ delivers up to 100 mA from VOUT under normal operation and only 250 µA in battery backup mode (VOUT sourced from VBATT). To exceed 100 mA, use the BATT ON output to drive the base of an external PNP transistor, as documented in the ADM8693ARNZ battery switchover section and Figure 14. This method maintains low dropout while scaling current capability.
How does the CEIN/CEOUT function protect memory in ADM8693ARNZ?
The ADM8693ARNZ forces CEOUT high whenever VCC falls below the 4.4 V reset threshold or VBATT, regardless of CEIN state. This hardware-enforced behavior blocks write operations to battery-backed CMOS RAM or EEPROM during brownout, preventing data corruption. The 3 ns propagation delay ensures minimal latency, and the feature is confirmed in Figure 21 and the "CE Gating and RAM Write Protection" section of the ADM8693ARNZ datasheet.
What is the function of the LOW LINE output on ADM8693ARNZ?
The LOW LINE output on ADM8693ARNZ is an active-high complementary signal to the active-low RESET output. It goes low when VCC falls below the reset threshold and returns high immediately upon VCC rising above that threshold - providing faster release timing than RESET's fixed 50 ms pulse. This allows direct interfacing with microprocessors requiring active-high reset inputs, as described in the ADM8693ARNZ Pin Function Descriptions table.
ADM8693ARNZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.4V
- Output:
- Push-Pull, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 35ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
ADM8693ARNZ FAQ
1.How can I place an order for ADM8693ARNZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM8693ARNZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM8693ARNZ reliable?
The price and inventory of ADM8693ARNZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM8693ARNZ is usually 5 days.
3.What payment methods are accepted for ADM8693ARNZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM8693ARNZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM8693ARNZ?
ADM8693ARNZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM8693ARNZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM8693ARNZ?
For technical support, including ADM8693ARNZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM8693ARNZ requirements.
6.How does Aetrix verify that ADM8693ARNZ is sourced from the original manufacturer or authorized distributors?
All ADM8693ARNZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM8693ARNZ meets industry standards.
7.What is the process for return or replacement of ADM8693ARNZ?
All ADM8693ARNZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM8693ARNZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM8693ARNZ part is unused and in its original packaging.
Return procedure for ADM8693ARNZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM8693ARNZ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

