Analog Devices Inc. ADM8830ACP

Overview

ADM8830ACP from Analog Devices is a triple-output CMOS charge pump regulator designed specifically for color TFT LCD panel power management in mobile phones. It generates +5.1 V (±2%), +15.3 V, and –10.2 V from a single 2.6–3.6 V input, supports scanning/blanking mode switching via SCAN/BLANK pin, and delivers up to 8 mA on the +5.1 V output during scanning mode.

For engineers reviewing the ADM8830ACP datasheet, ADM8830ACP pinout, ADM8830ACP application, or ADM8830ACP equivalent, key selection criteria include its 20-lead LFCSP package, Green Idle™ oscillator enable scheme for 5 V efficiency, external clock support for blanking-mode power savings, and precise power sequencing for gate drive supplies.

Technical Context

The ADM8830ACP integrates a voltage doubler, tripler, and inverter with an internal 100 kHz oscillator for scanning mode and external CLKIN (≥0.9 kHz) for blanking mode. Its control logic sequences –10.2 V ramp-up before +15.3 V to prevent TFT panel damage, and uses LDO_ON/OFF to select between internal LDO regulation or external LDO bypass of the +5.1 V output.

It features three independent charge pump sections: one regulated +5.1 V LDO output (4–8 mA), one +15.3 V tripler output (50–100 µA), and one –10.2 V inverter output (–100 to –50 µA), each with dedicated external capacitor pins (C1–C4) and distinct ripple specs (10 mV p-p on +5.1 V, 50 mV p-p on ± outputs).

Key Specifications

Pinout & Package

ADM8830ACP is packaged in a 20-lead Lead Frame Chip Scale Package (LFCSP), 4 mm × 4 mm body, CP-20-1 footprint per JEDEC MO-220-VGGD-1. Thermal resistance θ_JA = 31°C/W enables high-power-density integration in space-constrained mobile designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar charge pump regulator applications.

Compared with MAX1605EEE+ and TPS65120RGTR, the ADM8830ACP uniquely combines hardware-based scanning/blanking mode control, automatic oscillator enable for 5 V efficiency, and guaranteed power sequencing - making it optimal for cost-sensitive, analog-controlled mobile TFT displays where layout space and BOM simplicity are critical.

Availability

ADM8830ACP is available at Aetrix Electronics and suitable for mobile phone TFT LCD power, handheld instrument display, and low-power portable display systems requiring stable component supply across extended temperature ranges (–40°C to +85°C).

Supply support for ADM8830ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and consumer markets since 1965.

The ADM8830ACP belongs to Analog Devices' TFT LCD power management product line, engineered specifically to reduce component count and extend battery life in mobile handsets through integrated triple-output charge pump regulation with intelligent power-state control.

FAQ

What is the function of the SCAN/BLANK pin on the ADM8830ACP?

The SCAN/BLANK pin on the ADM8830ACP selects operating mode: logic high enables scanning mode with the internal 100 kHz oscillator for high-current pixel updates, while logic low activates blanking mode, disabling the internal oscillator and routing the external CLKIN signal to reduce quiescent current. This dual-mode operation directly extends battery life in mobile displays showing static content.

Can the ADM8830ACP operate without an external clock source?

Yes, the ADM8830ACP operates autonomously in scanning mode using its internal 100 kHz oscillator and requires no external clock. However, in blanking mode, it mandates an external clock applied to CLKIN (0.9–10 kHz, 50% duty cycle, <20 ns edges); omission causes failure to generate ± outputs during blanking periods.

How does the ADM8830ACP ensure safe power-up sequencing for TFT panels?

The ADM8830ACP enforces hardware-level sequencing: upon SHDN assertion, –10.2 V output ramps first and must reach –3 V before +15.3 V is enabled. This prevents gate oxide stress and latch-up in TFT source drivers. The ADM8830ACP datasheet specifies t_R10V = 12 ms and t_DELAY = 3 ms to verify compliance.

What is the purpose of the LDO_ON/OFF pin on the ADM8830ACP?

The LDO_ON/OFF pin on the ADM8830ACP controls whether the internal LDO regulates the +5.1 V output: logic high enables it, while logic low disconnects it to allow an external LDO to regulate +5.1 V and feed +5VIN. This provides flexibility for noise-sensitive or high-efficiency applications where the internal LDO's 80–85% efficiency is insufficient.

What are the absolute maximum ratings for the ADM8830ACP outputs?

The ADM8830ACP specifies absolute maximum output voltages as: +5.1 V output - –0.3 V to +6 V; –10.2 V output - –12 V to +0.3 V; +15.3 V output - –0.3 V to +17 V. Exceeding these limits, even momentarily, risks permanent damage. These ratings are independent of operating conditions and must be respected in all system fault scenarios.