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Home > Products > Isolators > Digital Isolators

Analog Devices Inc. ADN4652BRSZ-RL7

Name: ADN4652BRSZ-RL7
Brand: Analog Devices Inc.
SKU: ADN4652BRSZ-RL7
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADN4652BRSZ-RL7

Manufacturer:: Analog Devices Inc.

Category:: Digital Isolators

Package:: 20-SSOP (0.209", 5.30mm Width)

Datasheet:: ADN4652BRSZ-RL7.pdf

Description:: DGT ISO 3750VRMS 2CH LVDS 20SSOP

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Product details

Overview

ADN4652BRSZ-RL7 from Analog Devices is a dual-channel, 3.75 kV_RMS galvanically isolated LVDS buffer supporting up to 600 Mbps data rates with 4.5 ns max propagation delay, 151 ps peak-to-peak total jitter, and fail-safe output high for open/short/terminated inputs. It operates across −40°C to +125°C and integrates iCoupler® technology for drop-in isolation in high-speed serial links.

For engineers reviewing the ADN4652BRSZ-RL7 datasheet, ADN4652BRSZ-RL7 pinout, ADN4652BRSZ-RL7 application, or ADN4652BRSZ-RL7 equivalent, this device serves as a safety-certified, low-jitter solution for isolating LVDS clock and data paths in industrial AFEs, medical imaging backplanes, and isolated SPI-over-LVDS interfaces where reinforced insulation and ESD robustness (±8 kV IEC 61000-4-2) are critical.

Technical Context

The ADN4652BRSZ-RL7 implements two independent, bidirectional LVDS isolation channels using Analog Devices' iCoupler® technology-enhanced for high-speed operation-with integrated LDOs enabling 3.3 V input supply conversion to regulated 2.5 V core voltage per side. Its fail-safe receiver logic ensures DOUTx± drives high when DINx± is floating, shorted, or terminated but undriven.

It complies fully with TIA/EIA-644-A LVDS standards, delivers <25 kV/μs common-mode transient immunity, and meets reinforced insulation requirements per DIN EN IEC 60747-17 (VDE 0884-17), UL 1577, and IEC/CSA 60601-1-certified at 3.75 kV_RMS for 1 minute in its 20-lead SSOP package.

Key Specifications

Parameter	Value and Actual Design Meaning
Isolation Rating	3.75 kV_RMS for 1 minute (SSOP package); enables reinforced insulation per IEC/CSA 60601-1 and IEC/CSA 61010-1 in medical and test equipment.
Max Data Rate	600 Mbps (PRBS23); supports high-throughput serial links such as isolated JESD204B/C or camera sensor interfaces.
Propagation Delay	4.5 ns maximum; ensures tight timing alignment across isolated domains in real-time control and synchronization applications.
Total Jitter (BER 1e−12)	151 ps peak-to-peak at 600 Mbps; preserves signal integrity for low-bit-error-rate communication over long PCB traces.
Fail-Safe Output	Outputs drive high during open, short, or terminated-but-undriven input conditions; prevents undefined states in fault-tolerant systems.
Supply Options	2.5 V core (LDO-regulated) or direct 3.3 V input via VINx pins; simplifies power architecture in mixed-voltage systems.
ESD Protection	±8 kV IEC 61000-4-2 across isolation barrier; protects against field-induced transients in industrial environments.

Pinout & Package

ADN4652BRSZ-RL7 is housed in a 20-lead SSOP package (5.3 mm creepage/clearance) rated for 3.75 kV_RMS isolation. Pin functions are validated per Analog Devices Rev. G datasheet Figure 8 and Table 16.

Pin/Terminal	Circuit Role	Design Meaning
1, 20	VIN1 / VIN2	Optional 3.3 V LDO inputs for Side 1 and Side 2; bypass to respective GNDx with 1 µF capacitors for stable 2.5 V regulation.
2, 4, 10 / 11, 17, 19	GND1 / GND2	Isolated ground references per side; must be kept separate to maintain galvanic isolation integrity.
3, 9 / 12, 18	VDD1 / VDD2	2.5 V core supply pins; require local 0.1 µF decoupling to GNDx; connect externally if using internal LDO.
5, 6 / 15, 16	DOUT1+ / DOUT1− / DIN1− / DIN1+	Side 1 differential output pair (pins 5/6) and Side 2 differential input pair (pins 15/16); cross-connected per ADN4652's channel mapping.
7, 8 / 13, 14	DIN2+ / DIN2− / DOUT2− / DOUT2+	Side 1 differential input pair (pins 7/8) and Side 2 differential output pair (pins 13/14); defines ADN4652's unique I/O direction per channel.

Key Features

Feature	Design Value
Drop-in LVDS isolation	Replaces non-isolated LVDS buffers without redesigning signal chain layout or protocol stack-no change to driver/receiver impedance or termination.
Integrated LDOs	Accepts 3.3 V supply on VINx and generates clean 2.5 V core voltage per side, eliminating need for external regulators in space-constrained designs.
Fail-safe receiver logic	Guarantees Logic 1 output during input faults (open, short, terminated), preventing metastability or latch-up in safety-critical control loops.
High CMTI	>25 kV/µs common-mode transient immunity ensures reliable operation in noisy motor drives, inverters, and power converters.
Regulatory compliance	UL 1577, DIN EN IEC 60747-17 (VDE 0884-17), IEC/CSA 60601-1, and IEC/CSA 61010-1 certified-enables single-source qualification for medical and industrial end equipment.

Applications

Analog Front-End Isolation	Data Plane Isolation
Use Scenario: Isolating ADC/DAC interface between high-voltage sensor front-end and low-voltage digital processing unit in CT/MRI systems. IC Role / Device Role / Timing Role: Dual-channel LVDS isolator bridging isolated domains while preserving sub-nanosecond timing alignment and jitter performance. Use Value: Enables 600 Mbps LVDS data transfer across reinforced insulation barrier, meeting IEC 60601-1 MOPP requirements without sacrificing throughput or SNR.	Use Scenario: Segregating high-speed data lanes between FPGA-based baseband processor and RF transceiver in 5G small cell radios. IC Role / Device Role / Timing Role: Galvanic isolator for JESD204B/C lanes carrying sampled IQ data, maintaining deterministic latency and low BER. Use Value: 151 ps total jitter at 600 Mbps ensures <1e−12 bit error rate over 20 cm FR4 traces, avoiding retiming or forward error correction overhead.
Isolated High-Speed Clock Links	Isolated SPI-over-LVDS
Use Scenario: Distributing synchronized 300 MHz sampling clocks from master clock generator to multiple isolated ADCs in distributed DAQ systems. IC Role / Device Role / Timing Role: Low-skew LVDS isolator delivering matched propagation delay (<4.5 ns) and <100 ps pulse skew across both channels. Use Value: Enables sub-2 ps channel-to-channel skew between clock outputs, critical for time-interleaved ADC architectures requiring phase coherence.	Use Scenario: Extending SPI bus across isolation barrier in programmable logic controllers (PLCs) to communicate with isolated analog I/O modules. IC Role / Device Role / Timing Role: Bidirectional LVDS isolator converting standard SPI signals to differential format, then re-isolating SCLK/MOSI/MISO/SS lines. Use Value: Fail-safe output high ensures SPI slave remains in known state during power sequencing or cable disconnect-prevents spurious writes or configuration corruption.

Analog Front-End Isolation

Data Plane Isolation

Use Scenario: Isolating ADC/DAC interface between high-voltage sensor front-end and low-voltage digital processing unit in CT/MRI systems.

IC Role / Device Role / Timing Role: Dual-channel LVDS isolator bridging isolated domains while preserving sub-nanosecond timing alignment and jitter performance.

Use Value: Enables 600 Mbps LVDS data transfer across reinforced insulation barrier, meeting IEC 60601-1 MOPP requirements without sacrificing throughput or SNR.

Use Scenario: Segregating high-speed data lanes between FPGA-based baseband processor and RF transceiver in 5G small cell radios.

IC Role / Device Role / Timing Role: Galvanic isolator for JESD204B/C lanes carrying sampled IQ data, maintaining deterministic latency and low BER.

Use Value: 151 ps total jitter at 600 Mbps ensures <1e−12 bit error rate over 20 cm FR4 traces, avoiding retiming or forward error correction overhead.

Isolated High-Speed Clock Links

Isolated SPI-over-LVDS

Use Scenario: Distributing synchronized 300 MHz sampling clocks from master clock generator to multiple isolated ADCs in distributed DAQ systems.

IC Role / Device Role / Timing Role: Low-skew LVDS isolator delivering matched propagation delay (<4.5 ns) and <100 ps pulse skew across both channels.

Use Value: Enables sub-2 ps channel-to-channel skew between clock outputs, critical for time-interleaved ADC architectures requiring phase coherence.

Use Scenario: Extending SPI bus across isolation barrier in programmable logic controllers (PLCs) to communicate with isolated analog I/O modules.

IC Role / Device Role / Timing Role: Bidirectional LVDS isolator converting standard SPI signals to differential format, then re-isolating SCLK/MOSI/MISO/SS lines.

Use Value: Fail-safe output high ensures SPI slave remains in known state during power sequencing or cable disconnect-prevents spurious writes or configuration corruption.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS isolator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADN4651BRSZ-RL7	Same 20-lead SSOP package and 3.75 kV_RMS rating, but with reversed I/O direction on Channel 2 (DIN2+/DIN2− on pins 13/14, DOUT2+/DOUT2− on pins 7/8).	Requires PCB layout revision to match pin mapping; suitable only when system-level signal flow matches ADN4651's channel assignment.	Select ADN4651BRSZ-RL7 only if existing design uses ADN4651 pinout or requires identical I/O orientation on both sides.
ISO6721DR	Texas Instruments 2-channel digital isolator with 5000 VRMS rating (SOIC-16), 150 Mbps max rate, and CMOS I/O-not LVDS-compliant.	Lacks TIA/EIA-644-A compliance, higher jitter (>300 ps), and no fail-safe logic; unsuitable for >300 Mbps LVDS links or medical AFEs.	Choose ISO6721DR only for cost-sensitive, lower-speed digital isolation where LVDS signaling and regulatory certifications are not required.

Compared with ADN4652BRSZ-RL7, ADN4651BRSZ-RL7 offers identical isolation and jitter specs but incompatible pin mapping, while ISO6721DR trades LVDS compatibility and speed for lower cost and higher isolation voltage-making it unsuitable as a drop-in replacement in high-speed, standards-compliant applications.

Availability

ADN4652BRSZ-RL7 is available at Aetrix Electronics and suitable for industrial motor drives, medical imaging subsystems, and 5G infrastructure requiring stable component supply, long-term lifecycle support, and traceable sourcing of safety-certified isolators.

Supply support for ADN4652BRSZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The ADN465x family was designed specifically for high-speed, safety-certified LVDS isolation in demanding applications including medical diagnostics, industrial automation, and communications infrastructure-leveraging iCoupler® technology for reliability and integration.

FAQ

What is the isolation voltage rating of the ADN4652BRSZ-RL7?

The ADN4652BRSZ-RL7 is rated for 3.75 kV_RMS isolation for 1 minute in its 20-lead SSOP package, certified to UL 1577, DIN EN IEC 60747-17 (VDE 0884-17), and IEC/CSA 60601-1. Its VIORM is 600 V_PEAK, supporting reinforced insulation in medical and industrial equipment.

Does the ADN4652BRSZ-RL7 support 600 Mbps operation with PRBS23 pattern?

Yes, the ADN4652BRSZ-RL7 is fully specified for 600 Mbps operation with 2²³−1 PRBS input patterns, delivering ≤151 ps peak-to-peak total jitter at BER 1×10⁻¹². This performance is validated per Analog Devices Rev. G datasheet Table 3 and Figure 37.

How does the fail-safe feature operate in the ADN4652BRSZ-RL7?

The ADN4652BRSZ-RL7's fail-safe mechanism drives DOUTx± high when DINx± is open, shorted, or terminated but undriven-ensuring defined logic state during faults. The fail-safe delay is 1.2 µs maximum, as specified in Table 3 of the ADN4652BRSZ-RL7 datasheet.

Can the ADN4652BRSZ-RL7 be powered directly from a 3.3 V supply?

Yes, the ADN4652BRSZ-RL7 accepts 3.3 V on VIN1/VIN2 pins and uses internal LDOs to generate regulated 2.5 V supplies for VDD1/VDD2. External 2.5 V can also be applied directly to VDD1/VDD2, bypassing the LDOs-both configurations are supported per Table 11.

What package type is used for the ADN4652BRSZ-RL7?

The ADN4652BRSZ-RL7 uses a 20-lead SSOP package (Analog Devices part number suffix "BRSZ") with 5.3 mm creepage and clearance, optimized for 3.75 kV_RMS isolation and compact board layouts in space-constrained applications like modular PLCs and portable medical devices.

ADN4652BRSZ-RL7 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: iCoupler®

Package/Case:: 20-SSOP (0.209", 5.30mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Technology:: Magnetic Coupling

Type:: LVDS

Isolated Power:: No

Number of Channels:: 2

Inputs - Side 1/Side 2:: 1/1

Channel Type:: Unidirectional

Voltage - Isolation:: 3750Vrms

Common Mode Transient Immunity (Min):: 25kV/µs

Data Rate:: 600Mbps

Propagation Delay tpLH / tpHL (Max):: 4.5ns, 4.5ns

Pulse Width Distortion (Max):: -

Rise / Fall Time (Typ):: 0.35ns, 0.35ns (Max)

Voltage - Supply:: 2.375V ~ 2.625V

Grade:: -

Qualification:: -

Operating Temperature:: -40°C ~ 125°C

Mounting Type:: Surface Mount

Supplier Device Package:: 20-SSOP

ADN4652BRSZ-RL7 FAQ

1.How can I place an order for ADN4652BRSZ-RL7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADN4652BRSZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADN4652BRSZ-RL7 reliable?

The price and inventory of ADN4652BRSZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADN4652BRSZ-RL7 is usually 5 days.

3.What payment methods are accepted for ADN4652BRSZ-RL7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADN4652BRSZ-RL7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADN4652BRSZ-RL7?

ADN4652BRSZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADN4652BRSZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADN4652BRSZ-RL7?

For technical support, including ADN4652BRSZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADN4652BRSZ-RL7 requirements.

6.How does Aetrix verify that ADN4652BRSZ-RL7 is sourced from the original manufacturer or authorized distributors?

All ADN4652BRSZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADN4652BRSZ-RL7 meets industry standards.

7.What is the process for return or replacement of ADN4652BRSZ-RL7?

All ADN4652BRSZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADN4652BRSZ-RL7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADN4652BRSZ-RL7 part is unused and in its original packaging.

Return procedure for ADN4652BRSZ-RL7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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