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Home > Products > Isolators > Digital Isolators

Analog Devices Inc. ADN4652BRWZ-RL7

Name: ADN4652BRWZ-RL7
Brand: Analog Devices Inc.
SKU: ADN4652BRWZ-RL7
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADN4652BRWZ-RL7

Manufacturer:: Analog Devices Inc.

Category:: Digital Isolators

Package:: 20-SOIC (0.295", 7.50mm Width)

Datasheet:: ADN4652BRWZ-RL7.pdf

Description:: DGT ISO 5000VRMS 2CH LVDS 20SOIC

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Product details

Overview

ADN4652BRWZ-RL7 from Analog Devices is a dual-channel, 5 kV_RMS galvanically isolated LVDS buffer supporting up to 600 Mbps data rates with 4.5 ns max propagation delay, 151 ps peak-to-peak total jitter, and fail-safe output high for open/short/terminated inputs. It operates across −40°C to +125°C and isolates high-speed serial links in industrial AFEs and isolated SPI over LVDS.

For engineers reviewing the ADN4652BRWZ-RL7 datasheet, ADN4652BRWZ-RL7 pinout, ADN4652BRWZ-RL7 application, or ADN4652BRWZ-RL7 equivalent, this page delivers verified isolation specs, side-specific power architecture, fail-safe timing behavior, and SOIC-20 package–level implementation details required for safety-critical, high-speed signal chain design.

Technical Context

The ADN4652BRWZ-RL7 integrates iCoupler® technology to provide reinforced galvanic isolation between two independent LVDS channels, each with separate input-side (Side 1) and output-side (Side 2) 2.5 V supplies-optionally derived from 3.3 V via integrated LDOs. Its architecture supports TIA/EIA-644-A compliance on both sides with differential thresholds of ±100 mV and 100 Ω termination compatibility.

Unlike ADN4650 and ADN4651, the ADN4652BRWZ-RL7 features cross-channel pin mapping: DIN1± and DOUT1± are swapped on Side 1, while DIN2± and DOUT2± are swapped on Side 2-enabling bidirectional channel routing without external trace crossover. Fail-safe logic asserts high on DOUTx± when |VID| < 100 mV, with 1.2 µs maximum activation delay.

Key Specifications

Parameter	Value and Actual Design Meaning
Isolation Rating	5 kV_RMS for 1 minute (SOIC-20 package); enables reinforced insulation per UL 1577, IEC/CSA 62368-1, and IEC/CSA 60601-1
Max Data Rate	600 Mbps (PRBS23); supports high-speed serial interfaces including isolated clock/data links and SPI over LVDS
Propagation Delay	4.5 ns max; ensures tight timing alignment in deterministic real-time systems with sub-nanosecond skew budgets
Total Jitter (BER 1e−12)	151 ps peak-to-peak; meets jitter budget requirements for 600 Mbps LVDS links with <1 UI margin
Fail-Safe Activation	1.2 µs max delay to high output under open/short/terminated input; prevents undefined states during initialization or fault conditions
Supply Options	2.5 V core supply (VDD1/VDD2) with optional 3.3 V LDO input (VIN1/VIN2); simplifies mixed-voltage system integration
Common-Mode Transient Immunity	>25 kV/µs; maintains signal integrity in noisy industrial environments with fast-switching power stages

Pinout & Package

ADN4652BRWZ-RL7 is housed in a 20-lead wide-body SOIC package (RW-20) with 7.8 mm creepage/clearance, rated for 5 kV_RMS isolation and RoHS-compliant lead finish.

Pin/Terminal	Circuit Role	Design Meaning
1, 20	VIN1 / VIN2	Optional 3.3 V LDO inputs for Side 1 and Side 2; bypass to respective GNDx with 1 µF capacitors
2, 4, 10 / 11, 17, 19	GND1 / GND2	Separate ground references per isolation side; mandatory for noise-free LVDS operation and isolation barrier integrity
3, 9 / 12, 18	VDD1 / VDD2	2.5 V core supplies for LVDS drivers/receivers; must be bypassed with 0.1 µF capacitors to respective GNDx
5, 6 / 15, 16	DOUT1+ / DOUT1− / DIN1− / DIN1+	Side 1 cross-mapped I/O: pins 5/6 = DOUT1±, pins 15/16 = DIN1± - enables direct point-to-point routing without layer swaps
7, 8 / 13, 14	DIN2+ / DIN2− / DOUT2− / DOUT2+	Side 2 cross-mapped I/O: pins 7/8 = DIN2±, pins 13/14 = DOUT2± - supports bidirectional channel assignment flexibility

Key Features

Feature	Design Value
Fail-safe output high	Guarantees Logic 1 on DOUTx± when \|VID\| < 100 mV (open, shorted, or terminated but undriven), eliminating need for external pull-ups
Integrated LDOs	On-chip low-dropout regulators accept 3.0–3.6 V on VIN1/VIN2 and deliver regulated 2.5 V (±62.5 mV) to VDD1/VDD2
High CMRI	>25 kV/µs common-mode transient immunity ensures reliable operation in motor drives, inverters, and PLC backplanes
ESD robustness	±8 kV HBM on all pins and ±8 kV IEC 61000-4-2 across isolation barrier - reduces system-level protection component count
Regulatory compliance	UL 1577, VDE 0884-17 (reinforced), IEC/CSA 60601-1 (1 MOPP), and EN55022 Class B radiated emissions certified

Applications

Analog Front-End Isolation	Data Plane Isolation
Use Scenario: Isolating ADC/DAC interface lines between high-voltage sensor front-end and low-voltage digital processing unit in industrial motor control. IC Role / Device Role / Timing Role: Dual-channel LVDS isolator preserving 600 Mbps timing integrity while breaking ground loops and blocking >25 kV/µs transients. Use Value: Enables direct connection of isolated 16-bit ADCs without retiming or jitter cleanup, maintaining SNR and THD performance.	Use Scenario: Separating high-speed FPGA-to-FPGA data lanes in redundant control systems where fault containment is critical. IC Role / Device Role / Timing Role: Galvanic barrier for full-duplex LVDS data streams, with matched channel skew (<500 ps) and deterministic jitter <96 ps PP. Use Value: Eliminates inter-chassis ground bounce and allows independent power domain sequencing without data corruption.
Isolated High-Speed Clock Link	Isolated SPI over LVDS
Use Scenario: Distributing a 300 MHz sampling clock from an isolated master clock generator to multiple isolated ADCs in medical imaging equipment. IC Role / Device Role / Timing Role: Low-jitter LVDS repeater with 4.5 ns propagation delay and 387 fs RMS additive phase jitter (100 Hz–100 kHz). Use Value: Maintains sub-picosecond clock edge fidelity across isolation barrier, enabling synchronized multi-channel acquisition.	Use Scenario: Extending SPI bus across isolation boundary in programmable logic controllers, connecting isolated MCU to isolated IO expanders. IC Role / Device Role / Timing Role: Bidirectional LVDS isolator supporting full-duplex SPI SCLK/MOSI/MISO at up to 600 Mbps aggregate rate. Use Value: Doubles effective SPI throughput versus standard digital isolators while retaining fail-safe idle-high signaling for robust command framing.

Analog Front-End Isolation

Data Plane Isolation

Use Scenario: Isolating ADC/DAC interface lines between high-voltage sensor front-end and low-voltage digital processing unit in industrial motor control.

IC Role / Device Role / Timing Role: Dual-channel LVDS isolator preserving 600 Mbps timing integrity while breaking ground loops and blocking >25 kV/µs transients.

Use Value: Enables direct connection of isolated 16-bit ADCs without retiming or jitter cleanup, maintaining SNR and THD performance.

Use Scenario: Separating high-speed FPGA-to-FPGA data lanes in redundant control systems where fault containment is critical.

IC Role / Device Role / Timing Role: Galvanic barrier for full-duplex LVDS data streams, with matched channel skew (<500 ps) and deterministic jitter <96 ps PP.

Use Value: Eliminates inter-chassis ground bounce and allows independent power domain sequencing without data corruption.

Isolated High-Speed Clock Link

Isolated SPI over LVDS

Use Scenario: Distributing a 300 MHz sampling clock from an isolated master clock generator to multiple isolated ADCs in medical imaging equipment.

IC Role / Device Role / Timing Role: Low-jitter LVDS repeater with 4.5 ns propagation delay and 387 fs RMS additive phase jitter (100 Hz–100 kHz).

Use Value: Maintains sub-picosecond clock edge fidelity across isolation barrier, enabling synchronized multi-channel acquisition.

Use Scenario: Extending SPI bus across isolation boundary in programmable logic controllers, connecting isolated MCU to isolated IO expanders.

IC Role / Device Role / Timing Role: Bidirectional LVDS isolator supporting full-duplex SPI SCLK/MOSI/MISO at up to 600 Mbps aggregate rate.

Use Value: Doubles effective SPI throughput versus standard digital isolators while retaining fail-safe idle-high signaling for robust command framing.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel LVDS isolator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADN4651BRWZ-RL7	Same SOIC-20 package and 5 kV_RMS rating, but with DIN1±/DOUT2± and DIN2±/DOUT1± cross-wiring - not pin-compatible with ADN4652BRWZ-RL7	Optimized for asymmetric routing where input and output channels are physically separated across PCB layers	Select ADN4651BRWZ-RL7 only when board layout requires decoupled input/output placement per channel
ISO6721FDWR	2-channel digital isolator (not LVDS-specific); 5000 VRMS, 50 Mbps max, no integrated LDO, no fail-safe output	Suitable for lower-speed control signaling (e.g., enable, reset) but cannot replace ADN4652BRWZ-RL7 in 600 Mbps LVDS data paths	Use ISO6721FDWR only for non-LVDS, low-bandwidth isolation where jitter and differential signaling are not required

Compared with ADN4651BRWZ-RL7 and ISO6721FDWR, the ADN4652BRWZ-RL7 uniquely delivers 600 Mbps LVDS isolation with fail-safe logic, integrated LDOs, and side-specific pin mapping-making it irreplaceable for high-fidelity, high-speed analog and digital data isolation where timing, signal integrity, and safety certification are jointly constrained.

Availability

ADN4652BRWZ-RL7 is available at Aetrix Electronics and suitable for industrial motor drives, medical imaging subsystems, and programmable logic controller data planes requiring stable component supply, long-term lifecycle support, and certified 5 kV_RMS isolation.

Supply support for ADN4652BRWZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The ADN4652BRWZ-RL7 belongs to the ADN465x family of high-speed LVDS isolators, engineered specifically for safety-certified, jitter-sensitive data plane isolation in industrial automation, medical instrumentation, and test equipment.

FAQ

What is the isolation voltage rating of the ADN4652BRWZ-RL7?

The ADN4652BRWZ-RL7 is rated for 5 kV_RMS isolation for 1 minute in its 20-lead SOIC package (RW-20), meeting UL 1577, VDE 0884-17 (reinforced), and IEC/CSA 60601-1 standards. This rating applies to the full input-to-output barrier and supports reinforced insulation in medical and industrial safety-critical designs.

Does the ADN4652BRWZ-RL7 support 3.3 V-only operation?

Yes-the ADN4652BRWZ-RL7 accepts 3.0 V to 3.6 V on VIN1 and VIN2 to power internal LDOs that generate regulated 2.5 V supplies for VDD1 and VDD2. External 2.5 V supplies may also be used directly by connecting VINx to VDDx, bypassing the LDOs entirely.

How does the fail-safe function behave in the ADN4652BRWZ-RL7?

The ADN4652BRWZ-RL7 asserts a Logic 1 on DOUTx± when |VID| falls below 100 mV-covering open, shorted, or terminated-but-undriven input conditions. The fail-safe transition occurs within 1.2 µs, ensuring defined outputs during power-up, cable disconnect, or driver failure without external components.

What is the maximum data rate supported by the ADN4652BRWZ-RL7?

The ADN4652BRWZ-RL7 supports up to 600 Mbps per channel using PRBS23 patterns, verified per TIA/EIA-644-A LVDS compliance. This rate is sustained with ≤151 ps total jitter (BER 1×10⁻¹²) and ≤100 ps pulse skew, making it suitable for high-speed serial links in data acquisition and FPGA interconnects.

Can the ADN4652BRWZ-RL7 replace the ADN4650BRWZ-RL7 in an existing design?

No-pinouts differ across the ADN4650/ADN4651/ADN4652 variants. The ADN4652BRWZ-RL7 maps DIN1± to pins 15/16 and DOUT1± to pins 5/6, whereas the ADN4650BRWZ-RL7 places DIN1± on pins 5/6 and DOUT1± on pins 15/16. Direct replacement requires PCB layout revision to accommodate cross-mapped I/O.

ADN4652BRWZ-RL7 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: iCoupler®

Package/Case:: 20-SOIC (0.295", 7.50mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Technology:: Magnetic Coupling

Type:: LVDS

Isolated Power:: No

Number of Channels:: 2

Inputs - Side 1/Side 2:: 1/1

Channel Type:: Unidirectional

Voltage - Isolation:: 5000Vrms

Common Mode Transient Immunity (Min):: 25kV/µs

Data Rate:: 600Mbps

Propagation Delay tpLH / tpHL (Max):: 4.5ns, 4.5ns

Pulse Width Distortion (Max):: -

Rise / Fall Time (Typ):: 0.35ns, 0.35ns (Max)

Voltage - Supply:: 2.375V ~ 2.625V

Grade:: -

Qualification:: -

Operating Temperature:: -40°C ~ 125°C

Mounting Type:: Surface Mount

Supplier Device Package:: 20-SOIC

ADN4652BRWZ-RL7 FAQ

1.How can I place an order for ADN4652BRWZ-RL7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADN4652BRWZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADN4652BRWZ-RL7 reliable?

The price and inventory of ADN4652BRWZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADN4652BRWZ-RL7 is usually 5 days.

3.What payment methods are accepted for ADN4652BRWZ-RL7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADN4652BRWZ-RL7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADN4652BRWZ-RL7?

ADN4652BRWZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADN4652BRWZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADN4652BRWZ-RL7?

For technical support, including ADN4652BRWZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADN4652BRWZ-RL7 requirements.

6.How does Aetrix verify that ADN4652BRWZ-RL7 is sourced from the original manufacturer or authorized distributors?

All ADN4652BRWZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADN4652BRWZ-RL7 meets industry standards.

7.What is the process for return or replacement of ADN4652BRWZ-RL7?

All ADN4652BRWZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADN4652BRWZ-RL7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADN4652BRWZ-RL7 part is unused and in its original packaging.

Return procedure for ADN4652BRWZ-RL7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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