Analog Devices Inc. ADN4655BRWZ

Overview

ADN4655BRWZ from Analog Devices is a dual-channel, 5 kV_RMS galvanically isolated LVDS buffer supporting up to 1.1 Gbps data rate with 4 ns typical propagation delay, 2.6 ps_RMS random jitter, and fail-safe output high for open/short/terminated inputs. It operates across −40°C to +125°C and targets high-speed isolation in video, imaging, and data plane links.

For engineers reviewing the ADN4655BRWZ datasheet, ADN4655BRWZ pinout, ADN4655BRWZ application, or ADN4655BRWZ equivalent, key selection criteria include reinforced 5 kV_RMS isolation (SOIC_W), LVDS compliance per TIA/EIA-644-A, integrated 2.5 V LDOs accepting 3.3 V input, and fail-safe receiver behavior critical for fault-tolerant serial link design.

Technical Context

The ADN4655BRWZ integrates iCoupler® digital isolation with LVDS transceivers on both sides of a reinforced dielectric barrier, enabling drop-in isolation of existing LVDS signal chains without protocol or timing layer changes. Its architecture includes two independent isolated channels, each with differential receivers and drivers sharing common supply domains (VDD1/GND1 and VDD2/GND2).

Each channel features a fail-safe receiver that drives DOUTx± high when |VID| < 100 mV-covering floating, shorted, or terminated-but-undriven conditions-with 1.2 μs typical fail-safe delay. The device uses internal LDOs to generate stable 2.5 V supplies from 3.3 V inputs, supporting operation at 2.5 V or 3.3 V logic levels while maintaining >25 kV/μs common-mode transient immunity.

Key Specifications

Pinout & Package

ADN4655BRWZ is housed in a 20-lead wide-body SOIC_W package (RW-20) with 7.8 mm minimum creepage and clearance, optimized for reinforced 5 kV_RMS isolation. Pin 1–10 form Side 1 (input side), Pins 11–20 form Side 2 (output side), with dedicated VIN1/VIN2 pins enabling single-supply 3.3 V operation via internal LDOs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS isolator applications.

Compared with ADN4655BRWZ, ADN4654BRWZ removes fail-safe logic but retains identical isolation, speed, and package-making it a functional subset for simpler systems. ISO6721DR lacks LVDS drivers/receivers and integrated regulation, requiring additional components and sacrificing 1.1 Gbps capability.

Availability

ADN4655BRWZ is available at Aetrix Electronics and suitable for isolated video data links, analog front-end isolation, and data plane isolation requiring stable component supply across extended temperature and high-reliability industrial programs.

Supply support for ADN4655BRWZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and healthcare markets.

The ADN4655BRWZ belongs to Analog Devices' iCoupler® LVDS isolator product line, engineered specifically for drop-in galvanic isolation of high-speed serial interfaces while maintaining signal integrity, timing accuracy, and safety certification compliance.

FAQ

What isolation voltage does ADN4655BRWZ support, and what standards does it meet?

ADN4655BRWZ provides 5 kV_RMS isolation for 1 minute per UL 1577 (pending), with VIORM = 424 V_PEAK and compliance to DIN V VDE V 0884-10 (reinforced insulation). It achieves 7.8 mm creepage/clearance in the SOIC_W package and passes EN 55022 Class B radiated emissions at 1.1 Gbps.

Does ADN4655BRWZ require external 2.5 V supplies, or can it operate from 3.3 V?

ADN4655BRWZ can operate directly from a 3.3 V supply using its integrated LDOs: connect 3.3 V to VIN1 and VIN2, bypass each with 1 μF capacitors to GND1/GND2. The internal LDOs generate regulated 2.5 V for VDD1 and VDD2, eliminating need for external 2.5 V rails.

How does the fail-safe feature of ADN4655BRWZ behave under input fault conditions?

When |VID| < 100 mV-such as open-circuit, shorted, or terminated-but-undriven inputs-the ADN4655BRWZ forces DOUTx± high after 1.2 μs typical delay. This ensures defined logic state during cable disconnects or upstream driver failures, preventing undefined bus states in safety-critical links.

What is the maximum data rate supported by ADN4655BRWZ, and what jitter performance is guaranteed?

ADN4655BRWZ supports up to 1.1 Gbps with 90 ps peak-to-peak total jitter at 1.1 Gbps (PRBS23), 2.6 ps_RMS random jitter, and 4 ns typical propagation delay. These values are fully specified over −40°C to +125°C and enable reliable operation in high-speed serial interfaces without re-timing.

Can ADN4655BRWZ replace ADN4654BRWZ in an existing design without layout changes?

Yes-ADN4655BRWZ is pin-compatible with ADN4654BRWZ in the same SOIC_W package and shares identical isolation rating, timing specs, and supply requirements. The only functional difference is the added fail-safe receiver in ADN4655BRWZ, which introduces no layout impact and improves fault tolerance.