Analog Devices Inc. ADP1147AN-3.3
- Part No.:
- ADP1147AN-3.3
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
ADP1147AN-3.3.pdf
- Description:
- STEP-DOWN SWITCHING REG
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADP1147AN-3.3 from Analog Devices is a high-efficiency step-down switching regulator controller designed to drive an external P-channel MOSFET in portable power supplies. It delivers a regulated 3.3 V output at up to 2 A, operates from 3.5 V to 16 V input, features constant off-time current-mode control, and achieves >95% efficiency at 1 A load with VIN = 6 V. It is used in GPS systems and handheld instruments requiring low dropout and automatic power savings mode.
For engineers reviewing the ADP1147AN-3.3 datasheet, ADP1147AN-3.3 pinout, ADP1147AN-3.3 application, or ADP1147AN-3.3 equivalent, key selection criteria include its 3.3 V fixed output, 8-pin PDIP package, 160 µA sleep-mode quiescent current, user-defined current limit via RSENSE, and compatibility with external P-MOSFETs such as IRF7204.
Technical Context
The ADP1147AN-3.3 implements a constant off-time, current-mode architecture that sets switching frequency via external CT capacitor and regulates output by comparing SENSE(–) voltage against an internal 1.25 V reference. Its dual-mode operation-continuous conduction and automatic power savings-switches based on inductor ripple polarity reversal at ~50% of peak current.
During normal operation, the device monitors voltage across RSENSE via SENSE(+) and SENSE(–) to control MOSFET on-time; during light loads, comparator B triggers R-S flip-flop #2 to enter power savings mode, reducing ground current from 1.6 mA to 160 µA typical. In deep sleep, CT discharge below VTH2 disables most circuitry while retaining shutdown responsiveness.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±3% (3.23–3.43 V at 700 mA), enabling direct replacement for 3.3 V logic rails |
| Input Voltage Range | 3.5 V to 16 V - supports single-cell Li-ion (3.5 V min) and multi-cell battery or adapter inputs |
| Efficiency | >95% typical at 1 A, VIN = 6 V - minimizes thermal stress and extends battery life in portable equipment |
| Sleep Mode IQ | 160 µA typical at VIN = 10 V - reduces standby power to ~2.0 mW, critical for always-on GPS receivers |
| Current Sense Threshold | 10–150 mV range across RSENSE - allows precise, user-adjustable current limiting from ~100 mA to 2 A |
| Switching Frequency | Up to 250 kHz (CT-dependent) - balances EMI, inductor size, and MOSFET gate loss trade-offs |
| Shutdown Threshold | 0.55–2.0 V on SHUTDOWN pin - ensures reliable disable with standard logic-level signals |
Pinout & Package
ADP1147AN-3.3 is housed in an 8-lead plastic DIP (N-8) package with 0.3-inch width and through-hole mounting. Thermal resistance θJA = 110°C/W enables operation up to +70°C ambient without forced airflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 1) | Main input supply connection | Accepts 3.5–16 V DC; powers internal circuitry and charges P-DRIVE gate drive path |
| CT (Pin 2) | Timing capacitor node | Controls off-time and thus operating frequency; discharge current scales with VOUT |
| ITH (Pin 3) | Error amplifier decoupling | Stabilizes feedback loop; voltage level modulates current comparator threshold |
| SENSE(–) (Pin 4) | Negative sense input | Connects to internal resistive divider; also serves as (–) input to current comparator |
| SENSE(+) (Pin 5) | Positive sense input | Provides (+) input to current comparator; offset vs. Pin 4 sets trip point across RSENSE |
| SHUTDOWN (Pin 6) | Enable/disable control | Pulled low for normal operation; >2.1 V forces full shutdown (IQ < 28 µA) |
| GND (Pin 7) | Signal and power return | Must be connected separately to COUT negative and Schottky cathode to avoid noise coupling |
| P-DRIVE (Pin 8) | High-current MOSFET gate driver | Swings from VIN to GND; drives external P-MOSFET gate with fast 100–200 ns transitions |
Key Features
| Feature | Design Value |
|---|---|
| Constant off-time current-mode control | Enables wide input range (3.5 V min) and stable operation without loop compensation components |
| Automatic power savings mode | Reduces switching losses below ~1 A load by entering discontinuous conduction, improving light-load efficiency |
| User-defined current limit | Set via external RSENSE (20–200 mΩ); supports precise overcurrent protection and short-circuit foldback |
| Low dropout capability | Minimizes (VIN – VOUT) loss by optimizing RDS(ON), inductor DCR, and RSENSE - critical for battery-powered 3.3 V systems |
| Integrated shutdown function | Logic-compatible enable pin with 0.55–2.0 V threshold and <5 µA input current - simplifies system-level power sequencing |
Applications
| GPS Receivers | Handheld Test Instruments |
|---|---|
Use Scenario: Compact, battery-powered GPS modules requiring stable 3.3 V rail under varying satellite signal acquisition loads (50–2000 mA). IC Role / Device Role / Timing Role: Step-down controller managing external P-MOSFET and Schottky diode to regulate 3.3 V from 3.5–12 V Li-ion or USB input. Use Value: >95% efficiency at 1 A and 160 µA sleep current extend runtime between charges; automatic power savings maintains regulation during low-duty-cycle tracking. | Use Scenario: Portable multimeters and oscilloscope probes needing clean, low-noise 3.3 V supply for ADCs and microcontrollers during intermittent measurement bursts. IC Role / Device Role / Timing Role: Primary DC/DC controller generating regulated 3.3 V output using IRF7204 P-MOSFET and 30BQ040 Schottky diode. Use Value: Constant off-time architecture ensures fast transient response to load steps; low 40–65 mV load regulation preserves measurement accuracy across operating current range. |
| Cellular Handsets | Modem Data Cards |
Use Scenario: Legacy 2G/3G handset baseband subsystems powered from single Li-ion cell (3.4–4.2 V) with burst-mode RF transmission demands. IC Role / Device Role / Timing Role: High-efficiency buck controller delivering 3.3 V at up to 2 A peak during TX bursts while maintaining regulation down to 3.5 V input. Use Value: 3.5 V minimum input operation enables full functionality across battery discharge curve; short-circuit protection prevents damage during antenna mismatch events. | Use Scenario: PCMCIA or ExpressCard modems requiring 3.3 V at ≤1 A from 5–12 V host bus or external adapter, with low standby consumption. IC Role / Device Role / Timing Role: Standalone switching controller interfacing with host-supplied enable signal via SHUTDOWN pin for controlled power-up/down. Use Value: Shutdown current <28 µA meets USB suspend requirements; 8-lead PDIP package allows cost-effective through-hole assembly in legacy telecom designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP1147AR-3.3 | Same electrical specs; SOIC-8 package (θJA = 150°C/W), surface-mount only | Requires PCB rework for SMT assembly; unsuitable for through-hole prototyping or repair | Select when board space is constrained and automated assembly is available. |
| ADP1148AR-3.3 | Higher efficiency (>96%), lower IQ (120 µA sleep), integrated MOSFET driver optimization for N-MOSFETs | Designed for N-channel external FETs (e.g., IRF7403); requires different gate drive topology and layout | Choose for new designs targeting ultra-low standby power and higher peak efficiency; not drop-in compatible. |
Compared with ADP1147AN-3.3, ADP1147AR-3.3 offers identical regulation and control but mandates SMT placement, while ADP1148AR-3.3 improves efficiency and sleep current but requires redesign for N-MOSFET use - neither is pin-compatible, and both demand layout and component changes.
Availability
ADP1147AN-3.3 is available at Aetrix Electronics and suitable for GPS receivers, handheld test instruments, and cellular handsets requiring stable component supply, long-lifecycle support, and through-hole manufacturability.
Supply support for ADP1147AN-3.3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets.
The ADP1147AN-3.3 belongs to Analog Devices' high-efficiency step-down controller product line, engineered specifically for battery-powered portable electronics where wide-input-range operation, automatic light-load efficiency optimization, and external P-MOSFET flexibility are essential.
FAQ
What is the minimum input voltage supported by the ADP1147AN-3.3?
The ADP1147AN-3.3 supports a minimum input voltage of 3.5 V, as explicitly specified for the -3.3 variant in the datasheet's General Description and Absolute Maximum Ratings. This enables operation directly from partially discharged single-cell Li-ion batteries (down to ~3.5 V) without brownout, unlike the ADP1147-5 variant which requires ≥4 V. Operation below 3.5 V may cause regulation loss or undefined behavior.
How does the ADP1147AN-3.3 enter and exit power savings mode?
The ADP1147AN-3.3 enters power savings mode when load current drops below ~50% of the inductor's ripple current, causing the voltage across RSENSE to reverse polarity and trip comparator B, which sets R-S flip-flop #2. It exits this mode when output voltage decays to the VOS threshold (~1.25 V reference level), resetting the flip-flop and resuming cycle-by-cycle control - all without external intervention.
Can the ADP1147AN-3.3 drive an N-channel MOSFET instead of a P-channel device?
No, the ADP1147AN-3.3 is specifically designed to drive external P-channel MOSFETs via its P-DRIVE pin, which swings from VIN to GND. It lacks the bootstrap or high-side gate drive circuitry required for N-MOSFETs. For N-channel solutions, Analog Devices recommends the ADP1148 series, which features optimized drive architecture and different pin functions.
What is the purpose of the ITH pin on the ADP1147AN-3.3?
The ITH pin (Pin 3) on the ADP1147AN-3.3 serves as the error amplifier decoupling node. Its voltage level directly modulates the current comparator's trip threshold, enabling dynamic adjustment of current limit during load transients. A capacitor (typically 3300 pF) is connected here to stabilize the feedback loop and prevent oscillation in the constant off-time control architecture.
Is the ADP1147AN-3.3 RoHS compliant and lead-free?
Yes, the ADP1147AN-3.3 is RoHS compliant and lead-free. Analog Devices confirms RoHS compliance for all ADP1147 variants in the official Product Change Notification (PCN) #06-0112 and datasheet revision history. The "N" suffix denotes plastic DIP packaging, which - per Analog Devices' standard manufacturing practice since 2006 - uses lead-free terminations and halogen-free molding compound.
ADP1147AN-3.3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 3.5V ~ 16V
- Frequency - Switching:
- Up to 250kHz
- Duty Cycle (Max):
- -
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
ADP1147AN-3.3 FAQ
1.How can I place an order for ADP1147AN-3.3 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP1147AN-3.3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP1147AN-3.3 reliable?
The price and inventory of ADP1147AN-3.3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP1147AN-3.3 is usually 5 days.
3.What payment methods are accepted for ADP1147AN-3.3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP1147AN-3.3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP1147AN-3.3?
ADP1147AN-3.3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP1147AN-3.3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP1147AN-3.3?
For technical support, including ADP1147AN-3.3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP1147AN-3.3 requirements.
6.How does Aetrix verify that ADP1147AN-3.3 is sourced from the original manufacturer or authorized distributors?
All ADP1147AN-3.3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP1147AN-3.3 meets industry standards.
7.What is the process for return or replacement of ADP1147AN-3.3?
All ADP1147AN-3.3 units undergo pre-shipment inspection (PSI). If there is an issue with ADP1147AN-3.3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP1147AN-3.3 part is unused and in its original packaging.
Return procedure for ADP1147AN-3.3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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