Analog Devices Inc. ADP1875ARQZ-0.3-R7
- Part No.:
- ADP1875ARQZ-0.3-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
ADP1875ARQZ-0.3-R7.pdf
- Description:
- IC REG CTRLR BUCK 16QSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADP1875ARQZ-0.3-R7 from Analog Devices is a synchronous buck controller implementing constant on-time and valley current mode control for high-efficiency DC/DC conversion. It operates from 2.95 V to 20 V input, delivers 0.6 V output with ±1.0% reference accuracy, supports all-N-channel MOSFET power stages, and includes integrated bootstrap diode and power saving mode (PSM) for light-load efficiency in telecom and server core supplies.
For engineers reviewing the ADP1875ARQZ-0.3-R7 datasheet, ADP1875ARQZ-0.3-R7 pinout, ADP1875ARQZ-0.3-R7 application, or ADP1875ARQZ-0.3-R7 equivalent, key selection criteria include its 300 kHz switching frequency, PSM capability, 16-pin QSOP package, valley-current-limit programmability via RES pin, and compatibility with precharged output startup.
Technical Context
The ADP1875ARQZ-0.3-R7 uses a pseudo-fixed-frequency constant on-time architecture combined with valley current-mode sensing to achieve fast transient response and stable regulation at low duty cycles. Its internal 5 V LDO (VREG) powers gate drivers and bias circuitry, eliminating need for external bias supply.
Valley current sensing enables accurate cycle-by-cycle current limiting without a sense resistor, while the dedicated RES pin allows resistor-programmable gain (3.0 V/V typical with 47 kΩ). Power saving mode (PSM) enables pulse-skipping operation below ~20% load to maintain regulation and improve light-load efficiency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.95 V to 20 V - supports wide-input industrial and telecom power rails without external regulators. |
| Switching Frequency | 300 kHz - balances efficiency, size, and EMI for mid-power applications; fixed by part number variant. |
| Output Reference Voltage | 0.6 V ±1.0% - enables precise low-voltage core regulation (e.g., 0.8 V, 1.2 V, 1.8 V) with tight tolerance over −40°C to +125°C. |
| Current Sense Gain | 3.0 V/V (typ.) with 47 kΩ RES-to-PGND - sets current limit threshold without external shunt resistor. |
| Power Saving Mode | Enabled - reduces quiescent current and improves light-load efficiency via pulse skipping (ADP1875-specific feature). |
| Package | 16-lead QSOP - surface-mount, thermally enhanced package with 104°C/W θJA on 4-layer board. |
| Operating Junction Temp | −40°C to +125°C - qualified for industrial and embedded server environments. |
Pinout & Package
ADP1875ARQZ-0.3-R7 is housed in a 16-lead QSOP (Quad Small Outline Package) with standard 0.154" body width and 0.025" lead pitch. Thermal performance is optimized for PCB layout with separate PGND and GND pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | High-side input supply | Connects to drain of upper N-MOSFET; accepts full 2.95–20 V input range. |
| COMP | Error amplifier output | Interface for Type II/III compensation network to stabilize loop dynamics. |
| EN | Standalone enable input | Logic-high threshold 630 mV (±31 mV hysteresis); enables/disables controller independently of VIN. |
| FB | Feedback node | Non-inverting input of error amp; senses output voltage via resistor divider; 0.6 V reference sets VOUT = 0.6 × (1 + RTOP/RBOT). |
| BST | Bootstrap capacitor connection | Drives high-side gate via internal Schottky diode; requires BST-to-SW capacitor (e.g., 0.1 µF ceramic). |
| SW | Switch node | Connection point between high- and low-side MOSFETs; critical for layout EMI and thermal management. |
| DRVH | High-side gate driver output | Drives upper N-MOSFET gate; 2.25 Ω source / 0.7 Ω sink resistance ensures fast turn-on/turn-off (25 ns rise, 11 ns fall). |
| PGND | Power ground return | Low-impedance return path for low-side driver and MOSFET source; must be separated from analog GND. |
| GND | Analog ground reference | Reference for FB, COMP, RES, SS, TRACK; requires star grounding to minimize noise coupling. |
| DRVL | Low-side gate driver output | Drives lower N-MOSFET gate; also serves as current-sense gain setting pin (RES function shared). |
| RES | Current sense gain programming | Resistor from RES to PGND sets current-sense amplifier gain (3.0 V/V typical with 47 kΩ). |
| PGOOD | Open-drain power-good indicator | Sinks current when FB is out-of-regulation or during thermal shutdown; requires external pull-up to VREG. |
| VREG | Internal 5 V LDO output | Supplies gate drivers and internal circuitry; bypass with 1 µF to PGND and 0.1 µF to GND. |
| VREG_IN | LDO input | Tied directly to VREG pin; not externally connected. |
| SS | Soft-start timing | Capacitor from SS to GND programs soft-start delay (10 nF = 1 ms); prevents inrush and reverse current. |
| TRACK | Output voltage tracking input | Enables sequencing with master rail; offset = VFB − VTRACK = 63 mV (typ.) for controlled ramp alignment. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bootstrap diode | Eliminates external Schottky diode, reducing BOM count and layout area while maintaining reliable high-side drive. |
| Valley current-mode control | Enables accurate, resistorless current limiting and stable operation at very low duty cycles (e.g., 0.8 V out from 16.5 V in). |
| Power saving mode (PSM) | Reduces light-load quiescent current and improves efficiency below ~20% load via controlled pulse skipping. |
| Precharged output startup | Allows safe start into existing output voltage without reverse current flow or latch-up, critical for hot-swap systems. |
| Thermal overload protection | Shuts down at 155°C junction temperature with 15°C hysteresis, preventing damage during sustained overload or poor airflow. |
| Precision enable threshold | 630 mV ±31 mV hysteresis enables clean, noise-immune power sequencing independent of input rail behavior. |
Applications
| Telecom Point-of-Load Supply | Server Core Voltage Regulator |
|---|---|
|
Use Scenario: Regulating 1.8 V or 0.8 V for FPGA or ASIC cores in 48 V intermediate bus telecom systems. IC Role / Device Role / Timing Role: Primary synchronous buck controller managing high-current, low-voltage conversion with fast transient response. Use Value: Achieves >90% efficiency at 12 A load (VIN = 13 V, VOUT = 1.8 V, 300 kHz) while supporting PSM for standby power reduction. |
Use Scenario: Providing tightly regulated 0.6–1.2 V to CPU/GPU cores in dual-socket servers with dynamic load steps. IC Role / Device Role / Timing Role: Valley-current-mode controller delivering sub-1% output voltage accuracy across −40°C to +125°C. Use Value: Maintains ±0.01 V output deviation over full load and temperature range (e.g., 0.8 V ±12.5 mV), ensuring silicon reliability. |
| Set-Top Box Power Management | DSP Processor Supply |
|
Use Scenario: Generating multiple low-noise rails (e.g., 1.2 V, 3.3 V) from 12 V input in consumer multimedia devices. IC Role / Device Role / Timing Role: High-efficiency buck controller enabling compact, fanless thermal design with low quiescent current. Use Value: Delivers >85% efficiency at 100 mA load (VIN = 12 V, VOUT = 1.2 V) using PSM, extending standby battery life. |
Use Scenario: Supplying 1.8 V or 2.5 V to high-speed DSPs in industrial automation controllers with strict ripple limits. IC Role / Device Role / Timing Role: Constant on-time controller minimizing output voltage deviation during rapid load transients (e.g., 1 A/µs). Use Value: Limits output voltage dip to <25 mV during 5 A step load (300 kHz, 1.8 V out), preserving signal integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP1874ARQZ-0.3-R7 | No power saving mode (PSM); fixed PWM operation only; otherwise identical pinout, specs, and control architecture. | Preferred where consistent switching frequency is required for EMI filtering, or where light-load efficiency is secondary to deterministic timing. | Select ADP1874ARQZ-0.3-R7 if PSM is unnecessary and fixed-frequency operation simplifies system-level noise management. |
| TPS54620RGYR | 600 kHz default frequency; integrated FETs (not controller-only); no valley current mode; uses current-mode with external sense resistor. | Better suited for space-constrained designs needing integrated power stage; less optimal for ultra-low-VOUT or precharged-start applications. | Choose TPS54620RGYR when board area is critical and 600 kHz operation with integrated MOSFETs meets efficiency targets. |
Compared with ADP1875ARQZ-0.3-R7, ADP1874ARQZ-0.3-R7 trades light-load efficiency for frequency determinism, while TPS54620RGYR replaces external power stage complexity with reduced design flexibility for low-VOUT and sequencing-critical use cases.
Availability
ADP1875ARQZ-0.3-R7 is available at Aetrix Electronics and suitable for telecom infrastructure, server power delivery, set-top box power management, and DSP processor supply applications requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature range operation.
Supply support for ADP1875ARQZ-0.3-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADP1874/ADP1875 product line delivers high-efficiency, high-accuracy synchronous buck controllers for demanding point-of-load applications in telecom, computing, and industrial systems where precision regulation and thermal robustness are essential.
FAQ
What is the switching frequency of the ADP1875ARQZ-0.3-R7?
The ADP1875ARQZ-0.3-R7 is factory-configured for a nominal 300 kHz switching frequency, as indicated by the "-0.3" suffix. This frequency remains stable across input voltage and load conditions within ±10% under typical operating conditions, enabling predictable EMI filter design and thermal management.
Does the ADP1875ARQZ-0.3-R7 require an external current-sense resistor?
No, the ADP1875ARQZ-0.3-R7 implements valley current-mode sensing using the low-side MOSFET's RDS(on) and does not require an external current-sense resistor. Current limit is set via the RES pin with a single external resistor (e.g., 47 kΩ for 3.0 V/V gain), reducing component count and board area.
Can the ADP1875ARQZ-0.3-R7 start into a precharged output?
Yes, the ADP1875ARQZ-0.3-R7 supports precharged output startup. Its control architecture prevents reverse current flow during startup by monitoring SW node voltage and disabling gate drive until conditions are safe, making it suitable for hot-swap and redundant power systems.
What is the purpose of the TRACK pin on the ADP1875ARQZ-0.3-R7?
The TRACK pin enables output voltage sequencing by accepting an external ramp voltage. The ADP1875ARQZ-0.3-R7 regulates its FB node to track this input with a fixed 63 mV offset, allowing coordinated power-up/down with master rails in multi-rail systems such as FPGAs or processors.
How is soft-start configured on the ADP1875ARQZ-0.3-R7?
Soft-start is configured by connecting an external capacitor from the SS pin to GND. The soft-start period scales linearly at 10 nF per 1 ms (e.g., 100 nF yields ~10 ms delay), limiting inrush current and providing controlled output voltage ramp during power-up.
ADP1875ARQZ-0.3-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 2.95V ~ 20V
- Frequency - Switching:
- 300kHz
- Duty Cycle (Max):
- 84%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QSOP
ADP1875ARQZ-0.3-R7 FAQ
1.How can I place an order for ADP1875ARQZ-0.3-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP1875ARQZ-0.3-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP1875ARQZ-0.3-R7 reliable?
The price and inventory of ADP1875ARQZ-0.3-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP1875ARQZ-0.3-R7 is usually 5 days.
3.What payment methods are accepted for ADP1875ARQZ-0.3-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP1875ARQZ-0.3-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP1875ARQZ-0.3-R7?
ADP1875ARQZ-0.3-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP1875ARQZ-0.3-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP1875ARQZ-0.3-R7?
For technical support, including ADP1875ARQZ-0.3-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP1875ARQZ-0.3-R7 requirements.
6.How does Aetrix verify that ADP1875ARQZ-0.3-R7 is sourced from the original manufacturer or authorized distributors?
All ADP1875ARQZ-0.3-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP1875ARQZ-0.3-R7 meets industry standards.
7.What is the process for return or replacement of ADP1875ARQZ-0.3-R7?
All ADP1875ARQZ-0.3-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP1875ARQZ-0.3-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP1875ARQZ-0.3-R7 part is unused and in its original packaging.
Return procedure for ADP1875ARQZ-0.3-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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