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Analog Devices Inc. ADP2119ACPZ-3.3-R7
- Part No.:
- ADP2119ACPZ-3.3-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-VFDFN Exposed Pad, CSP
- Datasheet:
-
ADP2119ACPZ-3.3-R7.pdf
- Description:
- IC REG BUCK 3.3V 2A 10LFCSP
- Quantity:
- Payment:
- Shipping:
Inventory:1,666
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Product details
Overview
ADP2119ACPZ-3.3-R7 from Analog Devices is a fixed-output, 3.3 V, 2 A synchronous step-down DC-DC regulator in a 10-lead 3 mm × 3 mm LFCSP_WD package. It operates from 2.3 V to 5.5 V input, delivers ±1.5% output accuracy, features 1.2 MHz fixed switching frequency with synchronization capability (1–2 MHz), and supports PWM/PPM mode selection via SYNC/MODE pin. It powers FPGA core/I/O rails in compact communications equipment.
For engineers reviewing the ADP2119ACPZ-3.3-R7 datasheet, ADP2119ACPZ-3.3-R7 pinout, ADP2119ACPZ-3.3-R7 application, or ADP2119ACPZ-3.3-R7 equivalent, key selection criteria include its 2 A continuous output, integrated 145 mΩ/70 mΩ MOSFETs, precision enable threshold (1.2 V typ), power-good flag, and voltage tracking capability for multi-rail sequencing.
Technical Context
The ADP2119ACPZ-3.3-R7 uses a current-mode, constant-frequency PWM architecture with slope compensation to ensure stability up to 100% duty cycle. Its peak-current limit is 2.5–3.5 A (typ 3 A) at 3.3 V input, and it integrates soft start (853 µs at 1.2 MHz), undervoltage lockout (2.2–2.3 V rising), and thermal shutdown (150°C).
It supports dual operating modes: forced PWM (CCM) when SYNC/MODE = VIN, or automatic PFM/PWM transition at light loads when SYNC/MODE = GND. The TRK pin enables precise voltage tracking of master supplies, critical for FPGA I/O/core rail coordination during power-up and brownout conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±1.5% - eliminates external feedback resistors and ensures stable rail for USB PHY, Ethernet MAC, or DDR I/O interfaces. |
| Continuous Output Current | 2 A - supports high-current digital loads like FPGA I/O banks or SoC peripherals without external current boosting. |
| Input Voltage Range | 2.3 V to 5.5 V - compatible with single-cell Li-ion (3.0–4.2 V), USB 5 V, or regulated 3.3 V intermediate bus architectures. |
| Switching Frequency | 1.2 MHz (fixed), synchronizable 1–2 MHz - enables use of small 1.5 µH inductors and reduces EMI filtering burden in space-constrained PCBs. |
| Integrated MOSFETs | 145 mΩ high-side P-MOSFET + 70 mΩ low-side N-MOSFET - achieves >90% efficiency at 1 A (VIN = 5 V, VOUT = 3.3 V) with no external power switches required. |
| Quiescent Current | 680–900 µA (switching, no load) - minimizes standby power loss in always-on subsystems such as network management controllers. |
| Enable Threshold | 1.2 V typical with 100 mV hysteresis - allows precise power sequencing using simple resistor dividers from upstream rails or microcontroller GPIOs. |
Pinout & Package
ADP2119ACPZ-3.3-R7 is housed in a thermally enhanced 10-lead, 3 mm × 3 mm LFCSP_WD package with exposed pad soldered to PCB ground plane for optimal thermal dissipation (θJA = 40°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Bias supply input | Provides internal circuitry bias; requires 0.1 µF bypass capacitor and 10 Ω series resistor to PVIN to isolate noise from power path. |
| PVIN | Main power input | Connects directly to input source (e.g., 5 V bus); bypassed to PGND with bulk capacitor for high di/dt current return. |
| SW | Switch node | Drives external inductor; must be routed with minimal loop area to reduce EMI and voltage spikes during switching transitions. |
| PGND | Power ground | High-current return path for MOSFETs; tied to power plane under IC and connected to exposed pad for thermal + electrical performance. |
| GND | Analog ground | Reference for FB, EN, TRK, PGOOD; kept separate from PGND until single-point connection near input capacitor to avoid noise coupling. |
| FB | Feedback sense | Internally connected to 3.3 V output (fixed version); not used externally-shorting to VOUT is unnecessary and unsupported. |
| TRK | Voltage tracking input | Accepts 0–600 mV reference; enables coordinated ramp-up with master rail (e.g., FPGA core) by connecting to resistor divider off that rail. |
| PGOOD | Open-drain status flag | Asserts high after soft start and when FB is within 105–115% of target; requires external pull-up ≤5.5 V for system power-good signaling. |
| SYNC/MODE | Frequency sync / mode select | Driven high → forced PWM (CCM); driven low → auto PFM/PWM; driven by external 1–2 MHz clock → synchronized operation. |
| EN | Enable control | Active-high with 1.2 V threshold; internal 1 MΩ pull-down prevents false turn-on; supports precise sequencing via external divider or MCU GPIO. |
Key Features
| Feature | Design Value |
|---|---|
| Voltage tracking (TRK) | Enables monotonic, matched-ramp startup with master supplies (e.g., FPGA core), preventing reverse current and latch-up during power sequencing. |
| Integrated soft start (853 µs @ 1.2 MHz) | Controls output rise time to limit inrush current into downstream capacitors-critical for avoiding input bus droop in multi-regulator systems. |
| Power-good (PGOOD) flag | Provides system-level reset or enable handshaking signal only after regulation is established and stable, improving boot reliability. |
| Startup with precharged output | Prevents reverse inductor current when VOUT is already charged, eliminating output capacitor discharge and enabling hot-swap compatibility. |
| Comprehensive protection suite | Includes UVLO (2.2 V), OVP, OCP (3 A peak), and thermal shutdown (150°C) - ensures robust operation under fault conditions without external supervision. |
Applications
| Point-of-Load FPGA Power | USB 3.0 Peripheral Supply |
|---|---|
Use Scenario: Powers I/O banks of Xilinx Artix-7 or Intel Cyclone V FPGA where tight voltage tolerance and sequencing with core rail are mandatory. IC Role / Device Role / Timing Role: Fixed 3.3 V buck regulator providing primary I/O rail; TRK pin tracks core rail (1.2 V) for controlled ramp alignment. Use Value: Eliminates need for external tracking circuitry; ±1.5% accuracy meets FPGA I/O spec; 2 A headroom supports full-bank drive strength. | Use Scenario: Supplies VBUS-compatible 3.3 V rail for USB 3.0 hub controller, transceiver, or Type-C port controller in portable docking stations. IC Role / Device Role / Timing Role: Primary 3.3 V converter delivering clean, low-noise power with fast transient response to handle USB packet burst loading. Use Value: 1.2 MHz switching enables compact 1.5 µH inductor; PFM mode extends battery life during idle link states. |
| Industrial Ethernet Node | Medical Sensor Interface |
Use Scenario: Powers PHY layer and microcontroller in DIN-rail mounted Ethernet I/O module operating from 24 V DC-DC intermediate bus (5 V output). IC Role / Device Role / Timing Role: Secondary 3.3 V regulator stepping down from 5 V intermediate rail; PGOOD signals MCU readiness to initialize Ethernet stack. Use Value: High efficiency (>92% at 1 A) reduces thermal load in sealed enclosures; SYNC input allows EMI spread-spectrum alignment with other converters. | Use Scenario: Supplies analog front-end (AFE) and low-power MCU in handheld patient monitor requiring ultra-low standby current and reliable cold-start behavior. IC Role / Device Role / Timing Role: Always-on 3.3 V rail with <1 µA shutdown current; soft start prevents sensor offset shift during power-up. Use Value: 0.3–2 µA shutdown current preserves battery life; ±1.5% accuracy maintains ADC reference integrity across temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62130ARGTR | 3 A output, 2.7–6 V input, 3.3 V fixed, 2.5 MHz switching, no TRK pin, different pinout | Lacks voltage tracking; higher frequency demands smaller inductor but increases EMI sensitivity | Select when higher current headroom is needed and tracking is unnecessary; verify layout compatibility due to non-pin-compatible footprint. |
| RT7295BGJ6F | 2 A output, 2.5–5.5 V input, 3.3 V fixed, 1.5 MHz switching, no PFM mode, no TRK | No light-load efficiency optimization; lacks sequencing support for multi-rail systems | Choose for cost-sensitive industrial controls where fixed PWM operation suffices and thermal margin is adequate. |
Compared with TPS62130ARGTR and RT7295BGJ6F, ADP2119ACPZ-3.3-R7 uniquely combines 2 A capability with voltage tracking, PFM/PWM mode flexibility, and precision enable threshold-making it optimal for FPGA, USB, and medical applications demanding coordinated power sequencing and ultra-low quiescent current.
Availability
ADP2119ACPZ-3.3-R7 is available at Aetrix Electronics and suitable for point-of-load conversion, communications infrastructure, and medical sensor interface designs requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for ADP2119ACPZ-3.3-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and communications markets.
The ADP2119/ADP2120 product line was designed specifically for space-constrained, high-efficiency point-of-load regulation in FPGA, ASIC, and SoC-based systems-emphasizing low quiescent current, accurate tracking, and seamless light-load efficiency.
FAQ
What is the maximum output current capability of the ADP2119ACPZ-3.3-R7?
The ADP2119ACPZ-3.3-R7 delivers up to 2 A continuous output current under typical thermal conditions (θJA = 40°C/W, 25°C ambient). Its peak current limit is specified at 2.5–3.5 A, supporting short-term surge loads. Derating is required above 85°C ambient or with insufficient PCB copper area on the exposed pad.
Does the ADP2119ACPZ-3.3-R7 require external feedback resistors?
No. The ADP2119ACPZ-3.3-R7 is a fixed-output variant with internal feedback set to 3.3 V. The FB pin is internally connected and must not be externally biased or loaded. External resistors are only required for adjustable versions (e.g., ADP2119ARDZ-R7).
How does the TRK pin function in the ADP2119ACPZ-3.3-R7?
The TRK pin accepts a 0–600 mV input to track a master voltage. When used, the ADP2119ACPZ-3.3-R7 regulates its output to match the scaled master rail (e.g., 3.3 V output tracking a 1.2 V core rail via resistor divider). If unused, TRK must be tied to VIN-not left floating-to disable tracking.
Can the ADP2119ACPZ-3.3-R7 synchronize to an external clock?
Yes. Driving the SYNC/MODE pin with a 1–2 MHz external clock forces the ADP2119ACPZ-3.3-R7 into synchronized CCM operation, aligning switching edges across multiple regulators to reduce beat frequencies and simplify EMI filtering in multi-rail systems.
What protection features are integrated into the ADP2119ACPZ-3.3-R7?
The ADP2119ACPZ-3.3-R7 includes undervoltage lockout (UVLO), overvoltage protection (OVP), overcurrent protection (OCP), thermal shutdown (150°C), and integrated soft start. These operate autonomously without external components, ensuring safe startup and fault recovery in unattended systems.
ADP2119ACPZ-3.3-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.3V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 2A
- Frequency - Switching:
- 1.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-LFCSP-WD (3x3)
ADP2119ACPZ-3.3-R7 FAQ
1.How can I place an order for ADP2119ACPZ-3.3-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP2119ACPZ-3.3-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP2119ACPZ-3.3-R7 reliable?
The price and inventory of ADP2119ACPZ-3.3-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP2119ACPZ-3.3-R7 is usually 5 days.
3.What payment methods are accepted for ADP2119ACPZ-3.3-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP2119ACPZ-3.3-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP2119ACPZ-3.3-R7?
ADP2119ACPZ-3.3-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP2119ACPZ-3.3-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP2119ACPZ-3.3-R7?
For technical support, including ADP2119ACPZ-3.3-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP2119ACPZ-3.3-R7 requirements.
6.How does Aetrix verify that ADP2119ACPZ-3.3-R7 is sourced from the original manufacturer or authorized distributors?
All ADP2119ACPZ-3.3-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP2119ACPZ-3.3-R7 meets industry standards.
7.What is the process for return or replacement of ADP2119ACPZ-3.3-R7?
All ADP2119ACPZ-3.3-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP2119ACPZ-3.3-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP2119ACPZ-3.3-R7 part is unused and in its original packaging.
Return procedure for ADP2119ACPZ-3.3-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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