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Analog Devices Inc. ADP2119ACPZ-R7
- Part No.:
- ADP2119ACPZ-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-VFDFN Exposed Pad, CSP
- Datasheet:
-
ADP2119ACPZ-R7.pdf
- Description:
- IC REG BUCK ADJ 2A 10LFCSP
- Quantity:
- Payment:
- Shipping:
Inventory:26,117
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Product details
Overview
ADP2119ACPZ-R7 from Analog Devices is a 2 A, synchronous step-down DC-to-DC regulator in a 3 mm × 3 mm LFCSP_WD package, operating from 2.3 V to 5.5 V input and delivering adjustable output down to 0.6 V with ±1.5% accuracy, 1.2 MHz fixed switching frequency, and integrated high-side (145 mΩ) and low-side (70 mΩ) MOSFETs for point-of-load power conversion in FPGA core supplies.
For engineers reviewing the ADP2119ACPZ-R7 datasheet, ADP2119ACPZ-R7 pinout, ADP2119ACPZ-R7 application, or ADP2119ACPZ-R7 equivalent, key selection criteria include its PFM/PWM mode selectability, voltage tracking capability, power-good flag, soft-start timing (853 µs at 1.2 MHz), and thermal shutdown at 150°C - all critical for low-noise, high-efficiency embedded power rails.
Technical Context
The ADP2119ACPZ-R7 employs a current-mode, constant-frequency PWM control architecture with slope compensation to prevent subharmonic oscillation beyond 50% duty cycle. Its transconductance error amplifier compares FB voltage against a 0.6 V internal reference and supports three inputs: reference, soft-start ramp, and TRK voltage - enabling precise voltage tracking of master supplies.
It integrates dual MOSFETs (P-channel high-side, N-channel synchronous rectifier), supports startup with precharged output via reverse-current protection, and features programmable synchronization (1–2 MHz) on the SYNC/MODE pin. Protection includes UVLO (2.3 V rising threshold), OVP, OCP (3.5 A peak limit), and thermal shutdown with 25°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 2 A continuous - supports high-density FPGA or SoC core rail loads without external current boosting. |
| Input Voltage Range | 2.3 V to 5.5 V - compatible with single-cell Li-ion, USB 5 V, and intermediate bus architectures. |
| Output Voltage Accuracy | ±1.5% over line, load, and temperature - ensures stable logic supply margins for 1.2 V/1.0 V digital cores. |
| Switching Frequency | 1.2 MHz fixed (synchronizable 1–2 MHz) - enables compact 1.5 µH inductor and <22 µF output capacitance. |
| High-Side RDS(on) | 145 mΩ (typ.) - minimizes conduction loss at full load, improving efficiency above 85% at 1.2 V/2 A. |
| Low-Side RDS(on) | 70 mΩ (typ.) - reduces synchronous rectification loss, critical for light-load PFM efficiency retention. |
| Quiescent Current | 680 µA (typ., switching, no load) - extends battery life in always-on subsystems. |
| Soft Start Time | 853 µs at 1.2 MHz - limits inrush current during power-up, preventing input rail droop or reset glitches. |
Pinout & Package
ADP2119ACPZ-R7 uses a 10-lead, 3 mm × 3 mm LFCSP_WD package with exposed thermal pad soldered to PCB ground plane for thermal dissipation (θJA = 40°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Bias voltage input | Supplies internal circuitry; requires 0.1 µF bypass capacitor and 10 Ω series resistor to PVIN for noise isolation. |
| PVIN | Main power input | Connects directly to input source; bypassed to PGND with bulk capacitor for high-current switching return path. |
| SW | Switch node | Drives external inductor; high dv/dt node requiring tight layout and minimal trace length to reduce EMI. |
| PGND | Power ground | High-current return for MOSFETs; must be connected to dedicated power ground plane with low-inductance vias. |
| GND | Analog ground | Reference for FB, EN, TRK; separated from PGND to avoid noise coupling into feedback loop. |
| FB | Feedback sense input | Monitors output via resistor divider; regulates to 0.6 V reference - sets VOUT = 0.6 × (1 + RTOP/RBOT). |
| TRK | Voltage tracking input | Enables output to follow master supply (e.g., FPGA I/O rail); error amplifier selects lowest of REF/TRK/soft-start. |
| PGOOD | Open-drain power-good flag | Asserts after output reaches 90–95% of target and remains stable for 16 clock cycles - used for sequenced enable. |
| SYNC/MODE | Sync input / PFM-PWM mode select | High = FPWM only; low = PFM enabled; external 1–2 MHz clock overrides internal oscillator for EMI reduction. |
| EN | Precision enable input | 1.2 V threshold (100 mV hysteresis); internal 1 MΩ pull-down prevents floating; supports resistor-divider sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Voltage tracking (TRK pin) | Enables coordinated ramp-up with master supply (e.g., FPGA core/I/O rails), eliminating sequencing ICs in multi-rail systems. |
| Selectable PFM/PWM operation | PFM mode reduces light-load quiescent current to ~200 µA, extending battery runtime without sacrificing transient response. |
| Integrated soft start (1024 clock cycles) | Eliminates need for external soft-start capacitor; ensures monotonic VOUT rise and prevents inductor saturation at startup. |
| Power-good flag with deglitching | 16-cycle deglitch (≈13.3 µs at 1.2 MHz) rejects noise-induced false asserts, enabling reliable system power sequencing. |
| Startup with precharged output | Prevents reverse inductor current when VOUT > VIN×D, avoiding discharge of pre-biased rails in hot-swap or multi-phase systems. |
| Current-mode control with slope compensation | Stabilizes loop up to 100% duty cycle; supports wide VIN/VOUT ratios (e.g., 5 V → 1.0 V) without external compensation. |
Applications
| FPGA Core Power Supply | USB-Powered Embedded System |
|---|---|
Use Scenario: Providing tightly regulated 1.2 V/2 A core voltage to Xilinx Artix-7 FPGA during configuration and active operation. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering dynamic current with fast transient response and voltage tracking to match I/O rail. Use Value: Integrated TRK pin enables simultaneous ramp-up with 2.5 V I/O supply; ±1.5% accuracy maintains FPGA VCCINT margin across temperature. |
Use Scenario: Converting 5 V USB input to 3.3 V for ARM Cortex-M7 microcontroller, Wi-Fi module, and sensor interface in portable IoT node. IC Role / Device Role / Timing Role: Main system PMIC buck stage with PFM mode for sleep-state efficiency and FPWM for active processing bursts. Use Value: 1.2 MHz switching allows use of 1.5 µH shielded inductor and 22 µF X5R ceramic output cap - minimizing board area in space-constrained designs. |
| Industrial PLC I/O Module | Medical Point-of-Care Monitor |
Use Scenario: Generating isolated 1.8 V digital rail from 3.3 V backplane supply in DIN-rail mounted programmable logic controller. IC Role / Device Role / Timing Role: Secondary buck converter with EN-controlled sequencing and PGOOD signaling to main controller for fault-safe startup. Use Value: UVLO (2.3 V) and thermal shutdown (150°C) ensure robust operation in unregulated industrial environments with wide ambient swings. |
Use Scenario: Powering low-noise analog front-end (AFE) and display controller in battery-operated patient monitor with strict EMC requirements. IC Role / Device Role / Timing Role: EMI-optimized buck regulator synchronized to system clock (1.5 MHz) to shift noise away from sensitive ADC bands. Use Value: SYNC/MODE pin enables deterministic switching frequency placement; 40°C/W θJA supports convection-cooled enclosure design without heatsink. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62130ARGTR | 3 A output, 2.7–6 V input, 2.5 MHz fixed frequency, no TRK pin, different pinout (16-pin QFN) | Lacks voltage tracking; higher switching frequency demands smaller inductor but increases EMI filtering complexity | Choose for higher current headroom and faster transient response where tracking is unnecessary |
| RT7295BGJ6F | 2 A output, 4.5–18 V input, 600 kHz switching, integrated compensation, no PFM mode | Wider input range suits 12 V intermediate bus; lacks PFM efficiency optimization for battery-powered use | Choose for industrial 12 V systems needing robust overvoltage tolerance and simpler loop compensation |
Compared with TPS62130ARGTR and RT7295BGJ6F, ADP2119ACPZ-R7 uniquely combines 2 A capability with voltage tracking, PFM/PWM mode flexibility, and 3 mm × 3 mm footprint - making it optimal for space-constrained, multi-rail FPGA and SoC applications requiring precise sequencing and wide-input efficiency.
Availability
ADP2119ACPZ-R7 is available at Aetrix Electronics and suitable for FPGA core supplies, USB-powered embedded systems, and industrial PLC I/O modules requiring stable component supply, full production traceability, and long-term lifecycle support.
Supply support for ADP2119ACPZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and healthcare markets.
The ADP2119ACPZ-R7 belongs to Analog Devices' ADP21xx family of compact, high-efficiency synchronous buck regulators designed specifically for point-of-load power delivery in space- and efficiency-critical embedded systems.
FAQ
What is the maximum output current supported by the ADP2119ACPZ-R7?
The ADP2119ACPZ-R7 delivers up to 2 A continuous output current under typical thermal conditions (θJA = 40°C/W, TA ≤ 85°C). Its peak current limit is 3.5 A (typ.), and thermal shutdown activates at 150°C junction temperature with 25°C hysteresis to protect against sustained overload or poor PCB thermal design. Derating is required above 85°C ambient.
Does the ADP2119ACPZ-R7 support adjustable output voltage?
Yes, the ADP2119ACPZ-R7 supports fully adjustable output voltage from 0.6 V to VIN using an external resistor divider on the FB pin. The internal 0.6 V reference ensures ±1.5% regulation accuracy across line, load, and temperature. Fixed-output variants (e.g., 3.3 V, 1.2 V) are also available, but ADP2119ACPZ-R7 is the adjustable version.
How does the TRK (tracking) function work on the ADP2119ACPZ-R7?
The TRK pin on the ADP2119ACPZ-R7 allows the output voltage to track a master supply (e.g., FPGA I/O rail) by connecting TRK to a resistor divider from that voltage. The internal error amplifier regulates FB to the lowest of three inputs: 0.6 V reference, soft-start ramp, or TRK voltage - ensuring coordinated ramp-up and hold-down behavior without external circuitry.
Can the ADP2119ACPZ-R7 operate with a precharged output capacitor?
Yes, the ADP2119ACPZ-R7 supports startup with a precharged output. When VOUT exceeds the soft-start voltage at turn-on, both MOSFETs remain off until the soft-start ramp exceeds FB voltage - preventing reverse inductor current and avoiding discharge of the pre-biased rail, which is essential in hot-swap and multi-phase systems.
What protection features are integrated into the ADP2119ACPZ-R7?
The ADP2119ACPZ-R7 integrates undervoltage lockout (UVLO, 2.3 V rising), overvoltage protection (OVP), overcurrent protection (OCP, 3.5 A peak), thermal shutdown (150°C), and power-good flag with 16-cycle deglitching. These features ensure robust operation in demanding environments without requiring external supervision circuitry.
ADP2119ACPZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.3V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 2A
- Frequency - Switching:
- 1.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-LFCSP-WD (3x3)
ADP2119ACPZ-R7 FAQ
1.How can I place an order for ADP2119ACPZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP2119ACPZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP2119ACPZ-R7 reliable?
The price and inventory of ADP2119ACPZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP2119ACPZ-R7 is usually 5 days.
3.What payment methods are accepted for ADP2119ACPZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP2119ACPZ-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP2119ACPZ-R7?
ADP2119ACPZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP2119ACPZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP2119ACPZ-R7?
For technical support, including ADP2119ACPZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP2119ACPZ-R7 requirements.
6.How does Aetrix verify that ADP2119ACPZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADP2119ACPZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP2119ACPZ-R7 meets industry standards.
7.What is the process for return or replacement of ADP2119ACPZ-R7?
All ADP2119ACPZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP2119ACPZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP2119ACPZ-R7 part is unused and in its original packaging.
Return procedure for ADP2119ACPZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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