Analog Devices Inc. ADP2140ACPZ1533R7
- Part No.:
- ADP2140ACPZ1533R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad, CSP
- Datasheet:
-
ADP2140ACPZ1533R7.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADP2140ACPZ1533R7 from Analog Devices is a dual-output power management IC integrating a 600 mA synchronous buck regulator and a 300 mA low-noise LDO in a single 10-lead 3 mm × 3 mm LFCSP package. It operates from 2.3 V to 5.5 V input, delivers 1.5 V buck output and 3.3 V LDO output (as indicated by suffix "1533"), and achieves 3 MHz switching frequency with 20 μA quiescent current in PSM mode - optimized for battery-powered portable electronics requiring high efficiency and ultra-low standby power.
For engineers reviewing the ADP2140ACPZ1533R7 datasheet, ADP2140ACPZ1533R7 pinout, ADP2140ACPZ1533R7 application, or ADP2140ACPZ1533R7 equivalent, key selection criteria include verified dual-rail sequencing capability, measured 110 mV LDO dropout at 300 mA, confirmed 65 dB PSRR at 10 kHz, validated 70 µs startup time, and documented thermal shutdown at 150°C - all critical for compact, thermally constrained mobile designs.
Technical Context
The ADP2140ACPZ1533R7 implements a proprietary high-speed current-mode PWM control scheme for the buck section, enabling stable regulation and fast transient response across its 2.55–3.15 MHz nominal switching frequency range. Its LDO operates in split-supply mode with VIN2 as low as 1.65 V, supporting direct connection to the buck output to maximize system efficiency.
Power sequencing is user-configurable via EN1 and EN2 pins, supporting autosequencing where the higher-voltage rail (buck) enables first. The device integrates soft start (150 µs for buck), power-good monitoring with 6% hysteresis, undervoltage lockout (2.3 V rising threshold), and thermal protection with 20°C hysteresis - all essential for robust operation in portable applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Voltage | 1.5 V - factory-trimmed fixed output; eliminates external feedback resistor network and reduces BOM count. |
| LDO Output Voltage | 3.3 V - fixed output; enables direct powering of I/O rails, USB PHYs, or RF front-end bias without external dividers. |
| Switching Frequency | 3 MHz ±5% - allows use of sub-1 µH inductors and small ceramic capacitors, minimizing solution footprint to ~90 mm². |
| Buck Quiescent Current | 20 μA in PSM mode - extends battery life in sleep/standby states without compromising wake-up responsiveness. |
| LDO Dropout Voltage | 110 mV @ 300 mA - permits operation with minimal headroom, e.g., 3.41 V input supports 3.3 V output under full load. |
| PSRR (LDO) | 65 dB @ 10 kHz - suppresses switching noise from upstream buck stage, critical for noise-sensitive analog/RF circuits. |
| Power-Good Threshold | 92% VOUT rising / 86% VOUT falling - provides reliable system reset signaling with 6% hysteresis to prevent chatter during marginal conditions. |
Pinout & Package
ADP2140ACPZ1533R7 uses a 10-lead 3 mm × 3 mm LFCSP package with exposed thermal pad (EP) electrically connected to PGND. The package supports high thermal performance (θJA = 35.3°C/W) and requires PCB ground plane connection to the EP for optimal junction temperature control.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (PGND) | Power Ground | Main return path for buck switch current; must be low-impedance and tied to EP for thermal and EMI integrity. |
| 2 (SW) | Switch Node | Connection between internal FETs and external inductor; high dv/dt node requiring tight layout and minimal trace length. |
| 3 (AGND) | Analog Ground | Reference for FB and PG comparators; isolated from PGND in layout to avoid noise coupling into feedback path. |
| 4 (FB) | Buck Feedback Input | Monitors buck output voltage; not used in fixed-output variants like ADP2140ACPZ1533R7 (internal divider sets 1.5 V). |
| 5 (VIN2) | LDO Input Supply | Accepts 1.65–5.5 V; can be driven by buck output (e.g., 1.5 V → LDO input) only if VOUT2 ≤ VIN2 − 0.3 V (not applicable for 3.3 V LDO). |
| 6 (VOUT2) | LDO Output | Delivers regulated 3.3 V; requires ≥1 µF output capacitor with ESR ≤1 Ω for stability per datasheet Table 2. |
| 7 (EN2) | LDO Enable Control | Logic-high enables LDO; left unconnected for autosequencing (EN1 controls both rails in sequence). |
| 8 (EN1) | Buck Enable / Sequencing Trigger | Active-high enable; in autosequencing mode, rising edge initiates buck startup, then LDO after 5 ms delay (tDELAY). |
| 9 (PG) | Open-Drain Power-Good | Asserts high when both outputs are within ±7.5% of nominal; requires external pull-up to valid logic rail (e.g., VIN1 or VOUT2). |
| 10 (VIN1) | Buck Input Supply | Primary input for buck section; accepts 2.3–5.5 V, including single Li+/Li− polymer cell or dual alkaline/NiMH sources. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Buck + LDO | Reduces board area and component count versus discrete solutions; eliminates need for separate DC/DC and linear regulators. |
| 3 MHz Constant-Frequency PWM | Enables use of 0805-size 1 µH inductors and 0603/0402 MLCCs, achieving total solution size of ~90 mm². |
| 20 μA Buck Quiescent Current (PSM) | Extends battery runtime in low-power modes without sacrificing dynamic response - no external bias rail required. |
| 65 dB LDO PSRR @ 10 kHz | Effectively filters buck switching noise, enabling clean 3.3 V supply for ADC references, audio codecs, or RF synthesizers. |
| Programmable Power Sequencing | EN1/EN2 pins support independent, simultaneous, or autosequenced startup - critical for FPGAs, processors, and multi-rail SoCs. |
| Thermal Shutdown with Hysteresis | Shuts down at 150°C junction temperature and re-enables at 130°C, preventing thermal runaway in sealed enclosures or high ambient. |
Applications
| Mobile Phone Baseband | Digital Camera Sensor Bias |
|---|---|
|
Use Scenario: Powering application processor core (1.5 V) and I/O interface (3.3 V) from single-cell lithium battery. IC Role / Device Role / Timing Role: Dual-rail PMIC providing tightly regulated, sequenced voltages with integrated PG signaling for safe boot. Use Value: Eliminates two discrete regulators and associated passives; 3 MHz switching enables compact 1 µH inductor; 20 μA PSM IQ extends standby time. |
Use Scenario: Supplying image sensor analog front-end (1.5 V) and digital interface (3.3 V) while minimizing switching noise coupling. IC Role / Device Role / Timing Role: Buck powers noise-tolerant digital logic; low-noise LDO supplies analog sensor circuitry with 65 dB PSRR filtering. Use Value: 40 µVrms LDO output noise (at 1.2 V) and 65 dB PSRR ensure clean bias for high-dynamic-range sensors. |
| Portable Media Player Audio | Wearable Health Monitor |
|
Use Scenario: Delivering 1.5 V to DSP core and 3.3 V to DAC/codec in space-constrained portable audio device. IC Role / Device Role / Timing Role: Single-chip dual-output regulator with soft-start and PG to coordinate codec initialization and audio playback timing. Use Value: 150 µs soft-start prevents pop/click artifacts; 70 µs startup ensures rapid resume from sleep; LFCSP package fits <100 mm² PCB area. |
Use Scenario: Powering ultra-low-power MCU (1.5 V) and BLE radio transceiver (3.3 V) from coin-cell or thin-film battery. IC Role / Device Role / Timing Role: High-efficiency buck powers active MCU cycles; LDO supplies radio during transmit bursts with low dropout (110 mV @ 300 mA). Use Value: 0.3 μA shutdown current preserves battery during extended idle; 3.3 V LDO output meets BLE 3.0/4.x VDD requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62745DSSR | Single-output 300 mA buck with integrated LDO; lacks independent LDO enable and autosequencing; 2 MHz max frequency. | Supports only one fixed LDO voltage (1.8 V); no 3.3 V LDO option; lower PSRR (45 dB @ 10 kHz). | Choose when only 1.8 V LDO is needed and sequencing simplicity outweighs dual-rail flexibility. |
| MAX20004AATP+T | 3 A buck + 300 mA LDO; larger 16-pin TQFN; higher IQ (25 μA buck); 2.2 MHz switching. | Rated for automotive AEC-Q100 Grade 2; supports wider input (3.5–36 V); overkill for portable 2.3–5.5 V systems. | Choose for industrial or automotive environments requiring extended temp range and higher current headroom. |
Compared with TPS62745DSSR and MAX20004AATP+T, ADP2140ACPZ1533R7 uniquely combines 3 MHz operation, 1.5 V/3.3 V fixed dual outputs, autosequencing, and 65 dB PSRR in a 3 mm × 3 mm footprint - making it optimal for space- and noise-constrained portable designs where precise rail matching matters.
Availability
ADP2140ACPZ1533R7 is available at Aetrix Electronics and suitable for mobile phones, digital cameras, and wearable health monitors requiring stable component supply, long-term lifecycle support, and guaranteed authenticity from authorized channels.
Supply support for ADP2140ACPZ1533R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and a legacy of precision power management innovation.
The ADP2140ACPZ1533R7 belongs to Analog Devices' ADP21xx family of integrated power solutions, engineered specifically for portable and battery-powered applications demanding ultra-low quiescent current, small solution size, and reliable dual-rail sequencing.
FAQ
What output voltages does the ADP2140ACPZ1533R7 provide?
The ADP2140ACPZ1533R7 delivers a fixed 1.5 V output from its buck regulator and a fixed 3.3 V output from its integrated LDO. These values are laser-trimmed at wafer test and require no external feedback components. The part number suffix "1533" explicitly denotes this 1.5 V / 3.3 V configuration, distinguishing it from other variants such as ADP2140ACPZ1218R7 (1.2 V / 1.8 V).
Does the ADP2140ACPZ1533R7 support independent enable control for each regulator?
Yes, the ADP2140ACPZ1533R7 supports independent enable control via EN1 (buck) and EN2 (LDO). When EN2 is left unconnected, the device enters autosequencing mode: EN1's rising edge starts the buck regulator, and the LDO enables after a fixed 5 ms delay (tDELAY). This behavior is confirmed in the datasheet's "Power Sequencing" section and Figure 41.
What is the minimum input voltage required for the ADP2140ACPZ1533R7 to regulate both outputs?
The ADP2140ACPZ1533R7 requires a minimum VIN1 of 2.3 V to operate the buck regulator. For the 3.3 V LDO, VIN2 must be ≥3.6 V (3.3 V + 0.3 V minimum headroom per datasheet Table 1). Since VIN2 is typically supplied externally (not from the 1.5 V buck output), the system must provide ≥3.6 V to PIN 5 (VIN2) - meaning the 1.5 V buck output cannot power the 3.3 V LDO in this variant.
How does the ADP2140ACPZ1533R7 manage thermal performance in compact layouts?
The ADP2140ACPZ1533R7 uses a 10-lead 3 mm × 3 mm LFCSP package with an exposed thermal pad (EP) internally connected to PGND. To maintain TJ ≤ 125°C, the EP must be soldered to a dedicated PCB ground plane with ≥4 thermal vias. Datasheet Table 4 specifies θJA = 35.3°C/W on a 4-layer board - derating is required for 2-layer boards or higher ambient temperatures.
Is the power-good (PG) signal on the ADP2140ACPZ1533R7 asserted only after both outputs stabilize?
Yes, the open-drain PG pin on the ADP2140ACPZ1533R7 remains low until both the 1.5 V buck output and 3.3 V LDO output rise above 92% of their nominal values. It stays high until either output falls below 86% of nominal, providing synchronized system reset signaling. This dual-rail monitoring is explicitly defined in the "Power Good" section of the datasheet (Table 1, PGRISE/PGFALL).
ADP2140ACPZ1533R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 1.5V, 600mA
- Voltage/Current - Output 2:
- 3.3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-LFCSP-WD (3x3)
ADP2140ACPZ1533R7 FAQ
1.How can I place an order for ADP2140ACPZ1533R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP2140ACPZ1533R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP2140ACPZ1533R7 reliable?
The price and inventory of ADP2140ACPZ1533R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP2140ACPZ1533R7 is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP2140ACPZ1533R7?
For technical support, including ADP2140ACPZ1533R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP2140ACPZ1533R7 requirements.
6.How does Aetrix verify that ADP2140ACPZ1533R7 is sourced from the original manufacturer or authorized distributors?
All ADP2140ACPZ1533R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP2140ACPZ1533R7 meets industry standards.
7.What is the process for return or replacement of ADP2140ACPZ1533R7?
All ADP2140ACPZ1533R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP2140ACPZ1533R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP2140ACPZ1533R7 part is unused and in its original packaging.
Return procedure for ADP2140ACPZ1533R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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