Analog Devices Inc. ADP2140ACPZ1833R7

Overview

ADP2140ACPZ1833R7 from Analog Devices is a dual-output power management IC integrating a 600 mA buck regulator and a 300 mA low-noise LDO in a single 10-lead 3 mm × 3 mm LFCSP package. It operates from 2.3 V to 5.5 V input, delivers 1.8 V buck output and 3.3 V LDO output, and achieves 3 MHz switching frequency with 20 μA quiescent current in PSM mode - optimized for battery-powered portable electronics requiring high efficiency and ultra-low standby power.

For engineers reviewing the ADP2140ACPZ1833R7 datasheet, ADP2140ACPZ1833R7 pinout, ADP2140ACPZ1833R7 application, or ADP2140ACPZ1833R7 equivalent, this page provides verified functional specifications, validated pin functions, confirmed sequencing behavior (EN1/EN2 autosequencing), real-world PSRR/noise performance at 1.2 V/1.8 V/3.3 V LDO outputs, and precise thermal resistance data (θJA = 35.3°C/W) for PCB layout planning.

Technical Context

The ADP2140ACPZ1833R7 implements a proprietary high-speed current-mode PWM control scheme for the buck section, enabling fast transient response and stable operation across 2.3 V–5.5 V input range. Its variable-frequency power-save mode reduces switching frequency under light loads to minimize quiescent current - critical for extending battery life in always-on subsystems.

The integrated LDO operates in split-supply mode with VIN2 as low as 1.65 V, allowing direct connection to the buck output to improve system efficiency. It delivers 40 μV_rms output noise at 1.2 V and achieves 65 dB PSRR at 10 kHz, making it suitable for noise-sensitive analog rails such as ADC references or RF bias supplies.

Key Specifications

Pinout & Package

ADP2140ACPZ1833R7 uses a 10-lead 3 mm × 3 mm LFCSP package with exposed thermal pad electrically connected to PGND. The pad must be soldered to a PCB ground plane for thermal performance and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output power management applications.

Compared with TPS62740DRYR and MAX8640YETA+, ADP2140ACPZ1833R7 uniquely integrates autosequencing, open-drain power-good with hysteresis, and 3 MHz operation in a 3 mm × 3 mm footprint - delivering higher integration density and lower system-level design effort for portable battery-powered applications.

Availability

ADP2140ACPZ1833R7 is available at Aetrix Electronics and suitable for mobile phones, digital cameras, and portable audio devices requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing for production ramp.

Supply support for ADP2140ACPZ1833R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing operations worldwide.

The ADP2140ACPZ1833R7 belongs to Analog Devices' Power Management portfolio, designed specifically for space-constrained, battery-operated portable electronics demanding high efficiency, ultra-low quiescent current, and integrated sequencing capability.

FAQ

What output voltages does the ADP2140ACPZ1833R7 provide?

The ADP2140ACPZ1833R7 provides a fixed 1.8 V buck output and a fixed 3.3 V LDO output. These values are factory-trimmed and do not require external feedback resistors. The buck output is set by internal resistor divider, and the LDO output is internally regulated - both deliver ±1% initial accuracy across temperature and load per the ADP2140ACPZ1833R7 datasheet Rev. B specifications.

Does the ADP2140ACPZ1833R7 support power sequencing between its two outputs?

Yes, the ADP2140ACPZ1833R7 supports autosequencing: when EN2 is left unconnected, a rising edge on EN1 first enables the buck regulator, and after a 5 ms internal delay, the LDO automatically enables. This ensures the LDO input (VIN2) is stable before LDO regulation begins - preventing backfeed and meeting strict rail-ordering requirements in portable systems.

What is the thermal performance of the ADP2140ACPZ1833R7 in its LFCSP package?

The ADP2140ACPZ1833R7 in its 10-lead 3 mm × 3 mm LFCSP package has a junction-to-ambient thermal resistance (θJA) of 35.3°C/W and junction-to-board thermal characterization parameter (ΨJB) of 16.9°C/W, measured on a 4-layer PCB. These values assume proper soldering of the exposed thermal pad to a solid ground plane - failure to connect the pad increases thermal impedance significantly.

Can the ADP2140ACPZ1833R7's LDO be powered from an external source instead of the buck output?

Yes, the ADP2140ACPZ1833R7's LDO accepts VIN2 from 1.65 V to 5.5 V, so it can be powered independently - for example, from a separate battery or another regulator. However, connecting VIN2 to the buck output improves overall system efficiency by avoiding double conversion losses, and is the recommended configuration per the ADP2140ACPZ1833R7 application circuits.

What protection features are built into the ADP2140ACPZ1833R7?

The ADP2140ACPZ1833R7 includes undervoltage lockout (UVLO) with 2.3 V rising threshold, thermal shutdown at 150°C with 20°C hysteresis, short-circuit protection on both buck and LDO outputs, and current-limit protection (1100–1300 mA for buck, 360–760 mA for LDO). All protections are fully integrated and require no external components to function.