Analog Devices Inc. ADP2140ACPZ18812R7

Overview

ADP2140ACPZ18812R7 from Analog Devices is a dual-output power management IC integrating a 600 mA synchronous buck regulator and a 300 mA low-noise LDO in a single 10-lead LFCSP package. It operates from 2.3 V to 5.5 V input, delivers 1.8 V buck output and 1.2 V LDO output, and achieves 3 MHz switching frequency with 20 μA quiescent current in PSM mode - ideal for space-constrained, battery-powered mobile devices requiring clean, sequenced voltage rails.

For engineers reviewing the ADP2140ACPZ18812R7 datasheet, ADP2140ACPZ18812R7 pinout, ADP2140ACPZ18812R7 application, or ADP2140ACPZ18812R7 equivalent, key selection considerations include its dual-rail sequencing capability, 110 mV LDO dropout at 300 mA, 65 dB PSRR at 10 kHz, integrated power-good indicator, and support for split-supply LDO operation (VIN2 as low as 1.65 V).

Technical Context

The ADP2140ACPZ18812R7 implements a high-speed current-mode PWM control architecture for the buck section, enabling fast transient response and stable regulation across 1.0 V–3.3 V output range. Its variable-frequency power-save mode reduces switching frequency under light loads to minimize quiescent current without compromising regulation accuracy.

The LDO section uses a low-quiescent, low-dropout topology optimized for post-regulation of the buck output - supporting VIN2 down to 1.65 V and delivering 40 μV_rms noise at 1.2 V. Dual enable inputs (EN1/EN2) allow user-selectable power-up sequencing, including autosequencing where the higher-voltage rail enables first.

Key Specifications

Pinout & Package

ADP2140ACPZ18812R7 is housed in a 10-lead, 3 mm × 3 mm × 0.75 mm LFCSP package with exposed thermal pad (EP) electrically connected to PGND. The package supports high thermal efficiency (θ_JA = 35.3°C/W) and requires PCB ground plane connection to EP for optimal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output DC/DC + LDO applications.

Compared with TPS62748YFPR and MAX20004AATP+T, ADP2140ACPZ18812R7 uniquely combines 600 mA buck current, 20 μA PSM quiescent current, dedicated EN2 control, and open-drain PG - making it optimal for portable consumer devices demanding high integration, low noise, and deterministic power sequencing.

Availability

ADP2140ACPZ18812R7 is available at Aetrix Electronics and suitable for mobile phones, digital cameras, portable audio devices, and wearable health monitors requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for ADP2140ACPZ18812R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADP2140ACPZ18812R7 belongs to Analog Devices' Power Management portfolio, designed specifically for space- and power-constrained portable electronics requiring highly integrated, low-noise, and sequenced dual-rail power solutions.

FAQ

What output voltages does the ADP2140ACPZ18812R7 provide?

The ADP2140ACPZ18812R7 is a factory-configured variant delivering a fixed 1.8 V buck output and a fixed 1.2 V LDO output. These values are set internally via laser trimming and cannot be adjusted externally - ensuring consistent performance across production units without external resistor networks.

Does the ADP2140ACPZ18812R7 support independent enable control for buck and LDO?

Yes, the ADP2140ACPZ18812R7 supports independent enable control: EN1 controls the buck regulator, and EN2 controls the LDO. When EN2 is left unconnected, the device enters autosequencing mode where EN1 triggers buck startup first, followed by LDO activation after a 5 ms internal delay - ensuring safe power-up ordering.

What is the minimum input voltage required for the ADP2140ACPZ18812R7 to operate?

The ADP2140ACPZ18812R7 requires a minimum input voltage of 2.3 V on VIN1 for buck operation. For the LDO section, VIN2 must be at least 1.65 V - which allows it to be powered directly from the 1.8 V buck output, enabling efficient split-supply configuration even with low-headroom sources like single Li+ cells.

How does the ADP2140ACPZ18812R7 manage thermal performance in compact layouts?

The ADP2140ACPZ18812R7 uses a 3 mm × 3 mm LFCSP package with an exposed thermal pad (EP) electrically tied to PGND. To maintain junction temperature within −40°C to +125°C limits, the EP must be soldered to a multilayer PCB ground plane. With proper layout, its θ_JA remains at 35.3°C/W, supporting continuous 600 mA buck and 300 mA LDO operation at ambient up to +85°C.

Can the ADP2140ACPZ18812R7 be used without external compensation components?

Yes, the ADP2140ACPZ18812R7 features fully internal compensation for both buck and LDO sections. No external compensation capacitors or resistors are required - only four external passive components (input/output capacitors and inductor) are needed for full operation, enabling rapid design-in and minimizing bill-of-materials complexity.