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Analog Devices Inc. ADP2140ACPZ3328R7
- Part No.:
- ADP2140ACPZ3328R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad, CSP
- Datasheet:
-
ADP2140ACPZ3328R7.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10LFCSP
- Quantity:
- Payment:
- Shipping:
Inventory:2,082
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Product details
Overview
ADP2140ACPZ3328R7 from Analog Devices is a dual-output power management IC integrating a 600 mA synchronous buck regulator and a 300 mA low-noise LDO in a single 10-lead 3 mm × 3 mm LFCSP package. It operates from 2.3 V to 5.5 V input, delivers 1.0–3.3 V buck output and 0.8–3.3 V LDO output, and achieves 3 MHz switching frequency with 20 μA quiescent current in PSM mode - optimized for battery-powered portable electronics requiring ultra-low standby power and clean post-regulation.
For engineers reviewing the ADP2140ACPZ3328R7 datasheet, ADP2140ACPZ3328R7 pinout, ADP2140ACPZ3328R7 application, or ADP2140ACPZ3328R7 equivalent, key selection criteria include its integrated buck+LDO architecture, 110 mV dropout at 300 mA, 65 dB PSRR at 10 kHz, ±1% initial output accuracy, and autosequencing enable logic - all critical for compact, low-noise, multi-rail mobile power designs.
Technical Context
The ADP2140ACPZ3328R7 implements a high-speed current-mode PWM control scheme for the buck section, enabling fast transient response and stable operation with minimal external components. Its variable-frequency power-save mode (PSM) reduces switching frequency under light loads to maintain high efficiency down to microamp-level loads.
The LDO section features split-supply operation with VIN2 as low as 1.65 V, allowing direct connection to the buck output to minimize total system power loss. It delivers 40 μVrms output noise at 1.2 V and maintains 55 dB PSRR at 100 kHz - making it suitable for noise-sensitive analog/RF circuitry powered from the same battery source.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 600 mA - supports core logic rails (e.g., ARM Cortex-A/M cores) without external boost or parallel stages. |
| LDO Output Current | 300 mA - sufficient for RF transceivers, audio codecs, or precision ADCs requiring low-noise bias. |
| Switching Frequency | 2.55–3.15 MHz - enables use of sub-1 μH inductors and small ceramic capacitors for <90 mm² total solution size. |
| LDO Dropout Voltage | 110 mV @ 300 mA - allows efficient regulation from buck output (e.g., 1.8 V buck → 1.69 V LDO), minimizing thermal dissipation. |
| Quiescent Current | 20 μA (buck, PSM mode) / 22 μA (LDO, zero load) - extends battery life in always-on sensor or standby subsystems. |
| Power-Good Accuracy | ±6% hysteresis (92% rise / 86% fall) - ensures reliable system reset sequencing and rail monitoring without external comparators. |
| Thermal Shutdown | 150°C threshold with 20°C hysteresis - protects against sustained overload in sealed portable enclosures. |
Pinout & Package
ADP2140ACPZ3328R7 uses a 10-lead 3 mm × 3 mm LFCSP package with exposed thermal pad (EP) electrically connected to PGND. The package supports high-density PCB layouts and enhanced thermal performance via soldered EP-to-ground-plane connection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 PGND | Power Ground | Main return path for buck switch current; must be low-impedance connection to PCB ground plane. |
| 2 SW | Switch Node | Connection between internal FETs and external inductor; requires tight layout to minimize EMI and voltage ringing. |
| 3 AGND | Analog Ground | Reference for FB and EN inputs; isolated from PGND to prevent noise coupling into feedback loop. |
| 4 FB | Buck Feedback Input | Resistive divider input sensing VOUT; high-impedance node sensitive to trace capacitance and noise. |
| 5 VIN2 | LDO Input Supply | Accepts 1.65–5.5 V; can be tied to buck output for cascaded regulation or to separate low-noise source. |
| 6 VOUT2 | LDO Output | Regulated low-noise output; requires ≥0.7 μF ceramic capacitor with ≤1 Ω ESR for stability. |
| 7 EN2 | LDO Enable Control | Logic-high enables LDO; left unconnected for autosequencing mode where EN1 controls both regulators. |
| 8 EN1 | Buck Enable / Sequencing Trigger | Dual-function pin: enables buck directly or initiates autosequence when EN2 is floating. |
| 9 PG | Open-Drain Power-Good | Asserts high only when both VOUT and VOUT2 are within ±8% tolerance; requires external pull-up. |
| 10 VIN1 | Buck Input Supply | Main 2.3–5.5 V input; supplies buck controller, gate drivers, and internal LDO bias circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Buck + LDO | Reduces BOM count by eliminating discrete post-regulator; enables single-chip dual-rail solution for SoC + peripheral power. |
| Autosequencing Enable Logic | Eliminates need for external timing resistors or sequencer ICs - simplifies startup timing between buck and LDO outputs. |
| 65 dB PSRR @ 10 kHz | Attenuates switching noise from buck stage before it reaches LDO output, preserving signal integrity in RF/analog sections. |
| Low 40 μVrms LDO Noise | Meets stringent noise requirements for high-resolution ADCs, PLLs, and audio DACs without additional filtering. |
| Internal Compensation | Removes requirement for external compensation network - accelerates design-in and improves layout robustness. |
| Undervoltage Lockout (UVLO) | Prevents erratic operation during battery brownout (2.3 V turn-on, 2.16 V turn-off), protecting downstream logic. |
Applications
| Mobile Phone Baseband Power | Digital Camera Sensor Bias |
|---|---|
Use Scenario: Powering application processor core (1.2 V) and image signal processor I/O (1.8 V) from single Li-ion cell. IC Role / Device Role: ADP2140ACPZ3328R7 provides tightly regulated, sequenced dual outputs with minimal footprint and thermal overhead. Use Value: Enables 3 mm × 3 mm solution size and >85% efficiency at 200 mA load, extending talk time without compromising thermal margin. |
Use Scenario: Supplying low-noise bias to CMOS image sensor analog front-end and digital interface rails. IC Role / Device Role: ADP2140ACPZ3328R7's LDO delivers 1.2 V @ 150 mA with 40 μVrms noise while buck powers 2.8 V digital I/O. Use Value: Reduces fixed-pattern noise and quantization error in 12-bit+ sensors by rejecting switching ripple via 65 dB PSRR. |
| Portable Audio Codec Supply | Wearable Health Monitor Analog Front-End |
Use Scenario: Generating clean 1.8 V AVDD and 3.3 V DVDD for stereo audio codec in Bluetooth headset. IC Role / Device Role: ADP2140ACPZ3328R7's LDO powers analog supply while buck handles digital domain, with shared enable sequencing. Use Value: Achieves THD+N < −95 dB by suppressing buck switching artifacts, meeting premium audio performance targets. |
Use Scenario: Powering ECG/PPG analog signal chain (op-amps, ADC, reference) from coin-cell or small Li-po battery. IC Role / Device Role: ADP2140ACPZ3328R7's 22 μA LDO quiescent current and 20 μA buck PSM current maximize standby duration. Use Value: Extends wearable runtime to >7 days between charges while maintaining <10 μVpp supply-induced offset drift. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62740DRYR | Single-output 300 mA buck with integrated LDO bypass; no independent LDO regulation or PSRR spec. | Lacks programmable LDO output and noise suppression capability - unsuitable for RF/analog post-regulation. | Select when only basic buck + LDO-bypass functionality is needed and PSRR/noise specs are non-critical. |
| MAX8640YETA+ | 2.25 MHz buck + 300 mA LDO; higher 45 μA buck IQ and no autosequencing - requires external timing components. | Lower switching frequency increases inductor size; missing PG and sequencing flexibility limits use in space-constrained designs. | Choose if legacy MAXIM ecosystem compatibility is required and 3 MHz operation is not mandatory. |
Compared with TPS62740DRYR and MAX8640YETA+, the ADP2140ACPZ3328R7 uniquely combines 3 MHz operation, 65 dB PSRR, autosequencing, and <25 μA combined quiescent current - delivering superior integration and noise performance for next-generation portable systems.
Availability
ADP2140ACPZ3328R7 is available at Aetrix Electronics and suitable for mobile phones, digital cameras, and portable medical devices requiring stable component supply, long-term lifecycle support, and guaranteed traceability for ISO 13485 and IATF 16949-compliant production.
Supply support for ADP2140ACPZ3328R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADP2140ACPZ3328R7 belongs to Analog Devices' Power Management portfolio, engineered specifically for ultra-low-power, multi-rail portable electronics where board space, battery life, and supply noise are critical constraints.
FAQ
What is the recommended input capacitor for ADP2140ACPZ3328R7?
The ADP2140ACPZ3328R7 requires a minimum 10 μF X7R/X5R ceramic input capacitor (CIN) with ESR ≤10 mΩ across −40°C to +125°C. This value ensures stable operation, minimizes input voltage ripple, and supports peak current delivery during load transients. Lower capacitance risks undershoot during heavy buck switching events and may trigger UVLO.
Does ADP2140ACPZ3328R7 support independent enable control of buck and LDO?
Yes, ADP2140ACPZ3328R7 supports independent enable control: EN1 activates the buck regulator, while EN2 independently enables the LDO. When EN2 is left floating, the device enters autosequencing mode where EN1 rising edge enables both regulators in predefined order - eliminating need for external timing circuitry.
What is the maximum allowable junction temperature for ADP2140ACPZ3328R7?
The ADP2140ACPZ3328R7 has a maximum junction temperature (TJ) rating of +125°C. Thermal shutdown activates at +150°C with 20°C hysteresis. To maintain reliability, design must ensure TJ stays within specification using θJA = 35.3°C/W (4-layer board) and proper exposed pad grounding - especially under 600 mA buck + 300 mA LDO full-load conditions.
Can ADP2140ACPZ3328R7's LDO be powered from an external low-noise source instead of the buck output?
Yes, ADP2140ACPZ3328R7's LDO input (VIN2) accepts 1.65 V to 5.5 V and can be driven by an external low-noise source - such as a separate LDO or battery rail - independent of the buck output. This configuration decouples LDO noise performance from buck switching artifacts and is recommended for ultra-sensitive analog circuits.
How does the power-good (PG) pin behave during startup and fault conditions for ADP2140ACPZ3328R7?
The ADP2140ACPZ3328R7's open-drain PG pin remains low until both VOUT and VOUT2 reach ≥92% of their nominal values, then pulls high. It falls low again if either output drops below 86% of nominal. PG asserts after ~5 ms delay in PWM mode and includes built-in hysteresis to prevent chatter during marginal line/load conditions - providing reliable system reset signaling without external supervision.
ADP2140ACPZ3328R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 3.3V, 600mA
- Voltage/Current - Output 2:
- 2.8V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-LFCSP-WD (3x3)
ADP2140ACPZ3328R7 FAQ
1.How can I place an order for ADP2140ACPZ3328R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP2140ACPZ3328R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP2140ACPZ3328R7 reliable?
The price and inventory of ADP2140ACPZ3328R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP2140ACPZ3328R7 is usually 5 days.
3.What payment methods are accepted for ADP2140ACPZ3328R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP2140ACPZ3328R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP2140ACPZ3328R7?
ADP2140ACPZ3328R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP2140ACPZ3328R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP2140ACPZ3328R7?
For technical support, including ADP2140ACPZ3328R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP2140ACPZ3328R7 requirements.
6.How does Aetrix verify that ADP2140ACPZ3328R7 is sourced from the original manufacturer or authorized distributors?
All ADP2140ACPZ3328R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP2140ACPZ3328R7 meets industry standards.
7.What is the process for return or replacement of ADP2140ACPZ3328R7?
All ADP2140ACPZ3328R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP2140ACPZ3328R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP2140ACPZ3328R7 part is unused and in its original packaging.
Return procedure for ADP2140ACPZ3328R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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