Analog Devices Inc. ADP2164ACPZ-1.8-R7
- Part No.:
- ADP2164ACPZ-1.8-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-WQFN Exposed Pad, CSP
- Datasheet:
-
ADP2164ACPZ-1.8-R7.pdf
- Description:
- IC REG BUCK 1.8V 4A 16LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADP2164ACPZ-1.8-R7 from Analog Devices is a 4 A, synchronous step-down DC-to-DC regulator in a 4 mm × 4 mm LFCSP package, delivering fixed 1.8 V output from 2.7 V–6.5 V input. It features ±1.5% output accuracy, 600 kHz/1.2 MHz selectable switching frequency, and integrated high-side (43 mΩ) and low-side (29 mΩ) MOSFETs. Used for point-of-load conversion in communications equipment requiring stable, compact power delivery.
For engineers reviewing the ADP2164ACPZ-1.8-R7 datasheet, ADP2164ACPZ-1.8-R7 pinout, ADP2164ACPZ-1.8-R7 application, or ADP2164ACPZ-1.8-R7 equivalent, this page provides verified functional identity, validated pin roles, confirmed thermal and protection behavior, and real-world selection guidance for industrial and embedded power designs.
Technical Context
The ADP2164ACPZ-1.8-R7 employs a current-mode PWM control architecture with fixed-frequency operation (600 kHz or 1.2 MHz), slope compensation for stability at >50% duty cycle, and precision enable with 1.2 V threshold and 100 mV hysteresis. Its integrated P-channel high-side and N-channel low-side MOSFETs support 100% duty-cycle operation for low dropout at full 4 A load.
It delivers regulated 1.8 V output via internal feedback reference (0.6 V at FB), includes voltage tracking (TRK pin), power-good (PGOOD) open-drain output with ±10% window and 16-cycle deglitch, and implements comprehensive protection: UVLO (2.5 V falling), OVP (0.66 V FB threshold), OCP (6.2 A peak limit), and thermal shutdown at 140°C with 15°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.8 V - no external resistor divider required; simplifies layout and improves accuracy vs. adjustable versions. |
| Max Output Current | 4 A continuous - supports high-current FPGA core rails and ASIC power domains without external current boosting. |
| Input Voltage Range | 2.7 V to 6.5 V - compatible with single-cell Li-ion (3.0–4.2 V), 3.3 V, and 5 V intermediate bus architectures. |
| Switching Frequency | 600 kHz or 1.2 MHz (pin-selectable) - enables trade-off between efficiency (lower fS) and component size (higher fS). |
| Feedback Accuracy | ±1.5% over −40°C to +125°C - ensures tight regulation across industrial temperature range without calibration. |
| Thermal Resistance θJA | 38.3°C/W - achievable with standard 4-layer PCB and exposed pad soldered to thermal plane; supports 4 A at ≤85°C ambient. |
| Protection Features | UVLO, OVP, OCP, thermal shutdown, and PGOOD - eliminates need for discrete supervision circuitry in safety-critical systems. |
Pinout & Package
ADP2164ACPZ-1.8-R7 is housed in a 16-lead, 4 mm × 4 mm LFCSP package with exposed thermal pad (EPAD). The package supports high-power density and efficient heat dissipation when the EPAD is soldered to a PCB ground plane with ≥6 thermal vias.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SYNC | Synchronization input | Accepts external 500 kHz–1.4 MHz clock; enables phase-aligned or 180° out-of-phase operation with other regulators to reduce input ripple. |
| RT | Frequency setting | GND = 600 kHz, VIN = 1.2 MHz; determines switching frequency without external resistor for fixed-output variants. |
| TRK | Voltage tracking input | Enables ratiometric or coincident sequencing with master supply; connects to voltage divider from reference rail. |
| FB | Feedback sense | Internally connected to 1.8 V output divider; not user-accessible on fixed-output version - tied internally to setpoint. |
| GND | Analog ground | Reference for internal error amplifier and bias circuits; must be separated from PGND in sensitive analog sections. |
| PGND | Power ground | High-current return path for SW node and output capacitor; connects directly to output capacitor negative terminal. |
| SW | Switch node | Drives external inductor; carries high di/dt; requires short, low-inductance routing to minimize EMI and voltage spikes. |
| PVIN | Main power input | Supplies high-side FET and gate driver; bypassed with 47 µF ceramic capacitor close to pin for transient current handling. |
| VIN | Bias supply input | Provides internal LDO input; bypassed with 0.1 µF capacitor; decoupled from PVIN via 10 Ω resistor to isolate noise. |
| EN | Precision enable | 1.2 V turn-on threshold with 100 mV hysteresis; 1 MΩ internal pull-down prevents false start during power ramp. |
| PGOOD | Power-good indicator | Open-drain output asserting high when FB is within ±10% of 0.6 V reference - signals valid 1.8 V rail to system controller. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual MOSFETs | 43 mΩ P-FET / 29 mΩ N-FET - eliminates external switches, reduces BOM count, and enables >92% peak efficiency at 4 A. |
| 100% duty-cycle operation | Supports dropout <100 mV at 4 A - critical for low-VOUT rails powered from marginally higher inputs (e.g., 1.8 V from 2.0 V). |
| Start-up into precharged output | Prevents reverse inductor current when VOUT is already present - avoids discharging downstream capacitors during hot-swap or rail sequencing. |
| Internal compensation | No external compensation components needed - accelerates design cycle and guarantees stability with recommended L/C values. |
| ADIsimPower™ support | Full schematic, BOM, and performance simulation available - enables rapid validation of 1.8 V/4 A design before PCB spin. |
Applications
| Baseband Processor Core Supply | FPGA I/O Bank Power |
|---|---|
Use Scenario: Powers ARM-based baseband processors in 4G/5G small cell radios where thermal headroom is limited and dynamic load steps exceed 3 A/µs. IC Role / Device Role / Timing Role: Primary step-down regulator delivering tightly regulated 1.8 V to processor core logic, synchronized to system clock via SYNC pin to suppress beat frequencies. Use Value: 4 A capability and 1.2 MHz switching allow use of 1 µH inductor and 100 µF total output capacitance, reducing solution footprint by 35% vs. legacy 500 kHz converters. | Use Scenario: Supplies configurable I/O banks in Xilinx Artix-7 FPGAs deployed in industrial PLC modules requiring rail sequencing and voltage tracking. IC Role / Device Role / Timing Role: Slave regulator tracking 3.3 V auxiliary rail using TRK pin to ensure monotonic startup and avoid I/O contention during power-up. Use Value: Coincident tracking function eliminates need for external tracking ICs or complex GPIO-controlled sequencing, reducing component count and firmware overhead. |
| Industrial Camera Sensor Bias | Automotive Infotainment SoC Core |
Use Scenario: Provides clean, low-noise 1.8 V bias to CMOS image sensor digital cores in factory automation vision systems operating in −40°C to +85°C ambient. IC Role / Device Role / Timing Role: Point-of-load regulator placed adjacent to sensor die; uses internal soft start (2048 clock cycles) to limit inrush and prevent brownout on shared 3.3 V supply. Use Value: ±1.5% output accuracy and 38.3°C/W θJA ensure stable sensor timing and minimal dark current drift across full temperature range. | Use Scenario: Delivers 1.8 V core power to NXP i.MX8M SoCs in automotive infotainment head units subject to ASIL-B functional safety requirements. IC Role / Device Role / Timing Role: Safety-relevant power stage with PGOOD monitoring, OVP, and thermal shutdown - feeds status to system MCU for fault logging and graceful degradation. Use Value: Integrated protections eliminate need for external supervisor ICs, reducing failure modes and supporting ISO 26262 hardware element decomposition. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54332DDA | 3.5 A max output, 4.5–28 V input, external compensation required, no voltage tracking | Higher input range but lower current; lacks TRK and PGOOD features critical for sequencing-sensitive systems | Choose only if input exceeds 6.5 V or if external compensation is preferred for custom loop tuning |
| MP2315DJ-LF-Z | 4 A output, 4.5–28 V input, 500 kHz fixed frequency, no SYNC or TRK, smaller 3 mm × 3 mm QFN | Wider input range but no synchronization or tracking; less suitable for multi-rail coordinated power systems | Select when board space is constrained and multi-regulator synchronization is unnecessary |
Compared with TPS54332DDA and MP2315DJ-LF-Z, ADP2164ACPZ-1.8-R7 uniquely combines 4 A capability, 1.8 V fixed output, SYNC/ TRK/PGOOD interfaces, and industrial-grade protection - making it optimal for compact, sequenced, and thermally demanding embedded power rails.
Availability
ADP2164ACPZ-1.8-R7 is available at Aetrix Electronics and suitable for communications infrastructure, industrial instrumentation, and consumer electronics applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for ADP2164ACPZ-1.8-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and communications markets since 1965.
The ADP2164 product line delivers high-efficiency, high-current step-down regulation in ultra-compact packages for space-constrained point-of-load applications in networking, computing, and portable electronics.
FAQ
What is the input voltage range supported by the ADP2164ACPZ-1.8-R7?
The ADP2164ACPZ-1.8-R7 supports an input voltage range of 2.7 V to 6.5 V. This allows direct operation from single-cell Li-ion batteries (nominal 3.7 V), 3.3 V intermediate buses, and 5 V systems. Operation below 2.7 V triggers undervoltage lockout (UVLO), disabling the regulator until input rises above 2.6 V. The ADP2164ACPZ-1.8-R7 maintains regulation across this full range while delivering its rated 4 A output at 1.8 V.
Does the ADP2164ACPZ-1.8-R7 require external feedback resistors to set the output voltage?
No, the ADP2164ACPZ-1.8-R7 does not require external feedback resistors. As a factory-configured fixed-output variant, it delivers 1.8 V without any external resistor divider on the FB pin - the internal feedback network is permanently trimmed to that voltage. This eliminates resistor tolerance errors, reduces component count, and improves long-term output accuracy compared to adjustable versions. The FB pin remains accessible but is internally connected to the 1.8 V setpoint.
How does the ADP2164ACPZ-1.8-R7 handle power sequencing with other voltage rails?
ADP2164ACPZ-1.8-R7 supports precise power sequencing via its TRK (tracking) pin and PGOOD output. The TRK pin accepts an external voltage divider from a master rail (e.g., 3.3 V), enabling coincident or ratiometric startup with that rail. Simultaneously, its open-drain PGOOD pin asserts high only when the 1.8 V output is within ±10% of regulation, providing a reliable enable signal for downstream devices. This dual capability eliminates need for external sequencers in multi-rail systems.
What thermal performance can be expected from the ADP2164ACPZ-1.8-R7 at full 4 A load?
With proper PCB layout - including soldering the exposed pad to a 4-layer board's internal ground plane using ≥6 thermal vias - the ADP2164ACPZ-1.8-R7 achieves a junction-to-ambient thermal resistance (θJA) of 38.3°C/W. At 4 A output and 5 V input, typical power dissipation is ~0.6 W, resulting in ~23°C junction-to-ambient rise. This enables reliable continuous operation at up to +85°C ambient temperature without derating, meeting industrial requirements per its −40°C to +125°C junction rating.
Can the ADP2164ACPZ-1.8-R7 be synchronized to an external clock, and what are the phase options?
Yes, the ADP2164ACPZ-1.8-R7 can be synchronized to an external clock applied to the SYNC pin across 500 kHz–1.4 MHz. Phase alignment depends on the RT pin connection: when RT is tied to GND or a resistor, switching is in phase with the external clock; when RT is tied to VIN, switching is 180° out of phase. This enables ripple cancellation in multi-phase or multi-regulator systems - for example, two ADP2164ACPZ-1.8-R7 devices can be configured for interleaved operation to halve input capacitor RMS current.
ADP2164ACPZ-1.8-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6.5V
- Voltage - Output (Min/Fixed):
- 1.8V
- Voltage - Output (Max):
- -
- Current - Output:
- 4A
- Frequency - Switching:
- 500kHz ~ 1.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-LFCSP (4x4)
ADP2164ACPZ-1.8-R7 FAQ
1.How can I place an order for ADP2164ACPZ-1.8-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP2164ACPZ-1.8-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP2164ACPZ-1.8-R7 reliable?
The price and inventory of ADP2164ACPZ-1.8-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP2164ACPZ-1.8-R7 is usually 5 days.
3.What payment methods are accepted for ADP2164ACPZ-1.8-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP2164ACPZ-1.8-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP2164ACPZ-1.8-R7?
ADP2164ACPZ-1.8-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP2164ACPZ-1.8-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP2164ACPZ-1.8-R7?
For technical support, including ADP2164ACPZ-1.8-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP2164ACPZ-1.8-R7 requirements.
6.How does Aetrix verify that ADP2164ACPZ-1.8-R7 is sourced from the original manufacturer or authorized distributors?
All ADP2164ACPZ-1.8-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP2164ACPZ-1.8-R7 meets industry standards.
7.What is the process for return or replacement of ADP2164ACPZ-1.8-R7?
All ADP2164ACPZ-1.8-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP2164ACPZ-1.8-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP2164ACPZ-1.8-R7 part is unused and in its original packaging.
Return procedure for ADP2164ACPZ-1.8-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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