Analog Devices Inc. ADP2381AREZ-R7
- Part No.:
- ADP2381AREZ-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
ADP2381AREZ-R7.pdf
- Description:
- IC REG BUCK ADJ 6A 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:655
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Product details
Overview
ADP2381AREZ-R7 from Analog Devices is a current-mode, synchronous step-down DC-DC regulator integrating a 44 mΩ high-side MOSFET and low-side gate driver. It operates from 4.5 V to 20 V input, delivers up to 6 A continuous output current, features 0.6 V ±1% reference voltage, and supports programmable switching frequency from 250 kHz to 1.4 MHz. It is used in intermediate power rail conversion for networking and industrial systems.
For engineers reviewing the ADP2381AREZ-R7 datasheet, ADP2381AREZ-R7 pinout, ADP2381AREZ-R7 application, or ADP2381AREZ-R7 equivalent, key selection considerations include its 16-lead TSSOP_EP package, external compensation capability, 180° out-of-phase synchronization, programmable UVLO, and power-good output with 1024-cycle deglitch timing.
Technical Context
The ADP2381AREZ-R7 uses fixed-frequency peak current-mode PWM control with internal slope compensation. Its oscillator supports RT-pin programming (250–1400 kHz) or external clock synchronization (250–1400 kHz) with 180° phase offset. The integrated 44 mΩ high-side MOSFET and dedicated LD pin drive an external low-side N-MOSFET, enabling high-efficiency synchronous buck operation.
It implements comprehensive protection: hiccup-mode overcurrent protection triggered at ≥9.6 A peak current, thermal shutdown at 150°C with 25°C hysteresis, overvoltage protection at 0.7 V FB, and undervoltage lockout with adjustable threshold via UVLO pin. Power sequencing is supported by a dedicated open-drain PGOOD output with 95%/90% rising/falling thresholds.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 20 V - supports wide-input industrial and telecom rails including 12 V and 18 V systems. |
| Output Current | 6 A continuous - enables single-chip point-of-load regulation for FPGAs, ASICs, and DSPs. |
| Reference Voltage | 0.6 V ±1% over −40°C to +125°C - ensures tight output accuracy across full junction temperature range. |
| Switching Frequency | 250 kHz to 1.4 MHz programmable - allows EMI optimization and inductor size trade-offs. |
| High-Side RDS(ON) | 44 mΩ typical - reduces conduction loss and improves efficiency at high load currents. |
| Power-Good Output | Open-drain with 1024-cycle deglitch - provides reliable, noise-immune power sequencing signal. |
| Thermal Shutdown | 150°C with 25°C hysteresis - prevents damage during overload or poor PCB thermal design. |
Pinout & Package
The ADP2381AREZ-R7 is housed in a 16-lead TSSOP_EP package with exposed pad for thermal dissipation (θJA = 39.48°C/W on 4-layer JEDEC board). Pin 17 (EPAD) must be soldered to a ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN (1,2) | Primary power input | Bypass capacitor connection point; supplies high-side MOSFET and internal regulators. |
| UVLO (3) | Undervoltage lockout control | External resistor divider sets turn-on threshold; overrides internal 4.5 V default. |
| PGOOD (4) | Power-good status indicator | Open-drain output pulled high after FB reaches 95% of 0.6 V with 1024-cycle delay. |
| RT (5) | Frequency programming | Resistor-to-GND sets fSW from 250 kHz to 1.4 MHz; open = 550 kHz, GND = 290 kHz. |
| SYNC (6) | External clock input | Accepts 250–1400 kHz clock; forces 180° out-of-phase switching for multi-phase noise reduction. |
| EN/SS (7) | Enable & soft-start control | EN active >0.5 V; capacitor-to-GND programs slow soft start; supports startup into precharged output. |
| COMP (8) | Error amplifier output | Connects external RC network to FB for loop compensation and stability tuning. |
| FB (9) | Feedback voltage sense | Monitors resistive divider output; regulates VOUT = 0.6 V × (1 + RTOP/RBOT). |
| GND (10) | Analog ground reference | Reference for internal circuitry; separate from PGND to minimize noise coupling. |
| PGND (11) | Power ground return | Low-impedance path for high di/dt currents from SW and LD pins. |
| VREG (12) | Internal 8 V regulator output | Supplies bias for LD driver; requires 1 µF ceramic capacitor to GND. |
| LD (13) | Low-side gate driver output | Drives external N-MOSFET gate; includes break-before-make logic to prevent shoot-through. |
| SW (14,15) | Switch node | Connects to inductor; carries high dv/dt and di/dt; requires tight layout with minimal loop area. |
| BST (16) | Bootstrap supply | Provides ~5 V gate drive for high-side MOSFET; requires 0.1 µF X7R/X5R capacitor to SW. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated high-side MOSFET | 44 mΩ RDS(ON) reduces conduction loss and eliminates external high-side switch component count. |
| 180° out-of-phase synchronization | Enables noise cancellation in multi-regulator systems without requiring matched frequency sources. |
| Startup into precharged output | Prevents reverse current flow by disabling LD until soft-start ramp exceeds FB voltage. |
| Programmable UVLO with hysteresis | Allows custom input voltage turn-on/off thresholds (e.g., 10 V ±0.5 V) using external resistor divider. |
| Hiccup-mode overcurrent protection | Enters 4096-cycle shutdown after 10 consecutive current-limit events, reducing thermal stress during sustained fault. |
| External compensation | Enables precise loop tuning for varied output capacitors, inductors, and load conditions across operating range. |
Applications
| Networking Equipment Power | Industrial PLC I/O Modules |
|---|---|
Use Scenario: Providing stable 3.3 V or 5 V intermediate rail for Ethernet PHYs, packet processors, and management controllers in 1U switches. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 6 A at high efficiency with low output ripple and fast transient response. Use Value: Enables compact, thermally efficient power architecture without discrete high-side switch or complex gate drive circuitry. |
Use Scenario: Generating isolated 1.2 V, 1.8 V, or 2.5 V rails for FPGA configuration and I/O banks in programmable logic controllers. IC Role / Device Role / Timing Role: Point-of-load regulator with programmable soft start and PGOOD sequencing for safe FPGA configuration. Use Value: Supports startup into precharged outputs and provides accurate 0.6 V reference for sub-1 V core supplies. |
| Medical Imaging Signal Chain | Test & Measurement Instrumentation |
Use Scenario: Supplying clean, low-noise 1.2 V and 1.8 V rails to ADCs, DACs, and analog front-ends in portable ultrasound and MRI subsystems. IC Role / Device Role / Timing Role: High-efficiency synchronous buck converter with external compensation for optimal noise performance. Use Value: Programmable switching frequency avoids sensitive bands (e.g., 500 kHz avoids 512 kHz sampling harmonics); PGOOD ensures sequenced power-up. |
Use Scenario: Delivering tightly regulated 5 V and ±12 V auxiliary rails for precision op-amps, relays, and digital logic in benchtop analyzers and signal generators. IC Role / Device Role / Timing Role: Intermediate rail converter supporting wide input (12–18 V) and precise output accuracy (±1%). Use Value: 4.5–20 V input range accommodates unregulated lab supplies; thermal shutdown protects against enclosure overheating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5119MT/NOPB | Requires external high- and low-side MOSFETs; no integrated high-side switch; supports higher VIN (100 V max). | Better suited for high-input-voltage industrial motor drives where 20 V limit of ADP2381AREZ-R7 is insufficient. | Select LM5119MT/NOPB when input exceeds 20 V or when discrete MOSFET optimization is required. |
| TPS54620RGYR | Integrated dual high-side MOSFETs; fixed 2.2 MHz frequency; no external sync or UVLO programming; smaller 14-pin QFN package. | Optimized for space-constrained, high-frequency designs where EMI filtering is prioritized over flexibility. | Choose TPS54620RGYR for compact 2.2 MHz designs needing minimal external components, not for programmable frequency or sync. |
Compared with LM5119MT/NOPB and TPS54620RGYR, the ADP2381AREZ-R7 uniquely combines integrated 44 mΩ high-side MOSFET, programmable 250 kHz–1.4 MHz frequency, 180° sync capability, and adjustable UVLO - making it optimal for flexible, medium-frequency, medium-power industrial and communications point-of-load designs.
Availability
ADP2381AREZ-R7 is available at Aetrix Electronics and suitable for networking equipment power, industrial PLC I/O modules, medical imaging signal chain, and test & measurement instrumentation requiring stable component supply and long-term production continuity.
Supply support for ADP2381AREZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The ADP2381AREZ-R7 belongs to Analog Devices' high-efficiency synchronous buck regulator product line, designed specifically for flexible, high-current intermediate power rail conversion in space- and thermal-constrained systems.
FAQ
What is the maximum continuous output current of the ADP2381AREZ-R7?
The ADP2381AREZ-R7 delivers up to 6 A of continuous output current under specified thermal conditions (TJ ≤ 125°C, 4-layer PCB). This rating assumes proper layout, adequate copper area for the EPAD, and appropriate external low-side MOSFET selection. Peak current limit is 9.6 A typical, but sustained operation above 6 A requires derating based on ambient temperature and airflow.
Does the ADP2381AREZ-R7 support synchronization to an external clock?
Yes, the ADP2381AREZ-R7 supports external clock synchronization via the SYNC pin across 250 kHz to 1.4 MHz. When synchronized, its switching edge is precisely 180° out of phase with the external clock's rising edge - a feature critical for noise cancellation in multi-rail systems. The internal oscillator must be programmed (via RT pin) to run within ±10% of the sync frequency for stable locking.
Can the ADP2381AREZ-R7 start up into a precharged output voltage?
Yes, the ADP2381AREZ-R7 supports startup into a precharged output. During enable, it monitors the FB pin voltage and disables the low-side driver (LD) until the internal soft-start ramp exceeds the sensed FB voltage - preventing reverse current flow through the external low-side MOSFET. This behavior is confirmed in Figure 22 of the datasheet and requires no additional circuitry.
What package type and thermal characteristics does the ADP2381AREZ-R7 use?
The ADP2381AREZ-R7 uses a 16-lead TSSOP_EP package with exposed thermal pad (EPAD). Its thermal resistance is θJA = 39.48°C/W on a standard 4-layer JEDEC board. The EPAD must be soldered to a solid ground plane for effective heat dissipation. Junction temperature must remain below +125°C for continuous operation, with thermal shutdown activating at +150°C.
How is the output voltage set on the ADP2381AREZ-R7?
The ADP2381AREZ-R7 output voltage is set using a resistive divider from VOUT to GND connected to the FB pin. The formula is VOUT = 0.6 V × (1 + RTOP/RBOT). To maintain accuracy, RBOT should be ≤30 kΩ to limit error from FB bias current (≤0.1 µA). Table 6 in the datasheet provides recommended ±1% resistor values for common outputs (1.0 V to 5.0 V).
ADP2381AREZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 20V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 18V
- Current - Output:
- 6A
- Frequency - Switching:
- 250kHz ~ 1.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
ADP2381AREZ-R7 FAQ
1.How can I place an order for ADP2381AREZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP2381AREZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP2381AREZ-R7 reliable?
The price and inventory of ADP2381AREZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP2381AREZ-R7 is usually 5 days.
3.What payment methods are accepted for ADP2381AREZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP2381AREZ-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP2381AREZ-R7?
ADP2381AREZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP2381AREZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP2381AREZ-R7?
For technical support, including ADP2381AREZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP2381AREZ-R7 requirements.
6.How does Aetrix verify that ADP2381AREZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADP2381AREZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP2381AREZ-R7 meets industry standards.
7.What is the process for return or replacement of ADP2381AREZ-R7?
All ADP2381AREZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP2381AREZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP2381AREZ-R7 part is unused and in its original packaging.
Return procedure for ADP2381AREZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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