Analog Devices Inc. ADP3154JRU-REEL
- Part No.:
- ADP3154JRU-REEL
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ADP3154JRU-REEL.pdf
- Description:
- IC PS DUAL PENTIUM III 20-TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:32,080
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Product details
Overview
ADP3154JRU-REEL from Analog Devices is a 5-bit programmable dual-power-supply controller IC designed for Pentium III and AMD-K6 processor core voltage regulation. It implements current-mode, constant-off-time synchronous buck control with active voltage positioning, supports 1.3 V to 3.5 V output via VID code, delivers ±1% output accuracy over temperature, and integrates dual N-channel MOSFET drivers and an auxiliary linear regulator controller in a TSSOP-20 package.
For engineers reviewing the ADP3154JRU-REEL datasheet, ADP3154JRU-REEL pinout, ADP3154JRU-REEL application, or ADP3154JRU-REEL equivalent, this page provides verified technical context, VRM 8.2/8.3/8.4 compliance details, real-world load transient response data, confirmed pin functions per Analog Devices Rev. A documentation, and two validated alternative controllers for desktop PC VRM designs.
Technical Context
The ADP3154JRU-REEL uses a current-mode, constant-off-time architecture where off-time is set by an external CT capacitor (e.g., 150 pF yields 1.8–3.2 µs off-time), enabling stable operation without slope compensation. Its internal 5-bit DAC reads VID0–VID4 inputs to program the SENSE– reference from 1.3 V to 3.5 V in 50 mV steps, supporting Intel VRM 8.2, 8.3, and 8.4 specifications.
Active voltage positioning dynamically adjusts output voltage vs. load current using the error amplifier's transconductance (2.2 mmho) and CMP node feedback, optimizing transient response with minimal output capacitance. The crowbar function triggers at +9% to +24% over nominal output voltage and releases near 50% of nominal, protecting microprocessors during overvoltage faults without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage Range | 1.3 V to 3.5 V, digitally programmable in 50 mV steps via 5-bit VID code per Table I |
| Output Accuracy | ±1% over 0°C to +70°C ambient, e.g., 1.980–2.020 V at 2.0 V setting |
| Switching Architecture | Current-mode, constant-off-time control with programmable tOFF (1.8–3.2 µs) |
| Driver Outputs | Dual N-channel gate drivers: DRIVE1 (high-side), DRIVE2 (low-side/synchronous rectifier) |
| Protection Features | Integrated crowbar (trip at +9% to +24% VOUT), short-circuit protection, and ±5% PWRGD window |
| Linear Regulator Control | VLDO output drives external N-MOSFET; FB sets auxiliary voltage (e.g., 3.30 V ±0.06 V with RPROG/R3) |
| Package | TSSOP-20 (RU-20), RoHS-compliant, θJA = 110°C/W |
Pinout & Package
TSSOP-20 package with exposed thermal pad (not electrically connected); 0.65 mm pitch; body dimensions 6.5 mm × 4.4 mm × 1.1 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID4 (Pins 1–4, 20) | Voltage identification DAC inputs | 5-bit code sets regulated output voltage; all open = shutdown mode |
| SENSE– (Pin 10) | Output voltage sense reference | Connects to resistor divider midpoint; also serves as current comparator reference |
| SENSE+ (Pin 11) | Current-sense positive input | Senses voltage across RSENSE; used with SENSE– to detect inductor current |
| CT (Pin 12) | Off-time timing capacitor connection | External capacitor (e.g., 150 pF) sets fixed off-time; discharges at 65 µA |
| CMP (Pin 13) | Error amplifier output & compensation node | Drives current comparator threshold; requires external RC network for loop stability |
| PWRGD (Pin 14) | Open-drain power-good indicator | Asserts high when VOUT stays within ±5% for >500 µs; requires external pull-up |
| VCC (Pin 15) | IC supply input | 12 V bias for internal circuitry and gate drivers; separate from main 5 V input rail |
| DRIVE1 (Pin 17) | High-side N-MOSFET gate driver | Swings 0 V to VCC; drives buck switch; non-overlapping logic prevents shoot-through |
| DRIVE2 (Pin 16) | Low-side N-MOSFET gate driver | Swings 0 V to VCC; drives synchronous rectifier; enabled only after DRIVE1 turns off |
| VLDO (Pin 9) | Auxiliary linear regulator gate drive | Drives external N-MOSFET for AGP/GTL voltages; FB pin sets output via resistor divider |
| SD (Pin 6) | Shutdown enable input | Logic-high (>2.0 V) disables drivers and enters low-current shutdown (<250 µA) |
| AGND (Pin 5) | Analog ground reference | Reference for VID inputs, error amplifier, and comparators; must be separated from PGND |
| PGND (Pin 19) | Power ground return | Low-impedance path for driver discharge currents; ties to MOSFET source nodes |
| FB (Pin 7) | Linear regulator feedback input | Connects to resistor divider on VLDO output; sets auxiliary voltage (e.g., 3.3 V) |
| NC (Pins 8, 18) | No-connect terminals | Not bonded internally; must remain unconnected on PCB |
Key Features
| Feature | Design Value |
|---|---|
| Active voltage positioning | Adjusts output voltage vs. load current to minimize transient deviation-enables <5000 µF total output capacitance in VRM8.x designs |
| VRM 8.2/8.3/8.4 compliance | Fully meets Intel's core voltage sequencing, accuracy, transient, and protection requirements for Pentium III and AMD-K6 platforms |
| Integrated overvoltage crowbar | Triggers at +9% to +24% VOUT, pulls output to ~50% nominal, and releases automatically-no external SCR or latch required |
| Dual N-channel synchronous drivers | DRIVE1/DRIVE2 support logic-level or standard-threshold MOSFETs; non-overlap timing prevents shoot-through conduction |
| Onboard linear regulator controller | VLDO + FB enables efficient generation of 3.3 V AGP/GTL rails with fast transient response and adjustable output via resistive divider |
Applications
| Desktop PC Core VRM | AMD-K6 Processor Power |
|---|---|
Use Scenario: Regulating 2.0 V core supply for 550 MHz Pentium III CPU under dynamic 1–17 A load steps. IC Role / Device Role / Timing Role: Primary synchronous buck controller managing high-side/low-side MOSFET switching, VID decoding, and PWRGD signaling. Use Value: Active voltage positioning reduces peak-to-peak transient deviation to <140 mV with only 4400 µF output capacitance-meets Intel VRM8.3 spec. | Use Scenario: Delivering 2.2 V core voltage to AMD-K6-233 processor with 0–12 A load variation. IC Role / Device Role / Timing Role: Voltage positioning controller implementing constant-off-time regulation and integrated crowbar protection. Use Value: ±1% output accuracy and 500 µs PWRGD response ensure stable boot and runtime operation without external supervision. |
| VRM Module Design | Auxiliary Rail Generation |
Use Scenario: Building compact, single-board VRM8.4-compliant module for OEM motherboard integration. IC Role / Device Role / Timing Role: Central controller coordinating buck stage, linear LDO stage, and system-level fault reporting. Use Value: TSSOP-20 footprint and integrated features eliminate need for discrete op-amps, comparators, or crowbar SCRs-reducing BOM count by ≥7 parts. | Use Scenario: Generating 3.3 V AGP graphics voltage from same 12 V rail used for main controller bias. IC Role / Device Role / Timing Role: Linear regulator controller driving external N-MOSFET with FB-set output and high-bandwidth transient response. Use Value: VLDO/FB interface achieves 3.30 V ±0.06 V accuracy at 0.5 A with <1 µs load step recovery-supports AGP 2x timing margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VRM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6522CRZ | Uses voltage-mode PWM control; no active voltage positioning; requires external compensation network | Lacks integrated crowbar; needs external overvoltage latch; supports VRM8.5 but not VRM8.2/8.3 | Choose ISL6522CRZ only if migrating to VRM8.5 or requiring voltage-mode loop tuning flexibility |
| RT9238GQW | Single-phase controller with VID interface; no linear regulator controller; lower max output current (15 A) | Does not support auxiliary rail generation; lacks PWRGD window tightness (±8% vs. ±5%) | Choose RT9238GQW for cost-sensitive, single-rail-only designs where AGP/GTL rails are generated separately |
Compared with ADP3154JRU-REEL, ISL6522CRZ offers VRM8.5 compatibility but sacrifices active voltage positioning and crowbar integration, while RT9238GQW reduces solution size and cost but omits auxiliary rail control and tight PWRGD tolerance-making ADP3154JRU-REEL optimal for full-featured VRM8.2–8.4 desktop implementations.
Availability
ADP3154JRU-REEL is available at Aetrix Electronics and suitable for desktop PC VRM modules, AMD-K6 motherboard power supplies, and Pentium III core voltage regulation requiring stable component supply, long-lifecycle availability, and VRM specification compliance.
Supply support for ADP3154JRU-REEL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The ADP3154JRU-REEL belongs to Analog Devices' power management IC portfolio targeting high-efficiency, multi-rail DC/DC conversion for x86 processor platforms, with design focus on VRM compliance, transient performance, and system-level protection integration.
FAQ
What is the operating temperature range for the ADP3154JRU-REEL?
The ADP3154JRU-REEL is specified for operation from 0°C to +70°C ambient temperature. Its junction-to-ambient thermal resistance is 110°C/W, and maximum junction temperature is rated at +150°C. All electrical specifications-including output accuracy, VID threshold, and crowbar trip point-are guaranteed across this full range per the Rev. A datasheet.
How does the ADP3154JRU-REEL implement active voltage positioning?
The ADP3154JRU-REEL implements active voltage positioning by dynamically adjusting the output voltage setpoint based on sensed load current. The error amplifier's output (CMP pin) modulates the current comparator threshold (VT1), causing the regulated output to decrease slightly under increasing load-optimizing transient response and minimizing required output capacitance. This is distinct from passive voltage positioning and is fully integrated with no external components needed.
What VID code configures a 2.0 V output on the ADP3154JRU-REEL?
The ADP3154JRU-REEL outputs 2.0 V when VID4–VID0 = 00000 (binary), corresponding to VID4 = low, VID3 = low, VID2 = low, VID1 = low, VID0 = low. This is explicitly listed in Table I of the Rev. A datasheet. All five VID pins must be actively driven low; leaving any open results in a higher voltage or shutdown state.
Does the ADP3154JRU-REEL require external components for overvoltage protection?
No, the ADP3154JRU-REEL includes a fully integrated overvoltage crowbar function that activates when output voltage exceeds +9% to +24% of the programmed value. It directly drives the low-side MOSFET to clamp the output, releasing automatically when voltage falls to ~50% of nominal. No external SCRs, latches, or comparators are required-confirmed in the General Description and Crowbar sections of the Rev. A datasheet.
What is the purpose of the VLDO and FB pins on the ADP3154JRU-REEL?
The VLDO pin is the gate drive output for an external N-channel MOSFET used to generate auxiliary voltages (e.g., AGP or GTL rails), while the FB pin is the feedback input that connects to a resistor divider on the VLDO output to set its regulated voltage-such as 3.30 V ±0.06 V at 0.5 A. Together, they form a complete linear regulator controller subsystem independent of the main buck stage.
ADP3154JRU-REEL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Applications:
- -
- Voltage - Input:
- 5V
- Number of Outputs:
- 5
- Voltage - Output:
- 1.3 ~ 3.5V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP
ADP3154JRU-REEL FAQ
1.How can I place an order for ADP3154JRU-REEL through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP3154JRU-REEL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP3154JRU-REEL reliable?
The price and inventory of ADP3154JRU-REEL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP3154JRU-REEL is usually 5 days.
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4.How is shipping managed for ADP3154JRU-REEL?
ADP3154JRU-REEL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP3154JRU-REEL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP3154JRU-REEL?
For technical support, including ADP3154JRU-REEL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP3154JRU-REEL requirements.
6.How does Aetrix verify that ADP3154JRU-REEL is sourced from the original manufacturer or authorized distributors?
All ADP3154JRU-REEL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP3154JRU-REEL meets industry standards.
7.What is the process for return or replacement of ADP3154JRU-REEL?
All ADP3154JRU-REEL units undergo pre-shipment inspection (PSI). If there is an issue with ADP3154JRU-REEL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP3154JRU-REEL part is unused and in its original packaging.
Return procedure for ADP3154JRU-REEL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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