Analog Devices Inc. ADP3189JCPZ-R7
- Part No.:
- ADP3189JCPZ-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 40-VFQFN Exposed Pad, CSP
- Datasheet:
-
ADP3189JCPZ-R7.pdf
- Description:
- 8 BIT, PROGRAMMABLE 2-TO 5-PHASE
- Quantity:
- Payment:

- Shipping:

Inventory:140
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Product details
Overview
ADP3189JCPZ-R7 from Analog Devices is an 8-bit programmable 2- to 5-phase synchronous buck controller optimized for Intel® VR10.x/VR11-compliant CPU core power supplies. It delivers ±7.7 mV worst-case differential sensing error, logic-level PWM outputs for external high-power drivers, and active current balancing across all phases. Used in desktop PC VRM modules powering next-generation Intel processors.
For engineers reviewing the ADP3189JCPZ-R7 datasheet, ADP3189JCPZ-R7 pinout, ADP3189JCPZ-R7 application, or ADP3189JCPZ-R7 equivalent, key selection criteria include programmable phase count (2–5), VID-based 0.5 V–1.6 V output regulation, differential remote sensing accuracy, thermal throttling support via TTSENSE, and compatibility with external gate drivers such as ADP3120A.
Technical Context
The ADP3189JCPZ-R7 implements a multimode fixed-frequency PWM architecture with internal 8-bit VID DAC decoding, enabling direct interface to Intel VR10.x/VR11 CPUs. Its phase detection logic determines operational mode (2–5 phases) by monitoring PWMx pin states at startup, and master clock frequency (0.25–5 MHz) is set via RT pin resistor.
It integrates dedicated current-sense amplifier (CSA) with CSSUM/CSREF/CSCOMP terminals for DCR- or resistor-based total output current measurement, supporting load-line positioning and independent current-limit threshold setting. Thermal monitoring uses TTSENSE with dual thresholds (VRHOT/ VRFAN) and hysteresis for dynamic throttling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Count | Programmable 2-, 3-, 4-, or 5-phase operation via PWMx pin strapping; enables scalable current handling and ripple cancellation. |
| Output Voltage Range | 0.5 V to 1.6 V digitally set via 8-bit VID code; supports both VR10.x and VR11 specifications with DAC + precision reference. |
| Differential Sensing Error | ±7.7 mV over 0°C–85°C; ensures tight regulation under varying load and temperature without calibration. |
| Switching Frequency | Up to 1 MHz per phase (master clock up to 5 MHz); adjustable via RT resistor for VR size/efficiency trade-off. |
| Current Sensing | Integrated CSA with programmable gain via CSCOMP–CSSUM feedback; supports DCR, thermistor-corrected DCR, or sense-resistor topologies. |
| Thermal Protection | Dual open-drain outputs (VRHOT/VRFAN) with programmable thresholds (780–840 mV / 1.08–1.14 V) and 55 mV hysteresis on TTSENSE. |
| Power-Good Delay | Configurable via DELAY pin capacitor; supports 2 ms boot hold and 100–400 μs masking during VID changes. |
Pinout & Package
ADP3189JCPZ-R7 is housed in a 40-lead LFCSP (Lead Frame Chip Scale Package) with exposed pad for thermal dissipation. Pin layout supports compact VRM layout and phase-strapping flexibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 1) | Enable Input | Pull low to disable all PWM outputs and force PWRGD low; supports system-level power sequencing. |
| PWM1–PWM5 (Pins 30, 29, 28, 27, 26) | Logic-Level PWM Outputs | Drive external gate drivers (e.g., ADP3120A); phase count configured by tying unused PWMx pins to VCC. |
| SW1–SW5 (Pins 25–21) | Phase Current Sense Inputs | Monitor individual switch-node voltages for active current balancing and thermal distribution across phases. |
| VID0–VID7 (Pins 39–32) | Voltage ID Inputs | 8-bit parallel interface to CPU; decoded internally to set DAC output voltage (0.5–1.6 V) with VR10.x/VR11 mode selected by VIDSEL. |
| CSREF / CSSUM / CSCOMP (Pins 15, 16, 17) | Current Sense Amplifier Terminals | CSREF = current sense reference; CSSUM = summed inductor current node; CSCOMP = gain/compensation point for load-line and current-limit functions. |
| TTSENSE (Pin 10) | Thermal Sense Input | Accepts NTC thermistor divider; triggers VRHOT/VRFAN outputs when sensed voltage crosses programmed thresholds. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Phase Architecture | 2–5-phase operation selectable via hardware strapping, enabling design reuse across platforms with differing current requirements. |
| Active Current Balancing | Real-time per-phase current monitoring and correction via SWx inputs ensures uniform thermal loading and extends MOSFET lifetime. |
| Digital Load-Line Positioning | LLSET input allows precise adjustment of output voltage vs. load current (VOUT = VID − K·IOUT), meeting Intel VRM droop specifications. |
| On-the-Fly VID Support | Sub-microsecond VID transition delay (300 ns) and crowbar blanking enable seamless CPU voltage scaling during dynamic workload changes. |
| Robust Short-Circuit Protection | Programmable latch-off delay (8 ms typical with 10 nF CDELAY) prevents nuisance tripping while ensuring fast fault response. |
Applications
| Desktop CPU Core Power Supply | VRM Module for Intel Processors |
|---|---|
|
Use Scenario: Powers high-performance Intel Core i-series and Xeon E3/E5 processors in ATX desktop motherboards requiring tight transient response and multi-phase efficiency. IC Role / Device Role / Timing Role: Primary multiphase buck controller managing VID decoding, phase interleaving, current balancing, and thermal throttling coordination. Use Value: Enables stable sub-1 V core voltage delivery at >100 A with <±7.7 mV sensing error and <400 μs PWRGD response during VID transitions. |
Use Scenario: Integrated into modular VRM solutions for OEM motherboard vendors needing drop-in compliance with Intel VR11 specification. IC Role / Device Role / Timing Role: Central controller providing programmable phase count, load-line positioning, and crowbar protection for standardized VRM reference designs. Use Value: Reduces BOM count by eliminating external DAC and current-sense ICs; supports single-design reuse across 2–5 phase configurations via pin strapping. |
| High-Current Server VRM | Thermally Constrained Embedded Computing |
|
Use Scenario: Delivers scalable core power in 1U/2U servers where thermal density demands precise per-phase current sharing and hot-spot mitigation. IC Role / Device Role / Timing Role: Multiphase controller with SWx-based current sensing and VRHOT-triggered throttling to prevent localized overheating in dense PCB layouts. Use Value: Maintains <±1% current imbalance across 5 phases under full load, reducing peak junction temperature by up to 12°C versus unbalanced designs. |
Use Scenario: Powers fanless embedded systems (e.g., industrial PCs, medical imaging controllers) requiring silent operation and thermal headroom management. IC Role / Device Role / Timing Role: Controller with TTSENSE-driven VRFAN activation and programmable delay timers to coordinate cooling and performance throttling. Use Value: Enables predictive thermal management using NTC thermistor feedback, extending system uptime before hard thermal shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6322IRZ | 6-phase capable; integrated MOSFET drivers; no external VID DAC required; higher quiescent current (15 mA vs. 10 mA). | Targeted at cost-sensitive consumer boards with integrated driver requirement; lacks TTSENSE-based thermal throttling. | Choose ISL6322IRZ when board space is constrained and driver integration is preferred over discrete driver flexibility. |
| RT8803AZSP | 5-phase only; supports VR12.5; lower differential sensing error (±5 mV); no LLSET programmability for load line. | Designed for newer Intel platforms requiring VR12.5 compliance; limited configurability for legacy VR10.x systems. | Choose RT8803AZSP for VR12.5-compliant designs where tighter sensing accuracy outweighs load-line tuning needs. |
Compared with ISL6322IRZ and RT8803AZSP, the ADP3189JCPZ-R7 offers unique flexibility in phase count selection (2–5), explicit VR10.x/VR11 mode switching via VIDSEL, and fully programmable load-line positioning-making it optimal for mixed-platform VRM development and long-lifecycle industrial deployments.
Availability
ADP3189JCPZ-R7 is available at Aetrix Electronics and suitable for desktop PC power supplies, VRM modules, and high-current server power delivery systems requiring stable component supply and long-term obsolescence management.
Supply support for ADP3189JCPZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADP3189JCPZ-R7 belongs to Analog Devices' VRM/VRD controller product line, engineered specifically for Intel-compatible CPU core power delivery with emphasis on accuracy, thermal resilience, and design reuse across phase-count variants.
FAQ
What is the operating temperature range for the ADP3189JCPZ-R7?
The ADP3189JCPZ-R7 is specified over the extended commercial temperature range of 0°C to 85°C ambient. Its junction temperature must not exceed 125°C, and thermal impedance (θJA) is rated at 100°C/W. The device includes built-in thermal throttling via TTSENSE input and VRHOT/VRFAN outputs to protect downstream components under sustained high-load conditions.
How does the ADP3189JCPZ-R7 support on-the-fly VID voltage changes?
The ADP3189JCPZ-R7 supports on-the-fly VID changes with a 300 ns transition delay from VID code update to FB voltage change, and a 100–400 μs PWRGD masking window. Its crowbar circuit blanks during transitions to prevent false fault triggering, and the internal DAC updates synchronously with CPU requests-enabling dynamic CPU frequency scaling without power interruption.
Can the ADP3189JCPZ-R7 be used in a 2-phase configuration?
Yes, the ADP3189JCPZ-R7 supports 2-phase operation by strapping PWM3, PWM4, and PWM5 to VCC during startup. Internal phase detection logic identifies this condition and configures the controller accordingly. All current balancing, load-line, and protection features remain fully functional in 2-phase mode, maintaining ±7.7 mV sensing accuracy and active thermal distribution.
What external components are required for basic ADP3189JCPZ-R7 operation?
Minimum external components for ADP3189JCPZ-R7 include: RT resistor (sets oscillator frequency), CDELAY capacitor (configures soft-start, latch-off, and PWRGD delays), CSSUM-to-CSREF current-sense resistors, LLSET resistor divider (for load-line), and VID pull-down resistors. Optional components include thermistor network on TTSENSE and RAMPADJ resistor for PWM ramp tuning.
Does the ADP3189JCPZ-R7 integrate MOSFET drivers?
No, the ADP3189JCPZ-R7 does not integrate MOSFET drivers. It provides logic-level PWM outputs (PWM1–PWM5) designed to interface with external high-current gate drivers such as the ADP3120A. This architecture decouples control and power stages, enabling optimized thermal management, flexible FET selection, and scalability across current requirements without redesigning the controller stage.
ADP3189JCPZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad, CSP
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Controller, Intel VR10, VR11
- Voltage - Input:
- 12V
- Number of Outputs:
- 4
- Voltage - Output:
- 0.5V ~ 1.6V
- Operating Temperature:
- 0°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-LFCSP-VQ (6x6)
ADP3189JCPZ-R7 FAQ
1.How can I place an order for ADP3189JCPZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP3189JCPZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP3189JCPZ-R7 reliable?
The price and inventory of ADP3189JCPZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP3189JCPZ-R7 is usually 5 days.
3.What payment methods are accepted for ADP3189JCPZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP3189JCPZ-R7 transactions.
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4.How is shipping managed for ADP3189JCPZ-R7?
ADP3189JCPZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP3189JCPZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP3189JCPZ-R7?
For technical support, including ADP3189JCPZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP3189JCPZ-R7 requirements.
6.How does Aetrix verify that ADP3189JCPZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADP3189JCPZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP3189JCPZ-R7 meets industry standards.
7.What is the process for return or replacement of ADP3189JCPZ-R7?
All ADP3189JCPZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP3189JCPZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP3189JCPZ-R7 part is unused and in its original packaging.
Return procedure for ADP3189JCPZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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