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Analog Devices Inc. ADP3189JCPZ-RL

Part No.:
ADP3189JCPZ-RL
Manufacturer:
Analog Devices Inc.
Category:
Special Purpose Regulators
Package:
40-VFQFN Exposed Pad, CSP
Datasheet:
AetrixADP3189JCPZ-RL.pdf
Description:
8-BIT, PROGRAMMABLE 2-TO 5-PHASE
Quantity:
Payment:
Payment
Shipping:
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Inventory:424,990

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Product details

Overview

ADP3189JCPZ-RL from Analog Devices is an 8-bit programmable 2- to 5-phase synchronous buck controller optimized for Intel VR10.x/VR11-compliant CPU core power supplies. It delivers ±7.7 mV worst-case differential sensing error, supports 0.5 V–1.6 V output via internal VID DAC, and drives external high-power MOSFET drivers with logic-level PWM outputs up to 1 MHz per phase in 5-phase mode. Used in desktop PC VRM modules for next-generation Intel processors.

For engineers reviewing the ADP3189JCPZ-RL datasheet, ADP3189JCPZ-RL pinout, ADP3189JCPZ-RL application, or ADP3189JCPZ-RL equivalent, key selection criteria include phase configurability (2–5), VID DAC accuracy over temperature, active current balancing across phases, programmable short-circuit latch-off delay, and support for dynamic on-the-fly VID code changes during operation.

Technical Context

The ADP3189JCPZ-RL implements a multimode PWM architecture with internal 8-bit VID DAC decoding VR10.x/VR11 codes to set output voltage between 0.5 V and 1.6 V referenced to FBRTN. Its phase count is configured by pulling PWM3–PWM5 to VCC, enabling 2-, 3-, 4-, or 5-phase operation with programmable master oscillator frequency (250 kHz–5 MHz) set via RT resistor.

It integrates dedicated current-sense amplifier (CSA) with CSSUM/CSREF/CSCOMP interface for DCR- or resistor-based total output current measurement, enabling load-line positioning and independent current-limit threshold setting. Thermal throttling is supported via TTSENSE input with dual thresholds for VRHOT and VRFAN outputs.

Key Specifications

Parameter Value and Actual Design Meaning
Output Voltage Range0.5 V to 1.6 V digitally programmed via 8-bit VID inputs; supports both VR10.x and VR11 specifications.
Differential Sensing Error±7.7 mV worst-case over 0°C–85°C; ensures tight regulation under thermal stress and load transients.
Phase ConfigurationSelectable 2-, 3-, 4-, or 5-phase operation; determined by external pull-up of PWM3–PWM5 pins to VCC.
Switching FrequencyUp to 1 MHz per phase (e.g., 5 MHz master clock ÷ 5 phases); set via RT resistor with ±10% variation at 25°C.
Current Balance AccuracyActive per-phase current balancing using SW1–SW5 inputs; maintains thermal equilibrium across phases during dynamic load steps.
Short-Circuit ProtectionProgrammable latch-off delay (e.g., 8 ms with 10 nF CDELAY); prevents false triggering during transient overload.
Power-Good DelayConfigurable blanking time (2 ms typical) for PWRGD during soft start and on-the-fly VID changes.

Pinout & Package

ADP3189JCPZ-RL is housed in a 40-lead LFCSP (Lead Frame Chip Scale Package) with exposed pad for thermal dissipation. Pin pitch is 0.5 mm; package dimensions are 6 mm × 6 mm × 0.85 mm (max).

Pin/Terminal Circuit Role Design Meaning
EN (Pin 1)Enable InputPull low to disable all PWM outputs and force PWRGD low; includes 80–120 mV hysteresis for noise immunity.
PWM1–PWM5 (Pins 26–30, 29, 28, 27, 26)Logic-Level PWM OutputsDrive external gate drivers (e.g., ADP3120A); phase count set by tying unused PWMx pins to VCC.
SW1–SW5 (Pins 25–21)Phase Current Sense InputsMonitor switch-node voltage per phase for active current balancing; unused SWx pins left open.
VID0–VID7 (Pins 39–32)VID Code Inputs8-bit parallel interface decoded by internal DAC; VIDSEL (Pin 40) selects VR10.x vs. VR11 mapping.
CSREF / CSSUM / CSCOMP (Pins 15/16/17)Current Sense InterfaceCSREF = reference node; CSSUM = summing point for inductor currents; CSCOMP = compensation/gain node for CSA loop.
RT (Pin 12)Oscillator Frequency SetExternal resistor to GND sets master clock frequency (250 kHz–5 MHz); per-phase frequency = fmaster ÷ Nphases.

Key Features

Feature Design Value
Programmable Phase Count2–5 phases selected via hardware configuration (PWM pin tie-offs), enabling scalable VRM design without firmware change.
Dynamic VID SupportOn-the-fly VID code changes with ≤400 μs PWRGD masking and ≤300 ns FB response, enabling CPU voltage scaling during operation.
Load-Line PositioningDigitally adjustable droop via LLSET pin; CSREF − LLSET sets offset proportional to load current, meeting Intel VRM load-line spec.
Thermal Throttling OutputsVRHOT and VRFAN open-drain signals triggered by TTSENSE voltage crossing 810 mV or 1.11 V thresholds, respectively.
Accurate Current LimitingIndependent current-limit threshold (105–135 mV) set via ILIMIT resistor; decoupled from load-line adjustment for stable protection.

Applications

Desktop VRM Module Intel CPU Core Supply

Use Scenario: High-current, low-voltage DC-DC conversion for LGA1155/LGA1156 desktop CPUs requiring VR11 compliance.

IC Role / Device Role / Timing Role: Primary multiphase buck controller managing phase sequencing, VID decoding, current balancing, and PWRGD signaling.

Use Value: Enables 5-phase operation delivering >100 A with <±7.7 mV sensing error, reducing per-phase current stress and improving thermal distribution.

Use Scenario: Dynamic voltage scaling during CPU turbo boost and power-state transitions (C-states).

IC Role / Device Role / Timing Role: Real-time VID interpreter and fast-response error amplifier ensuring sub-microsecond FB update and controlled PWRGD blanking.

Use Value: Supports ≤300 ns VID-to-FB delay and ≤400 μs PWRGD reassertion, maintaining system stability during rapid voltage transitions.

VR Hot Monitoring System Multi-Phase Load-Line Regulation

Use Scenario: Thermal management of CPU voltage regulator using NTC thermistor on VR heatsink.

IC Role / Device Role / Timing Role: TTSENSE analog front-end with dual comparators generating VRHOT (critical overtemp) and VRFAN (fan control) signals.

Use Value: Provides 55 mV hysteresis on TTSENSE and separate 810 mV/1.11 V thresholds, enabling precise thermal throttling without software intervention.

Use Scenario: Maintaining output voltage droop proportional to load current per Intel VRM specification.

IC Role / Device Role / Timing Role: LLSET-driven current-sense amplifier generating CSREF − LLSET signal for DAC offset correction.

Use Value: Achieves load-line accuracy within −78 to −82 mV at 80 mV LLSET offset, ensuring correct CPU VDD positioning under full load.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multiphase buck controller applications.

Alternative Part Technical Difference Application Difference Selection Advice
ISL6322IRZ6-phase capable; integrated MOSFET drivers; no external VID DAC - requires SMBus interface for voltage setting.Targeted at server VRMs with higher phase count and digital control; lacks native VR11 VID pin compatibility.Choose ISL6322IRZ when digital PMBus control and integrated drivers are preferred over analog VID interface.
TPS53679RSLRSingle-chip 6-phase controller with integrated drivers; supports VR13/IMVP8; uses PMBus for VID updates instead of parallel VID pins.Designed for modern mobile/desktop platforms requiring IMVP8 compliance and telemetry; not pin-compatible or VID-pin compatible with ADP3189JCPZ-RL.Choose TPS53679RSLR for IMVP8 systems needing telemetry and embedded drivers, not legacy VR11 VID bus designs.

Compared with ISL6322IRZ and TPS53679RSLR, the ADP3189JCPZ-RL uniquely provides native 8-bit parallel VID decoding, discrete driver interface flexibility, and LFCSP packaging optimized for compact desktop VRMs - making it irreplaceable in VR10.x/VR11 designs requiring analog VID bus and external driver selection.

Availability

ADP3189JCPZ-RL is available at Aetrix Electronics and suitable for desktop PC VRM modules, Intel CPU core power supplies, and multi-phase load-line regulated power systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ADP3189JCPZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and power management markets since 1965.

The ADP3189JCPZ-RL belongs to Analog Devices' VRM/VRD controller product line, engineered specifically for high-efficiency, multi-phase CPU core power delivery in Intel-compliant desktop platforms with emphasis on VID accuracy, thermal balance, and dynamic voltage scaling.

FAQ

What is the operating temperature range for the ADP3189JCPZ-RL?

The ADP3189JCPZ-RL is specified for operation across the extended commercial temperature range of 0°C to +85°C ambient. Its junction temperature must not exceed 125°C, and thermal impedance (θJA) is rated at 100°C/W. The device includes thermal throttling circuitry via TTSENSE input to activate VRHOT and VRFAN outputs when remote temperature thresholds are exceeded.

How does the ADP3189JCPZ-RL configure 2-phase versus 5-phase operation?

The ADP3189JCPZ-RL detects phase count during startup by monitoring PWM3–PWM5 pin voltages. For 5-phase, all PWM outputs float; for 4-phase, PWM5 is tied to VCC; for 3-phase, PWM4 and PWM5 are tied to VCC; for 2-phase, PWM3, PWM4, and PWM5 are tied to VCC. Each configuration alters the master clock division ratio (fmaster/Nphases) to maintain per-phase frequency up to 1 MHz.

Does the ADP3189JCPZ-RL support both VR10.x and VR11 voltage identification standards?

Yes, the ADP3189JCPZ-RL supports both VR10.x and VR11 standards through the VIDSEL pin (Pin 40). When VIDSEL is grounded, VID0–VID7 decode as VR10.x (7-bit + 1-bit); when VIDSEL is pulled to 1.25 V, the same pins decode as full VR11 8-bit codes. This allows single-hardware compatibility across multiple Intel processor generations.

What external components define the current-limit threshold of the ADP3189JCPZ-RL?

The current-limit threshold of the ADP3189JCPZ-RL is set by an external resistor (RILIMIT) connected from ILIMIT (Pin 11) to GND. With RILIMIT = 143 kΩ, the threshold is 105–135 mV (VCL), yielding a current-limit setting ratio of 10 mV/μA. This threshold is independent of load-line programming, allowing precise short-circuit protection without affecting voltage positioning.

Can the ADP3189JCPZ-RL operate without a thermistor on the TTSENSE pin?

Yes, the ADP3189JCPZ-RL can operate without a thermistor on TTSENSE. In default configuration, TTSENSE is left unconnected or biased to a fixed voltage; VRHOT and VRFAN outputs remain inactive. Thermal throttling functionality is optional and only engaged when an NTC thermistor is connected between TTSENSE and GND to enable temperature-dependent VRHOT/VRFAN signaling.

ADP3189JCPZ-RL Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
40-VFQFN Exposed Pad, CSP
Packaging:
Bulk
Product Status:
Obsolete
Applications:
Controller, Intel VR10, VR11
Voltage - Input:
12V
Number of Outputs:
4
Voltage - Output:
0.5V ~ 1.6V
Operating Temperature:
0°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
40-LFCSP (6x6)

ADP3189JCPZ-RL FAQ

1.How can I place an order for ADP3189JCPZ-RL through Aetrix?

Please submit a Request for Quotation (RFQ) for ADP3189JCPZ-RL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADP3189JCPZ-RL reliable?

The price and inventory of ADP3189JCPZ-RL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP3189JCPZ-RL is usually 5 days.

3.What payment methods are accepted for ADP3189JCPZ-RL?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP3189JCPZ-RL transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADP3189JCPZ-RL?

ADP3189JCPZ-RL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADP3189JCPZ-RL order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADP3189JCPZ-RL?

For technical support, including ADP3189JCPZ-RL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP3189JCPZ-RL requirements.

6.How does Aetrix verify that ADP3189JCPZ-RL is sourced from the original manufacturer or authorized distributors?

All ADP3189JCPZ-RL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP3189JCPZ-RL meets industry standards.

7.What is the process for return or replacement of ADP3189JCPZ-RL?

All ADP3189JCPZ-RL units undergo pre-shipment inspection (PSI). If there is an issue with ADP3189JCPZ-RL, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADP3189JCPZ-RL part is unused and in its original packaging.

Return procedure for ADP3189JCPZ-RL:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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