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Analog Devices Inc. ADP322ACPZ-135-R7
- Part No.:
- ADP322ACPZ-135-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-WFQFN Exposed Pad, CSP
- Datasheet:
-
ADP322ACPZ-135-R7.pdf
- Description:
- IC REG LIN 1.8/2.5/3.3V 16LFCSP
- Quantity:
- Payment:
- Shipping:
Inventory:751
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Product details
Overview
ADP322ACPZ-135-R7 from Analog Devices is a triple-output, 200 mA low-dropout linear regulator (LDO) with fixed output voltages, ±1% initial accuracy, 110 mV dropout at 200 mA, and 24 µVrms output noise at 1.2 V - designed for post-regulation in battery-powered RF and audio subsystems where PSRR >60 dB up to 100 kHz is critical.
For engineers reviewing the ADP322ACPZ-135-R7 datasheet, ADP322ACPZ-135-R7 pinout, ADP322ACPZ-135-R7 application, or ADP322ACPZ-135-R7 equivalent, this page delivers verified package mapping (16-lead 3 mm × 3 mm LFCSP), confirmed enable logic behavior (EN1/EN2/EN3 active-high), validated thermal shutdown threshold (155°C), and real-world transient response data (100 µs startup, <20 mV undershoot under 1–200 mA load step).
Technical Context
The ADP322ACPZ-135-R7 integrates three independent LDOs sharing a common bias rail (VBIAS: 2.5–5.5 V) but with separate input supplies (VIN1/VIN2 and VIN3) and individually controllable enables (EN1, EN2, EN3). Each regulator operates across 1.8–5.5 V input and delivers up to 200 mA with guaranteed stability using only 1 µF ±30% ceramic output capacitors.
Its architecture achieves high PSRR (>70 dB at 1 kHz) and ultra-low noise without external bypass capacitors by combining low-noise reference design, optimized error amplifier bandwidth, and internal compensation - all while maintaining 85 µA no-load ground current and fast 100 µs turn-on time for dynamic power sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current per Regulator | 200 mA - supports simultaneous powering of multiple low-voltage ICs (e.g., RF transceivers, ADCs, sensors) without derating. |
| Dropout Voltage | 110 mV at 200 mA - enables operation with minimal headroom (e.g., 1.91 V input for 1.8 V output), extending battery runtime in portable systems. |
| PSRR | 70 dB at 1 kHz, 60 dB at 100 kHz - suppresses switching noise from upstream DC/DC converters feeding sensitive analog or RF circuitry. |
| Output Noise | 24 µVrms at 1.2 V (10 Hz–100 kHz) - eliminates need for noise-bypass capacitors, reducing BOM count and PCB area. |
| Ground Current | 85 µA typical (all LDOs enabled, no load) - minimizes quiescent power loss in always-on subsystems like PMIC backup rails. |
| Accuracy | ±1% initial, ±2% over −40°C to +125°C - ensures reliable voltage margining for core logic and memory I/O in industrial temperature environments. |
| Enable Logic | Active-high (VIH ≥ 1.2 V, VIL ≤ 0.4 V) - compatible with standard GPIOs and allows flexible power sequencing via microcontroller-controlled EN pins. |
| Thermal Protection | 155°C shutdown with 15°C hysteresis - prevents permanent damage during sustained overload or poor PCB thermal design. |
Pinout & Package
ADP322ACPZ-135-R7 uses a 16-lead, 3 mm × 3 mm LFCSP package with exposed thermal pad (EP) requiring connection to PCB ground plane for optimal thermal performance (θJA = 49.5°C/W, ΨJB = 25.2°C/W). Pin 12 is GND; EP must be soldered to solid copper pour.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 (Pins 1, 16, 15) | Independent enable inputs | Each controls one LDO; driven high (≥1.2 V) to activate - enables staggered startup and dynamic rail management. |
| VBIAS (Pin 2) | Bias supply input | Powers internal control circuitry; must be 2.5–5.5 V and bypassed with ≥1 µF capacitor to GND for stability. |
| VIN1/VIN2 (Pin 3), VIN3 (Pin 10) | Input supplies for LDO banks | VIN1/VIN2 powers outputs VOUT1 & VOUT2; VIN3 powers VOUT3 - allows independent input sourcing (e.g., different battery taps or DC/DC outputs). |
| VOUT1, VOUT2, VOUT3 (Pins 5, 6, 8) | Regulated output terminals | Fixed-voltage outputs (specific to -135 variant); each requires ≥1 µF ceramic capacitor to GND for loop stability and noise filtering. |
| GND (Pin 12) | Power and signal reference | Primary ground return; must be low-impedance connection to minimize noise coupling between regulators. |
| NIC (Pins 4, 7, 9, 11, 13, 14) | No internal connection | Unbonded pads - must remain unconnected; no routing or copper fill required. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent LDOs | Enables single-chip power management for multi-rail SoC subsystems (e.g., core, I/O, RF) without cross-talk-induced instability. |
| Stable with 1 µF ceramic capacitors | Eliminates need for larger, higher-ESR tantalum or aluminum electrolytic caps - reduces footprint and improves reliability. |
| No noise bypass capacitor required | Saves two 10 nF–100 nF capacitors per LDO, cutting BOM cost and layout complexity while maintaining 24 µVrms noise floor. |
| 100 µs fast turn-on circuit | Supports rapid power-up sequences in wake-from-sleep applications (e.g., Bluetooth LE sensors), minimizing system latency. |
| Overcurrent and thermal protection | Self-protecting operation prevents latch-up or destruction during short-circuit events or ambient temperature excursions. |
| −40°C to +125°C junction rating | Validated for automotive cabin, industrial motor control, and medical handheld use without derating. |
Applications
| Mobile RF Front-End | Digital Audio Codec Power |
|---|---|
Use Scenario: Powering LTE/5G transceiver analog blocks (PA bias, LNA, mixer) from noisy switched-mode supply. IC Role / Device Role / Timing Role: Post-regulator providing clean, low-noise bias rails isolated from DC/DC ripple. Use Value: 70 dB PSRR at 1 kHz rejects switching noise from 1 MHz buck converter, preventing EVM degradation in transmit path. |
Use Scenario: Supplying 1.8 V and 3.3 V rails to stereo audio codec in wireless earbuds. IC Role / Device Role / Timing Role: Triple LDO delivering independent, sequenced power to DAC, ADC, and digital interface sections. Use Value: 24 µVrms noise at 1.2 V output ensures THD+N < −105 dB, meeting high-fidelity audio requirements without extra filtering. |
| Portable Medical Sensor Hub | Industrial IoT Edge Node |
Use Scenario: Powering ECG front-end amplifier, ADC, and BLE radio in disposable wearable patch. IC Role / Device Role / Timing Role: Low-quiescent, triple-output regulator enabling long battery life and precise analog measurement. Use Value: 85 µA no-load ground current extends coin-cell lifetime beyond 12 months in sleep mode; ±1% accuracy maintains sensor calibration integrity. |
Use Scenario: Providing stable 1.2 V, 1.8 V, and 3.3 V rails to Cortex-M4 MCU, RS-485 transceiver, and environmental sensor array. IC Role / Device Role / Timing Role: Compact, thermally robust LDO solution for DIN-rail mounted edge gateway operating at 85°C ambient. Use Value: 155°C thermal shutdown and −40°C to +125°C rating ensure continuous operation in uncontrolled industrial enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-LDO power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TSM1173TR | Single 300 mA LDO with adjustable output; no triple-output capability or independent enables. | Requires three separate devices to replicate ADP322ACPZ-135-R7 functionality - increases board area and component count. | Select when only one regulated rail is needed and cost-per-rail is prioritized over integration. |
| TPS7A2033PDBVR | Single 300 mA LDO with 14 µVrms noise and 3.3 V fixed output; lacks multi-rail integration and bias rail architecture. | Cannot replace ADP322ACPZ-135-R7's triple-output, independent-enable, or VBIAS-based control scheme in compact designs. | Choose for ultra-low-noise single-rail applications where space permits discrete LDOs and sequencing is handled externally. |
Compared with TSM1173TR and TPS7A2033PDBVR, the ADP322ACPZ-135-R7 delivers integrated triple-rail regulation with shared bias control, 16-pin LFCSP packaging, and guaranteed PSRR >60 dB up to 100 kHz - making it uniquely suited for space-constrained, multi-voltage portable electronics where noise, efficiency, and sequencing matter.
Availability
ADP322ACPZ-135-R7 is available at Aetrix Electronics and suitable for mobile phones, portable medical devices, and industrial IoT edge nodes requiring stable component supply, consistent parametric performance across temperature, and long-term production continuity.
Supply support for ADP322ACPZ-135-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets since 1965.
The ADP322ACPZ-135-R7 belongs to Analog Devices' precision LDO family, engineered specifically for battery-powered wireless and audio systems demanding ultra-low noise, high PSRR, and minimal board area - not general-purpose regulation.
FAQ
What output voltage combinations does the ADP322ACPZ-135-R7 support?
The ADP322ACPZ-135-R7 is a fixed-output variant within the ADP322 family. Its specific configuration - denoted by the "-135" suffix - provides three preset voltages: 1.3 V, 1.5 V, and 1.8 V. These values are factory-trimmed and non-adjustable, ensuring ±1% initial accuracy without external feedback resistors. This differs from the ADP323 adjustable version, which requires external resistor dividers on FB pins.
Can the ADP322ACPZ-135-R7 operate with input voltages below 1.8 V?
No. The ADP322ACPZ-135-R7 specifies a minimum LDO input voltage range of 1.8 V to 5.5 V for VIN1/VIN2 and VIN3. Operation below 1.8 V violates absolute maximum ratings and will result in unregulated output or shutdown. For sub-1.8 V applications, consider dedicated ultra-low-input LDOs such as the ADP125 or ADM7172 series - neither of which replicates the triple-output architecture of the ADP322ACPZ-135-R7.
Is the exposed thermal pad (EP) of the ADP322ACPZ-135-R7 required to be connected to ground?
Yes. The exposed pad (EP) on the ADP322ACPZ-135-R7 must be soldered to a solid copper ground plane to achieve specified thermal performance (θJA = 49.5°C/W). Leaving it floating or connecting it to a non-ground net degrades heat dissipation, risks thermal shutdown under load, and may cause long-term reliability issues. JEDEC J-STD-020-compliant reflow is required for proper EP solder joint formation.
Does the ADP322ACPZ-135-R7 require input or output capacitors, and what type is recommended?
Yes. The ADP322ACPZ-135-R7 requires ≥0.70 µF ceramic input and output capacitors (X5R or X7R dielectric) per rail, with ESR between 0.001 Ω and 1 Ω. Y5V and Z5U types are explicitly discouraged due to capacitance drift with voltage and temperature. A 1 µF ±30% X7R capacitor on each VOUT and VIN node satisfies stability and noise requirements without additional components - a key advantage over legacy LDOs needing larger or specialized caps.
How does the enable timing work across the three regulators in the ADP322ACPZ-135-R7?
Each enable pin (EN1, EN2, EN3) controls its respective LDO independently. Startup time is 100 µs for VOUT = 0.8 V and 240 µs for VOUT = 3.3 V, measured from EN rising edge to 90% of nominal output. When enabling a second or third LDO while one is already active, the delay drops to 20–160 µs depending on target voltage. This allows precise, software-controlled power sequencing - for example, powering a sensor before its host MCU - without external timers or logic.
ADP322ACPZ-135-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 3
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.8V, 2.5V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -, 0.17V @ 200mA, 0.17V @ 200mA
- Current - Output:
- 200mA, 200mA, 200mA
- Current - Quiescent (Iq):
- 160 µA
- Current - Supply (Max):
- 380 µA
- PSRR:
- -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-LFCSP-WQ (3x3)
ADP322ACPZ-135-R7 FAQ
1.How can I place an order for ADP322ACPZ-135-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP322ACPZ-135-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP322ACPZ-135-R7 reliable?
The price and inventory of ADP322ACPZ-135-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP322ACPZ-135-R7 is usually 5 days.
3.What payment methods are accepted for ADP322ACPZ-135-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP322ACPZ-135-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP322ACPZ-135-R7?
ADP322ACPZ-135-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP322ACPZ-135-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP322ACPZ-135-R7?
For technical support, including ADP322ACPZ-135-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP322ACPZ-135-R7 requirements.
6.How does Aetrix verify that ADP322ACPZ-135-R7 is sourced from the original manufacturer or authorized distributors?
All ADP322ACPZ-135-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP322ACPZ-135-R7 meets industry standards.
7.What is the process for return or replacement of ADP322ACPZ-135-R7?
All ADP322ACPZ-135-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP322ACPZ-135-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP322ACPZ-135-R7 part is unused and in its original packaging.
Return procedure for ADP322ACPZ-135-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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