Analog Devices Inc. ADP5022ACBZ-2-R7

Overview

ADP5022ACBZ-2-R7 from Analog Devices is a dual 3 MHz, 800 mA buck regulator with one 300 mA LDO in a 24-lead 4 mm × 4 mm LFCSP package. It delivers ±1.8% output voltage accuracy, supports 2.3 V–5.5 V main input and 1.7 V–5.5 V LDO input, and operates in forced PWM or auto PWM/PSM mode for high efficiency across load range - used in FPGA and RF chipset power sequencing.

For engineers reviewing the ADP5022ACBZ-2-R7 datasheet, ADP5022ACBZ-2-R7 pinout, ADP5022ACBZ-2-R7 application, or ADP5022ACBZ-2-R7 equivalent, key selection criteria include out-of-phase buck operation to reduce input ripple, LDO PSRR >60 dB at 10 kHz, factory-programmable or adjustable VOUT, thermal shutdown at 150°C, and dedicated enable pins per channel.

Technical Context

The ADP5022ACBZ-2-R7 integrates two synchronous buck regulators operating out of phase to minimize input capacitor requirements and improve EMI performance. Each buck features 3 MHz switching frequency, 1200–1900 mA peak current limit, and programmable MODE pin control between forced PWM (constant frequency) and auto PWM/PSM (light-load efficiency optimization).

The integrated LDO provides 300 mA output with low dropout (75 mV at 3.3 V/300 mA), 100 μVrms output noise (10 Hz–100 kHz), and >60 dB PSRR up to 1 MHz. All three regulators use independent enable pins (EN1/EN2/EN3), analog ground (AGND) separation, and dedicated power grounds (PGND1/PGND2) for noise isolation.

Key Specifications

Pinout & Package

ADP5022ACBZ-2-R7 uses a 24-lead, 0.5 mm pitch, 4 mm × 4 mm LFCSP package with exposed pad (EPAD) recommended for soldering to PCB ground plane for thermal and electrical performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail PMU applications.

Compared with ADP5022ACBZ-2-R7, ADP5023ACPZ-2-R7 offers identical performance and drop-in compatibility, while TPS65023RSBR trades buck current headroom and out-of-phase EMI reduction for TI-specific system features - making ADP5022ACBZ-2-R7 optimal for space-constrained, noise-sensitive dual-buck applications.

Availability

ADP5022ACBZ-2-R7 is available at Aetrix Electronics and suitable for FPGA power management, portable medical instrumentation, and space-constrained IoT edge node designs requiring stable component supply and long-term production support.

Supply support for ADP5022ACBZ-2-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADP5022 belongs to Analog Devices' micro PMU product line, designed specifically for compact, high-efficiency power delivery in portable and embedded systems with multiple voltage rails and stringent noise requirements.

FAQ

What is the maximum output current supported by each buck regulator in the ADP5022ACBZ-2-R7?

The ADP5022ACBZ-2-R7 supports up to 800 mA continuous output current per buck regulator (BUCK1 and BUCK2), with a peak current limit of 1200–1900 mA depending on input voltage. This rating is validated across −40°C to +125°C junction temperature and enables reliable powering of FPGA cores, ASIC logic, and RF chipset I/O rails without derating in typical PCB thermal environments.

Does the ADP5022ACBZ-2-R7 support adjustable output voltages?

Yes, the ADP5022ACBZ-2-R7 supports both factory-programmed fixed outputs and externally adjustable outputs via FB1, FB2, and FB3 pins. For adjustable configurations, the feedback voltage is precisely 0.5 V (±1.8%), allowing standard resistor dividers to set outputs from 0.8 V to 3.8 V (bucks) or 0.8 V to 5.2 V (LDO). The ADP5022ACBZ-2-R7 datasheet provides recommended divider values and stability guidelines.

How does the MODE pin affect the operation of the ADP5022ACBZ-2-R7 buck regulators?

The MODE pin on the ADP5022ACBZ-2-R7 selects between two operating modes: logic-high enables forced PWM mode (constant 3 MHz switching regardless of load), while logic-low enables auto PWM/PSM mode (switches to power-save mode below ~100 mA load to improve light-load efficiency). This dual-mode capability allows the ADP5022ACBZ-2-R7 to maintain >80% efficiency from 1 mA to full 800 mA load without external control circuitry.

What is the purpose of the separate PGND1 and PGND2 pins on the ADP5022ACBZ-2-R7?

PGND1 and PGND2 are dedicated power ground returns for BUCK1 and BUCK2, respectively, and must be routed separately to minimize mutual coupling between high di/dt switching currents. This separation prevents noise from one buck's ground return from modulating the other buck's feedback reference or MOSFET gate drive, ensuring stable regulation and reduced output voltage ripple - a critical requirement confirmed in ADP5022ACBZ-2-R7's layout guidelines and functional block diagram.

Can the ADP5022ACBZ-2-R7 LDO operate with an input voltage lower than its output voltage?

No, the ADP5022ACBZ-2-R7 LDO requires a minimum headroom voltage: dropout is specified as 75 mV at 3.3 V/300 mA, meaning VIN3 must be at least VOUT3 + 0.075 V. The absolute minimum VIN3 is 1.7 V, so the LDO cannot regulate if VIN3 falls below the required headroom - for example, it cannot generate 3.3 V output from a 3.2 V input. This constraint is explicitly defined in the LDO specifications table and verified across temperature.