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Analog Devices Inc. ADP5023ACPZ-2-R7
- Part No.:
- ADP5023ACPZ-2-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 24-WFQFN Exposed Pad, CSP
- Datasheet:
-
ADP5023ACPZ-2-R7.pdf
- Description:
- IC REG TRPL BCK/LNR SYNC 24LFCSP
- Quantity:
- Payment:
- Shipping:
Inventory:228
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Product details
Overview
ADP5023ACPZ-2-R7 from Analog Devices is a dual-buck + single-LDO power management IC integrating two 800 mA, 3 MHz synchronous step-down regulators and one 300 mA low-noise LDO in a 24-lead 4 mm × 4 mm LFCSP package. It delivers ±1.8% output voltage accuracy, supports input ranges of 2.3–5.5 V (buck) and 1.7–5.5 V (LDO), and operates in forced PWM or auto PWM/PSM mode - enabling high efficiency in space-constrained portable instrumentation and FPGA power systems.
For engineers reviewing the ADP5023ACPZ-2-R7 datasheet, ADP5023ACPZ-2-R7 pinout, ADP5023ACPZ-2-R7 application, or ADP5023ACPZ-2-R7 equivalent, key selection criteria include out-of-phase buck operation for reduced input ripple, LDO PSRR >60 dB up to 10 kHz, factory-programmable or adjustable VOUTs (0.8–3.8 V for bucks, 0.8–5.2 V for LDO), and thermal shutdown at 150°C with 20°C hysteresis.
Technical Context
The ADP5023ACPZ-2-R7 implements independent enable control per channel (EN1/EN2/EN3), dedicated analog ground (AGND) and power ground (PGND1/PGND2) separation, and MODE-pin-selectable regulation modes. Its buck regulators use integrated NMOS/PFET switches with RDS(ON) as low as 137 mΩ (high-side) and 162 mΩ (low-side) at 5.5 V input, supporting peak current limiting at 1200–1900 mA.
The LDO features 100 μVrms output noise (10 Hz–100 kHz), dropout voltage as low as 50 mV at 5.2 V/300 mA, and maintains >60 dB PSRR up to 1 MHz. All regulators share a common AVIN supply and support soft-start via internal circuitry, with startup times of 250 μs (BUCK1/LDO) and 300 μs (BUCK2).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Regulator topology | Dual synchronous buck + single LDO - enables compact, high-efficiency multi-rail power for SoC/FPGA core and I/O domains. |
| Switching frequency | 2.5–3.5 MHz - allows use of small 1 μH inductors and 10 μF ceramic output capacitors, minimizing PCB area. |
| Buck output current | 800 mA per channel - sufficient to power ARM Cortex-A/M cores, DDR memory termination, or RF transceiver bias rails. |
| LDO output current | 300 mA - supports noise-sensitive analog circuits (ADCs, sensors, PLLs) with high PSRR and low noise. |
| Output voltage accuracy | ±1.8% over temperature - ensures stable logic-level compliance for 1.8 V, 2.5 V, 3.3 V, and 5.2 V rails without external trimming. |
| Thermal shutdown | 150°C threshold with 20°C hysteresis - protects against sustained overload or poor heatsinking in sealed enclosures. |
| Package | 24-lead LFCSP (4 mm × 4 mm, 0.5 mm pitch) with exposed pad - provides low θJA = 35°C/W for passive thermal management. |
Pinout & Package
ADP5023ACPZ-2-R7 uses a 24-lead, 4 mm × 4 mm LFCSP package with exposed thermal pad (EPAD). Pin 1 is located at top-left corner (viewed from top); AGND pins (1, 2, 18, 23, 24) must be connected to system analog ground plane; EPAD must be soldered to PCB ground for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Independent enable inputs | Logic-high active; each controls respective regulator - enables flexible power sequencing for multi-voltage SoCs. |
| MODE | Buck operating mode select | High = forced PWM (constant 3 MHz); Low = auto PWM/PSM - optimizes light-load efficiency without external control. |
| FB1, FB2, FB3 | Feedback inputs | Support resistor-divider programming for adjustable outputs; fixed versions tie FBx to VOUTx or leave unconnected per datasheet. |
| VIN1/VIN2/VIN3 | Input supplies | VIN1/VIN2: 2.3–5.5 V for bucks; VIN3: 1.7–5.5 V for LDO - allows independent sourcing (e.g., battery + separate LDO input). |
| SW1/SW2 | Switching nodes | Connect to external inductor; require low-ESR ceramic caps and careful layout to minimize EMI and switching losses. |
| PGND1/PGND2 | Dedicated power grounds | Separate return paths for buck switch currents - prevents coupling into sensitive analog sections (AGND). |
Key Features
| Feature | Design Value |
|---|---|
| Out-of-phase buck operation | Reduces RMS input capacitor current by ~30%, allowing smaller 4.7 μF input caps instead of ≥10 μF for in-phase designs. |
| LDO PSRR >60 dB @ 10 kHz | Maintains clean analog supply under digital switching noise - critical for high-resolution ADCs and RF synthesizers. |
| Low quiescent current (108–175 μA) | Extends battery life in always-on subsystems (e.g., sensor wake-up logic, real-time clocks) without sacrificing startup speed. |
| Factory-programmable VOUT options | Eliminates external feedback resistors for standard voltages (e.g., 1.2 V, 1.8 V, 3.3 V), reducing BOM count and layout complexity. |
| Thermal and UVLO protection | Integrated shutdown with hysteresis prevents thermal runaway and brownout-induced latch-up in wide-input industrial applications. |
Applications
| Processor Core Power | FPGA I/O Bank Supply |
|---|---|
|
Use Scenario: Powering ARM Cortex-A series CPU cores requiring tightly regulated 1.0–1.2 V at up to 800 mA with fast transient response. IC Role / Device Role / Timing Role: Primary buck regulator (BUCK1) delivers core voltage with <250 μs startup and <1% load regulation drift across −40°C to +125°C. Use Value: Enables deterministic boot timing and avoids voltage droop during burst-mode execution, preventing cache corruption or reset events. |
Use Scenario: Supplying configurable 1.8 V / 2.5 V / 3.3 V I/O banks on Xilinx Artix-7 FPGAs with simultaneous switching noise immunity. IC Role / Device Role / Timing Role: BUCK2 provides I/O rail with out-of-phase switching to reduce input ripple; LDO cleans residual noise before delivery to I/O buffers. Use Value: Meets FPGA VCCO noise specs (<10 mVpp) while maintaining 3.3 V ±3% tolerance during 100 mA/ns slew-rate transients. |
| Portable Medical Sensor Hub | RF Transceiver Bias Rail |
|
Use Scenario: Powering ultra-low-power ECG front-end ASICs and BLE radio modules in handheld diagnostic devices. IC Role / Device Role / Timing Role: LDO (VOUT3) supplies analog signal chain with 100 μVrms noise; bucks supply digital baseband and RF PA at 3.3 V/1.8 V. Use Value: Achieves <90 dB SNR in 24-bit delta-sigma ADCs by isolating switching noise - validated per IEC 60601-1 EMC requirements. |
Use Scenario: Generating clean 2.8 V bias for GaAs pHEMT power amplifiers in sub-GHz ISM band transceivers. IC Role / Device Role / Timing Role: LDO delivers 2.8 V at 300 mA with >62 dB PSRR at 100 kHz - rejecting switching harmonics from adjacent buck stages. Use Value: Reduces AM-to-PM distortion and improves adjacent-channel power ratio (ACPR) by 8 dB versus standard LDOs in same footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP5037ACPZ-2-R7 | Same 2-buck+1-LDO architecture, identical 24-lead LFCSP, but supports 800 mA bucks + 300 mA LDO with enhanced light-load PSM efficiency. | Offers lower IQ (67 μA vs. 108 μA) and improved 10–100 mA efficiency - better suited for battery-powered IoT edge nodes with duty-cycled operation. | Select ADP5037ACPZ-2-R7 when >10-year battery life is required and VOUT programming flexibility matches ADP5023ACPZ-2-R7. |
| TPS65023RSBR | Texas Instruments part with dual 600 mA bucks + single 300 mA LDO in 4×4 mm QFN; lacks out-of-phase operation and has higher typical VOUT error (±2.5%). | Lower cost and broader distributor availability, but requires larger input caps and exhibits higher output noise (250 μVrms). | Choose TPS65023RSBR only if legacy design reuse or TI ecosystem alignment outweighs PSRR/noise and layout-area advantages of ADP5023ACPZ-2-R7. |
Compared with ADP5023ACPZ-2-R7, ADP5037ACPZ-2-R7 improves standby efficiency without changing pinout or BOM, while TPS65023RSBR trades noise performance and input ripple reduction for cost and supply-chain breadth - making ADP5023ACPZ-2-R7 optimal for noise-critical, space-constrained medical and test equipment.
Availability
ADP5023ACPZ-2-R7 is available at Aetrix Electronics and suitable for portable instrumentation, FPGA power management, and RF chipset supply applications requiring stable component supply, full production traceability, and long-term lifecycle support.
Supply support for ADP5023ACPZ-2-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.
The ADP5023ACPZ-2-R7 belongs to Analog Devices' micro PMU product line, engineered specifically for space-constrained, multi-rail power delivery in portable medical, test & measurement, and communications equipment where low noise, high accuracy, and thermal robustness are mandatory.
FAQ
What is the maximum supported input voltage for the buck regulators in ADP5023ACPZ-2-R7?
The ADP5023ACPZ-2-R7 buck regulators (BUCK1 and BUCK2) support an input voltage range of 2.3 V to 5.5 V, with absolute maximum rating of 6 V on AVIN. Operation above 5.5 V risks permanent damage per Absolute Maximum Ratings table in Rev. F datasheet.
Does ADP5023ACPZ-2-R7 support independent voltage setting for each output?
Yes - ADP5023ACPZ-2-R7 supports independent output voltage configuration: BUCK1 and BUCK2 outputs range from 0.8 V to 3.8 V, and the LDO (VOUT3) ranges from 0.8 V to 5.2 V, all programmable via external resistor dividers on FB1/FB2/FB3 or factory-set for fixed-voltage variants.
How does the MODE pin affect efficiency in ADP5023ACPZ-2-R7?
When MODE = high, ADP5023ACPZ-2-R7 forces continuous PWM mode (fixed ~3 MHz), optimizing heavy-load efficiency (>90% at 500 mA). When MODE = low, it auto-switches between PWM and power-save mode (PSM), improving light-load efficiency - e.g., 78% at 1 mA vs. 52% in forced PWM.
Can ADP5023ACPZ-2-R7 power both digital and analog subsystems simultaneously?
Yes - ADP5023ACPZ-2-R7 is explicitly designed for this: its dual bucks supply noisy digital loads (FPGA cores, processors), while its low-noise LDO (100 μVrms, >60 dB PSRR) powers sensitive analog circuits (ADCs, sensors, RF synthesizers), with AGND/PGND separation minimizing coupling.
What thermal performance can be expected from ADP5023ACPZ-2-R7 in a standard 2-layer PCB?
In a standard 2-layer PCB with 1-in² copper pour connected to the exposed pad, ADP5023ACPZ-2-R7 achieves θJA ≈ 35°C/W. At 800 mA buck load and 3.6 V input, junction temperature rise is ~28°C above ambient - well below the 125°C max operating limit, assuming TA ≤ 97°C.
ADP5023ACPZ-2-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
- Number of Outputs:
- 3
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 0.8V ~ 3.8V, 800mA
- Voltage/Current - Output 2:
- 0.8V ~ 3.8V, 800mA
- Voltage/Current - Output 3:
- 0.8V ~ 4.75V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-LFCSP-WQ (4x4)
ADP5023ACPZ-2-R7 FAQ
1.How can I place an order for ADP5023ACPZ-2-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5023ACPZ-2-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5023ACPZ-2-R7 reliable?
The price and inventory of ADP5023ACPZ-2-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5023ACPZ-2-R7 is usually 5 days.
3.What payment methods are accepted for ADP5023ACPZ-2-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5023ACPZ-2-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP5023ACPZ-2-R7?
ADP5023ACPZ-2-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5023ACPZ-2-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5023ACPZ-2-R7?
For technical support, including ADP5023ACPZ-2-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5023ACPZ-2-R7 requirements.
6.How does Aetrix verify that ADP5023ACPZ-2-R7 is sourced from the original manufacturer or authorized distributors?
All ADP5023ACPZ-2-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5023ACPZ-2-R7 meets industry standards.
7.What is the process for return or replacement of ADP5023ACPZ-2-R7?
All ADP5023ACPZ-2-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5023ACPZ-2-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5023ACPZ-2-R7 part is unused and in its original packaging.
Return procedure for ADP5023ACPZ-2-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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