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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - Linear + Switching

Analog Devices Inc. ADP5024ACPZ-2-R7

Name: ADP5024ACPZ-2-R7
Brand: Analog Devices Inc.
SKU: ADP5024ACPZ-2-R7
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADP5024ACPZ-2-R7

Manufacturer:: Analog Devices Inc.

Category:: Voltage Regulators - Linear + Switching

Package:: 24-WFQFN Exposed Pad, CSP

Datasheet:: ADP5024ACPZ-2-R7.pdf

Description:: IC REG TRPL BCK/LNR SYNC 24LFCSP

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Product details

Overview

ADP5024ACPZ-2-R7 from Analog Devices is a dual-buck + single-LDO power management IC integrating two 1200 mA, 3 MHz synchronous step-down regulators and one 300 mA low-noise LDO in a 24-lead 4 mm × 4 mm LFCSP package. It delivers ±1.8% output voltage accuracy, supports input ranges of 2.3 V–5.5 V (buck) and 1.7 V–5.5 V (LDO), and enables compact, high-efficiency power for multi-rail FPGA/ASIC systems.

For engineers reviewing the ADP5024ACPZ-2-R7 datasheet, ADP5024ACPZ-2-R7 pinout, ADP5024ACPZ-2-R7 application, or ADP5024ACPZ-2-R7 equivalent, key selection criteria include out-of-phase buck operation to reduce input ripple, MODE-selectable forced-PWM vs. automatic PWM/PSM mode, LDO PSRR >60 dB up to 10 kHz, and factory-programmable or externally adjustable output voltages.

Technical Context

The ADP5024ACPZ-2-R7 implements independent enable control per regulator (EN1/EN2/EN3), dedicated analog and power ground pins (AGND/PGND1/PGND2), and a shared MODE pin that configures both buck regulators simultaneously into either forced PWM (constant 3 MHz switching) or automatic PWM/PSM mode with load-dependent burst operation below 100 mA threshold.

Its functional block integrates separate error amplifiers and current-limit comparators for each buck stage, an LDO with active pull-down (600 Ω), and thermal shutdown at 150°C with 20°C hysteresis. The LDO maintains <140 mV dropout at 300 mA for VOUT3 = 3.3 V and achieves 100 µV_rms output noise (10 Hz–100 kHz) with >60 dB PSRR at 10 kHz.

Key Specifications

Parameter	Value and Actual Design Meaning
Buck Output Current	1200 mA per channel - supports core logic rails for FPGAs and processors without external current boosting.
LDO Output Current	300 mA - sufficient for analog subsystems, PLLs, or RF bias requiring low-noise, high-PSRR regulation.
Switching Frequency	2.5–3.5 MHz - enables use of sub-2.2 µH inductors and ≤10 µF ceramic output capacitors, minimizing board area.
Output Voltage Accuracy	±1.8% - ensures stable voltage margins for 1.8 V, 2.5 V, 3.3 V, and 5.2 V rails across temperature and line/load variation.
LDO PSRR @ 10 kHz	≥60 dB - suppresses switching noise from adjacent buck stages and upstream supply ripple for sensitive analog circuits.
Quiescent Current (All Enabled)	108–175 µA - extends battery life in portable instrumentation and medical devices during light-load standby.
Thermal Shutdown Threshold	150°C with 20°C hysteresis - provides robust overtemperature protection while avoiding nuisance cycling in thermally constrained layouts.

Pinout & Package

ADP5024ACPZ-2-R7 uses a 24-lead, 4 mm × 4 mm LFCSP package with exposed pad (EPAD) recommended for soldering to PCB ground plane for thermal and electrical performance. Pin 1 is top-left corner (viewed from die side); AGND appears on pins 1, 2, 18, 23, and 24; PGND1 and PGND2 are isolated for buck-stage return path separation.

Pin/Terminal	Circuit Role	Design Meaning
EN1, EN2, EN3	Independent enable inputs	Logic-high (>1.1 V) activates corresponding regulator; allows sequenced power-up and dynamic rail control.
MODE	Buck operating mode select	High = forced PWM (fixed 3 MHz); Low = automatic PWM/PSM (switches to burst mode below 100 mA load).
FB1, FB2, FB3	Voltage feedback inputs	Connect to resistor dividers for adjustable outputs; fixed-voltage variants leave FB1/FB2 unconnected, tie FB3 to VOUT3.
VIN1/VIN2/VIN3	Input supplies	VIN1/VIN2: 2.3–5.5 V for bucks; VIN3: 1.7–5.5 V for LDO - supports independent sourcing or common input with headroom flexibility.
VOUT1/VOUT2/VOUT3	Regulated outputs	VOUT1/VOUT2: buck outputs (0.8–3.8 V); VOUT3: LDO output (0.8–5.2 V) - all support external sensing for improved load regulation.
SW1/SW2	Switching node outputs	Drive external inductors; require low-ESR ceramic caps and careful layout to minimize EMI and ringing.
PGND1/PGND2/AGND	Ground terminals	Separate power grounds prevent coupling between buck stages; AGND ties analog circuitry and feedback paths to clean reference.

Key Features

Feature	Design Value
Out-of-phase buck operation	Reduces RMS input capacitor current by ~30%, allowing smaller input bulk capacitance and lower EMI.
Programmable output voltages	Factory-set or resistor-divider adjustable outputs eliminate need for multiple SKUs and simplify BOM management.
LDO with high PSRR & low noise	60+ dB PSRR up to 10 kHz and 100 µV_rms noise ensure clean power for RF, ADC, and clock circuitry.
Low dropout voltage	75 mV typical at 300 mA (VOUT3 = 3.3 V) - maximizes usable battery voltage range in portable applications.
Thermal and UVLO protection	150°C shutdown with hysteresis and dual-level VIN1 undervoltage lockout (3.9 V rise / 1.95 V fall) enhance system reliability.

Applications

Processor Power Delivery	FPGA Core & I/O Rails
Use Scenario: Supplying dual-voltage domains (e.g., 1.2 V core, 2.5 V I/O) for ARM-based SoCs in handheld test equipment. IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7 provides tightly regulated, sequenced, and low-noise power rails with independent enable control for safe processor boot and sleep transitions. Use Value: Eliminates need for discrete DC/DC + LDO combinations, reducing solution size by >40% and component count by 6+ parts.	Use Scenario: Powering Xilinx Artix-7 FPGA with 1.0 V core, 1.8 V auxiliary, and 2.5 V bank rails in space-constrained industrial controllers. IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7 delivers synchronized, out-of-phase buck outputs to minimize input ripple, while its LDO supplies clean 2.5 V for I/O banks sensitive to switching noise. Use Value: Achieves <1% output voltage deviation under 100 mA–1.2 A dynamic load steps, meeting FPGA VCCINT tolerance requirements.
Portable Medical Sensors	RF Transceiver Bias
Use Scenario: Powering ECG front-end ASIC (1.8 V), digital controller (3.3 V), and analog signal chain (2.8 V LDO) in battery-powered patient monitors. IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7 operates in automatic PWM/PSM mode to maintain >85% efficiency at 100 µA–300 mA loads, extending runtime between charges. Use Value: LDO's 100 µV_rms noise and >60 dB PSRR at 10 kHz preserve SNR in 24-bit delta-sigma ADC measurements.	Use Scenario: Generating 3.3 V for RF PA bias and 1.8 V for LO synthesizer in narrowband IoT transceivers operating from single-cell Li-ion. IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7's buck regulators run in forced PWM mode (via MODE = high) to avoid frequency modulation of RF carriers by PSM bursts. Use Value: Maintains <0.5% VOUT stability during 200 mA load transients, preventing LO pulling and spectral regrowth in transmit mode.

Processor Power Delivery

FPGA Core & I/O Rails

Use Scenario: Supplying dual-voltage domains (e.g., 1.2 V core, 2.5 V I/O) for ARM-based SoCs in handheld test equipment.

IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7 provides tightly regulated, sequenced, and low-noise power rails with independent enable control for safe processor boot and sleep transitions.

Use Value: Eliminates need for discrete DC/DC + LDO combinations, reducing solution size by >40% and component count by 6+ parts.

Use Scenario: Powering Xilinx Artix-7 FPGA with 1.0 V core, 1.8 V auxiliary, and 2.5 V bank rails in space-constrained industrial controllers.

IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7 delivers synchronized, out-of-phase buck outputs to minimize input ripple, while its LDO supplies clean 2.5 V for I/O banks sensitive to switching noise.

Use Value: Achieves <1% output voltage deviation under 100 mA–1.2 A dynamic load steps, meeting FPGA VCCINT tolerance requirements.

Portable Medical Sensors

RF Transceiver Bias

Use Scenario: Powering ECG front-end ASIC (1.8 V), digital controller (3.3 V), and analog signal chain (2.8 V LDO) in battery-powered patient monitors.

IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7 operates in automatic PWM/PSM mode to maintain >85% efficiency at 100 µA–300 mA loads, extending runtime between charges.

Use Value: LDO's 100 µV_rms noise and >60 dB PSRR at 10 kHz preserve SNR in 24-bit delta-sigma ADC measurements.

Use Scenario: Generating 3.3 V for RF PA bias and 1.8 V for LO synthesizer in narrowband IoT transceivers operating from single-cell Li-ion.

IC Role / Device Role / Timing Role: ADP5024ACPZ-2-R7's buck regulators run in forced PWM mode (via MODE = high) to avoid frequency modulation of RF carriers by PSM bursts.

Use Value: Maintains <0.5% VOUT stability during 200 mA load transients, preventing LO pulling and spectral regrowth in transmit mode.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail PMU applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADP5023ACPZ-R7	Same architecture but 800 mA buck current rating per channel; identical pinout and feature set.	Lower current capability limits use in high-power FPGA cores or processors drawing >800 mA per rail.	Select when total system load per buck rail remains ≤800 mA and cost optimization is prioritized over margin.
TPS65023RSBR	TI device with two 1.5 A bucks + one 300 mA LDO; 3 MHz switching; different pinout and enable sequencing logic.	Requires PCB redesign due to non-pin-compatible layout and distinct power-on reset behavior.	Choose only if TI ecosystem alignment, higher buck current, or integrated power-good signals are required.

Compared with ADP5024ACPZ-2-R7, ADP5023ACPZ-R7 offers identical functionality at reduced current capacity-ideal for cost-sensitive, lower-power designs-while TPS65023RSBR provides higher buck current but demands full layout rework and firmware adaptation for enable timing.

Availability

ADP5024ACPZ-2-R7 is available at Aetrix Electronics and suitable for FPGA power delivery, portable medical instrumentation, and RF transceiver biasing requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ADP5024ACPZ-2-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and healthcare markets with precision signal chain and power solutions.

The ADP5024ACPZ-2-R7 belongs to Analog Devices' microPMU product line, designed specifically for space-constrained, multi-rail embedded systems requiring high integration, low quiescent current, and robust transient response-especially in portable and battery-operated applications.

FAQ

What is the maximum supported input voltage for the buck regulators in ADP5024ACPZ-2-R7?

The ADP5024ACPZ-2-R7 buck regulators (BUCK1 and BUCK2) accept an input voltage range of 2.3 V to 5.5 V on VIN1 and VIN2. Exceeding 5.5 V violates absolute maximum ratings and may cause permanent damage. The LDO input (VIN3) supports up to 5.5 V independently, enabling flexible power tree design where buck and LDO rails originate from different sources.

Does ADP5024ACPZ-2-R7 support independent enable control for each regulator?

Yes, ADP5024ACPZ-2-R7 provides three dedicated enable pins: EN1 for BUCK1, EN2 for BUCK2, and EN3 for the LDO. Each pin requires a logic-high voltage ≥1.1 V to activate its respective regulator, allowing precise power sequencing, dynamic rail disabling, and fault isolation without affecting other outputs.

How does the MODE pin affect the operation of ADP5024ACPZ-2-R7?

The MODE pin configures both buck regulators simultaneously: logic-high forces continuous PWM operation at ~3 MHz regardless of load, while logic-low enables automatic PWM/PSM mode, where the regulator switches to burst mode below 100 mA load to improve light-load efficiency. The LDO operation is unaffected by the MODE pin.

What is the dropout voltage specification for the LDO in ADP5024ACPZ-2-R7?

The ADP5024ACPZ-2-R7 LDO exhibits a typical dropout voltage of 75 mV at 300 mA output current when VOUT3 = 3.3 V, and 140 mV maximum under same conditions. At VOUT3 = 1.8 V and 300 mA, dropout is 180 mV maximum - enabling efficient operation even with low-headroom battery inputs.

Can ADP5024ACPZ-2-R7 be used with fixed-output-voltage configurations?

Yes, ADP5024ACPZ-2-R7 is available in both adjustable and factory-programmed fixed-output versions. For fixed-output models, FB1 and FB2 are left unconnected, while FB3 is tied directly to VOUT3. The "-2" suffix in ADP5024ACPZ-2-R7 indicates a specific factory-set configuration - consult the Analog Devices ordering guide for exact VOUT1/VOUT2/VOUT3 values.

ADP5024ACPZ-2-R7 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 24-WFQFN Exposed Pad, CSP

Packaging:: Tape & Reel (TR)

Product Status:: Active

Topology:: Step-Down (Buck) Synchronous (2), Linear (LDO) (1)

Number of Outputs:: 3

Frequency - Switching:: 3MHz

Voltage/Current - Output 1:: 0.8V ~ 3.8V, 1.2A

Voltage/Current - Output 2:: 0.8V ~ 3.8V, 1.2A

Voltage/Current - Output 3:: 0.8V ~ 5.2V, 300mA

w/LED Driver:: No

w/Supervisor:: No

w/Sequencer:: No

Voltage - Supply:: 1.7V ~ 5.5V

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 24-LFCSP-WQ (4x4)

ADP5024ACPZ-2-R7 FAQ

1.How can I place an order for ADP5024ACPZ-2-R7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADP5024ACPZ-2-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADP5024ACPZ-2-R7 reliable?

The price and inventory of ADP5024ACPZ-2-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5024ACPZ-2-R7 is usually 5 days.

3.What payment methods are accepted for ADP5024ACPZ-2-R7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5024ACPZ-2-R7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADP5024ACPZ-2-R7?

ADP5024ACPZ-2-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADP5024ACPZ-2-R7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADP5024ACPZ-2-R7?

For technical support, including ADP5024ACPZ-2-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5024ACPZ-2-R7 requirements.

6.How does Aetrix verify that ADP5024ACPZ-2-R7 is sourced from the original manufacturer or authorized distributors?

All ADP5024ACPZ-2-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5024ACPZ-2-R7 meets industry standards.

7.What is the process for return or replacement of ADP5024ACPZ-2-R7?

All ADP5024ACPZ-2-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5024ACPZ-2-R7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADP5024ACPZ-2-R7 part is unused and in its original packaging.

Return procedure for ADP5024ACPZ-2-R7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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