Analog Devices Inc. ADP5033ACBZ-11-R7
- Part No.:
- ADP5033ACBZ-11-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WFBGA, WLCSP
- Datasheet:
-
ADP5033ACBZ-11-R7.pdf
- Description:
- DUAL 800MA BUCK REG W/2 300MA LD
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADP5033ACBZ-11-R7 from Analog Devices is a dual-buck, dual-LDO power management IC integrating two 800 mA synchronous step-down regulators and two 300 mA low-dropout linear regulators in a single 2 mm × 2 mm WLCSP package. It operates across input voltages of 2.3 V–5.5 V (buck) and 1.7 V–5.5 V (LDO), delivers ±1.8% output voltage accuracy, and supports 3 MHz switching with forced PWM or auto PWM/PSM modes - enabling compact, high-efficiency power for space-constrained portable electronics.
For engineers reviewing the ADP5033ACBZ-11-R7 datasheet, ADP5033ACBZ-11-R7 pinout, ADP5033ACBZ-11-R7 application, or ADP5033ACBZ-11-R7 equivalent, this device serves as a highly integrated solution for multi-rail processor, FPGA, and RF chipset power delivery where board area, light-load efficiency, and PSRR-critical analog supply stability are design priorities.
Technical Context
The ADP5033ACBZ-11-R7 implements two independent buck regulators operating out-of-phase to reduce input ripple and capacitor stress, each with programmable 0.8 V–3.8 V outputs and 3 MHz fixed-frequency operation. Its LDOs feature ultra-low dropout (e.g., 65 mV at 3.3 V/300 mA), >60 dB PSRR up to 10 kHz, and factory-programmable enable mapping via ENA/ENB pins.
Buck regulation uses internal PFET/NFET switches with RPFET = 145–295 mΩ and RNFET = 110–220 mΩ (depending on VIN), while LDO bias current ranges from 10 µA (no load) to 245 µA (300 mA load). Thermal shutdown activates at 150°C with 20°C hysteresis, and system standby current is 108–175 µA with all channels enabled and no switching.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 800 mA per channel - supports core logic rails for FPGAs and application processors without external current boosting. |
| LDO Output Current | 300 mA per channel - sufficient for analog subsystems, sensors, or RF biasing with low-noise, high-PSRR regulation. |
| Switching Frequency | 3 MHz nominal - enables use of tiny 1 µH inductors and 10 µF ceramic output capacitors, minimizing PCB footprint. |
| Output Voltage Accuracy | ±1.8% - ensures stable voltage margins for sensitive digital cores and precision analog circuits across temperature. |
| LDO Dropout Voltage | 65 mV at 3.3 V/300 mA - extends battery runtime in portable devices by minimizing headroom loss under full load. |
| PSRR (LDO1) | ≥60 dB at 10 kHz - suppresses switching noise from buck stages or noisy system supplies feeding analog rails. |
| Package | 16-ball WLCSP, 2 mm × 2 mm, 0.5 mm pitch - optimized for ultra-dense mobile and wearable PCB layouts. |
Pinout & Package
Tiny 16-ball, 2 mm × 2 mm WLCSP (CB-16-8) with 0.5 mm ball pitch; bottom-side ball layout requires microvia or solder-mask-defined pad design per JEDEC J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VOUT3 | LDO1 output and feedback sense | Provides regulated analog rail; connects directly to load and feedback resistor divider for precise voltage setting. |
| VIN3 | LDO1 input supply | Accepts 1.7 V–5.5 V input; must be ≥ VOUT3 + 0.5 V for proper dropout operation. |
| VIN4 | LDO2 input supply | Independent input for second LDO; supports different source domains (e.g., separate battery or buck output). |
| VOUT4 | LDO2 output and feedback sense | Digital LDO output; factory-programmed voltage; used for I/O or memory interface rails requiring low noise. |
| AGND | Analog ground reference | Separate ground return for LDO feedback and internal error amplifiers - must be isolated from PGND for PSRR integrity. |
| MODE | Buck operating mode control | High = forced PWM (constant frequency); low = auto PWM/PSM (improves light-load efficiency). |
| ENA / ENB | Regulator enable inputs | Active-high; factory-programmed to control specific buck/LDO channels - enables flexible power sequencing. |
| VIN1 / VIN2 | Buck1/Buck2 input supplies | 2.3 V–5.5 V inputs; must be tied together per datasheet; UVLO threshold at 2.275 V (rising). |
| VOUT1 / VOUT2 | Buck1/Buck2 output sense | Feedback nodes for adjustable outputs; support 0.8 V–3.8 V range via external resistor dividers. |
| SW1 / SW2 | Buck switching nodes | Connect to external inductor; require low-ESR ceramic caps and careful layout to minimize EMI and ringing. |
| PGND1 / PGND2 | Dedicated power grounds | Separate ground returns for each buck stage - reduces cross-talk and improves thermal dissipation. |
Key Features
| Feature | Design Value |
|---|---|
| Out-of-phase buck operation | Reduces RMS input capacitor current by ~30%, allowing smaller input bulk capacitance and lower EMI. |
| Factory-programmable VOUT | Eliminates external feedback resistors for standard voltages (e.g., 1.8 V, 3.3 V), reducing BOM count and layout area. |
| Ultra-low LDO quiescent current | 10 µA per LDO at zero load - critical for battery-powered devices in deep sleep or standby states. |
| High PSRR at 1 MHz | 63 dB (LDO1), 64 dB (LDO2) - maintains clean analog supply even when sharing noisy system rails. |
| Thermal shutdown with hysteresis | 150°C trip with 20°C hysteresis - prevents thermal runaway during sustained overload or poor PCB heatsinking. |
Applications
| Mobile Baseband Processor Power | FPGA Core & I/O Rail Management |
|---|---|
|
Use Scenario: Powering ARM-based application processors in smartphones and tablets with multiple voltage domains (core, memory, I/O). IC Role / Device Role / Timing Role: ADP5033ACBZ-11-R7 delivers tightly regulated 0.8 V/1.2 V core rails via buck converters and clean 1.8 V/3.3 V I/O rails via LDOs. Use Value: Integrated dual-buck/dual-LDO eliminates four discrete regulators, saving >25 mm² PCB area and simplifying power sequencing. |
Use Scenario: Supplying configurable logic and transceivers in compact FPGA-based edge AI accelerators. IC Role / Device Role / Timing Role: ADP5033ACBZ-11-R7 provides independent 1.0 V core, 1.2 V auxiliary, 2.5 V analog, and 3.3 V I/O rails with fast transient response. Use Value: Out-of-phase buck operation minimizes input ripple, while LDO PSRR >60 dB ensures jitter-free clock generation and ADC reference stability. |
| Portable Medical Sensor Hub | RF Front-End Biasing for IoT Modules |
|
Use Scenario: Powering ECG, SpO₂, and inertial sensor subsystems in wearable health monitors. IC Role / Device Role / Timing Role: ADP5033ACBZ-11-R7 supplies ultra-low-noise 1.8 V analog rail (LDO1) and efficient 3.3 V digital rail (buck) from single-cell Li-ion. Use Value: 65 mV dropout and 10 µA LDO quiescent current extend battery life beyond 7 days in continuous monitoring mode. |
Use Scenario: Providing clean, sequenced bias for LTE/Wi-Fi RF transceivers and PA drivers in compact cellular IoT modules. IC Role / Device Role / Timing Role: ADP5033ACBZ-11-R7 delivers 1.2 V LDO rail for RF synthesizers and 3.3 V buck rail for digital baseband, with ENA/ENB-controlled startup timing. Use Value: Factory-programmed enable mapping ensures correct power-up order without external logic, reducing component count and firmware complexity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP5037ACPZ-1-R7 | LFCSP-24 package (4 mm × 4 mm); same 2×800 mA buck + 2×300 mA LDO architecture but larger footprint and higher θJA (42°C/W vs. 57°C/W). | Better thermal performance under sustained 800 mA loads; suitable for industrial ambient (>60°C) where WLCSP thermal limits may be exceeded. | Select ADP5037ACPZ-1-R7 if board space allows and junction temperature margin is critical above 85°C ambient. |
| TPS65023RSBR | Texas Instruments part: 3 buck + 2 LDO, 1.5 A/1 A/1 A buck currents; QFN-48 package; no factory-programmable VOUT; requires external feedback resistors. | Higher current capability and third buck channel; lacks ADP5033ACBZ-11-R7's 3 MHz switching and ultra-small WLCSP form factor. | Choose TPS65023RSBR only when >800 mA per buck is required or when needing three independent switching rails. |
Compared with ADP5033ACBZ-11-R7, ADP5037ACPZ-1-R7 trades miniaturization for thermal headroom, while TPS65023RSBR expands channel count and current at the expense of size, efficiency at light load, and design simplicity - making ADP5033ACBZ-11-R7 optimal for ultra-compact, battery-sensitive applications.
Availability
ADP5033ACBZ-11-R7 is available at Aetrix Electronics and suitable for portable instrumentation, medical wearables, and space-constrained wireless modules requiring stable component supply, long-term lifecycle support, and guaranteed WLCSP packaging consistency.
Supply support for ADP5033ACBZ-11-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with deep expertise in precision power management and signal conditioning.
The ADP5033ACBZ-11-R7 belongs to Analog Devices' µPMU (micropower management unit) product line, designed specifically for ultra-compact, multi-rail power delivery in battery-powered portable electronics where size, efficiency, and noise immunity are critical.
FAQ
What is the factory-programmed output voltage configuration for ADP5033ACBZ-11-R7?
The ADP5033ACBZ-11-R7 has factory-programmed output voltages: VOUT1 = 1.2 V, VOUT2 = 1.8 V, VOUT3 = 2.8 V (LDO1, analog), and VOUT4 = 3.3 V (LDO2, digital). These values are laser-trimmed during wafer test and cannot be altered in-circuit; external feedback resistors are not required unless custom voltages are needed.
Can ADP5033ACBZ-11-R7 operate with a single 3.6 V Li-ion battery input?
Yes - ADP5033ACBZ-11-R7 supports VIN1/VIN2 from 2.3 V to 5.5 V and VIN3/VIN4 from 1.7 V to 5.5 V, fully covering the 4.2 V (fully charged) to 2.8 V (discharged) range of a single Li-ion cell. Its 65 mV dropout at 300 mA ensures usable LDO output down to ~2.85 V input for 2.8 V rails.
How does the MODE pin affect efficiency across load conditions for ADP5033ACBZ-11-R7?
When MODE = low, ADP5033ACBZ-11-R7 enters power-save mode (PSM) below ~100 mA load, reducing quiescent current and improving light-load efficiency (e.g., >85% at 1 mA). When MODE = high, it remains in forced PWM mode at 3 MHz regardless of load - prioritizing ripple suppression and transient response over efficiency below 100 mA.
Is AGND connection mandatory for ADP5033ACBZ-11-R7, and how should it be routed?
Yes - AGND is a dedicated analog ground pin for LDO feedback and internal error amplifiers. It must be connected to a clean, low-impedance analog ground plane, physically separated from PGND1/PGND2, and tied to system ground at a single point near the IC to prevent noise coupling into LDO regulation loops.
What is the maximum allowable junction temperature for continuous operation of ADP5033ACBZ-11-R7?
The ADP5033ACBZ-11-R7 specifies an operating junction temperature range of −40°C to +125°C. Thermal shutdown activates at +150°C (with 20°C hysteresis), but sustained operation above +125°C risks reliability degradation. With θJA = 57°C/W, maintaining TJ ≤ 125°C requires PD ≤ 1.23 W under typical board conditions.
ADP5033ACBZ-11-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- Adjustable, 1.2V, 800mA
- Voltage/Current - Output 2:
- Adjustable, 3.3V, 800mA
- Voltage/Current - Output 3:
- Adjustable, 1.8V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WLCSP (2x2)
ADP5033ACBZ-11-R7 FAQ
1.How can I place an order for ADP5033ACBZ-11-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5033ACBZ-11-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5033ACBZ-11-R7 reliable?
The price and inventory of ADP5033ACBZ-11-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5033ACBZ-11-R7 is usually 5 days.
3.What payment methods are accepted for ADP5033ACBZ-11-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5033ACBZ-11-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP5033ACBZ-11-R7?
ADP5033ACBZ-11-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5033ACBZ-11-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5033ACBZ-11-R7?
For technical support, including ADP5033ACBZ-11-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5033ACBZ-11-R7 requirements.
6.How does Aetrix verify that ADP5033ACBZ-11-R7 is sourced from the original manufacturer or authorized distributors?
All ADP5033ACBZ-11-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5033ACBZ-11-R7 meets industry standards.
7.What is the process for return or replacement of ADP5033ACBZ-11-R7?
All ADP5033ACBZ-11-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5033ACBZ-11-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5033ACBZ-11-R7 part is unused and in its original packaging.
Return procedure for ADP5033ACBZ-11-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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