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Analog Devices Inc. ADP5033ACBZ-3-R7
- Part No.:
- ADP5033ACBZ-3-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-WFBGA, WLCSP
- Datasheet:
-
ADP5033ACBZ-3-R7.pdf
- Description:
- IC REG QUAD BCK/LNR SYNC 16WLCSP
- Quantity:
- Payment:
- Shipping:
Inventory:3,435
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Product details
Overview
ADP5033ACBZ-3-R7 from Analog Devices is a dual-buck + dual-LDO power management IC integrating two 800 mA, 3 MHz synchronous step-down regulators and two 300 mA low-noise LDOs in a 2 mm × 2 mm, 16-ball WLCSP package. It delivers ±1.8% output voltage accuracy, supports factory-programmed VOUT settings, and operates across input ranges of 2.3–5.5 V (buck) and 1.7–5.5 V (LDO), enabling compact, high-efficiency power for space-constrained portable electronics.
For engineers reviewing the ADP5033ACBZ-3-R7 datasheet, ADP5033ACBZ-3-R7 pinout, ADP5033ACBZ-3-R7 application, or ADP5033ACBZ-3-R7 equivalent, key selection considerations include out-of-phase buck operation for reduced input ripple, auto PWM/PSM mode switching at 100 mA load threshold, high PSRR (>60 dB @ 10 kHz), and dedicated enable pins (ENA/ENB) with factory-assigned channel mapping.
Technical Context
The ADP5033ACBZ-3-R7 implements two independent buck regulators with integrated PFET/NFET switches (RPFET = 145–295 mΩ, RNFET = 110–220 mΩ), 2.5–3.5 MHz switching frequency, and forced PWM or auto PWM/PSM mode controlled by the MODE pin. Buck1 and Buck2 operate 180° out of phase to minimize input capacitor RMS current and system noise.
Its dual LDOs feature ultra-low dropout (50 mV @ 5.2 V/300 mA), bias current as low as 10 µA at zero load, and PSRR >60 dB up to 1 MHz. Each LDO has separate input supplies (VIN3/VIN4) and sensing outputs (VOUT3/VOUT4), with active pull-down resistance of 600 Ω when disabled.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 800 mA per channel - supports core logic rails for FPGAs and processors without external current boosting. |
| LDO Output Current | 300 mA per channel - sufficient for analog subsystems, RF biasing, or sensor interfaces with low noise requirements. |
| Switching Frequency | 3 MHz nominal - enables use of tiny 1 µH inductors and 10 µF ceramic output capacitors, minimizing PCB area. |
| Output Voltage Accuracy | ±1.8% - ensures stable supply margins for sensitive digital and analog circuits across temperature and load. |
| PSRR (LDO) | 60 dB @ 10 kHz - suppresses switching noise from upstream buck stages or noisy system rails feeding LDO inputs. |
| Thermal Shutdown | 150°C with 20°C hysteresis - protects against sustained overload or poor thermal design in sealed enclosures. |
| Quiescent Current | 108–175 µA (all enabled, no switching) - extends battery runtime in always-on portable instrumentation. |
Pinout & Package
ADP5033ACBZ-3-R7 uses a 16-ball, 0.5 mm pitch Wafer-Level Chip Scale Package (WLCSP), 2 mm × 2 mm footprint, with ball pitch compatible with standard fine-pitch SMT assembly processes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VOUT1 | BUCK1 feedback and output sensing node | Connects directly to BUCK1 output capacitor; internal resistor divider sets regulated voltage unless externally adjusted. |
| VOUT2 | BUCK2 feedback and output sensing node | Independent feedback path enables precise regulation of second buck rail without shared sensing errors. |
| VOUT3 | LDO1 output and sensing node | Provides regulated analog rail; senses output voltage for closed-loop control and enables remote sensing if routed separately. |
| VOUT4 | LDO2 output and sensing node | Supports independent digital or RF rail; decoupled from VOUT3 to prevent crosstalk between analog/digital domains. |
| ENA / ENB | Active-high enable inputs with factory-defined channel mapping | ENA controls one predefined subset (e.g., BUCK1 + LDO1); ENB controls the other (e.g., BUCK2 + LDO2); no user reconfiguration. |
| MODE | Buck operating mode select (PWM vs. PWM/PSM) | High = forced PWM (constant frequency, best noise control); Low = automatic transition to PSM below 100 mA for light-load efficiency. |
| VIN1 / VIN2 | Main buck input supplies (tied together) | Shared 2.3–5.5 V input; UVLO threshold at 2.275 V rising ensures clean startup under weak battery conditions. |
| VIN3 / VIN4 | Independent LDO input supplies | Accept 1.7–5.5 V; allow LDOs to be powered from lower-voltage intermediate rails, improving overall system efficiency. |
| SW1 / SW2 | Buck switching nodes | Require low-ESR ceramic capacitors and tight layout to minimize EMI; out-of-phase operation reduces input ripple current by ~30%. |
| PGND1 / PGND2 | Dedicated power ground returns | Separate grounds isolate high-current buck return paths from analog ground (AGND), reducing noise coupling into LDO sections. |
| AGND | Analog reference ground | Must be connected to clean system ground plane; serves as reference for all feedback loops and internal error amplifiers. |
Key Features
| Feature | Design Value |
|---|---|
| Out-of-phase buck operation | Reduces peak input capacitor ripple current by ~30%, allowing smaller input capacitance (4.7 µF minimum) and lower EMI. |
| Factory-programmable VOUT | Eliminates external resistor networks for standard output voltages (e.g., 3.3 V, 1.8 V, 1.2 V), simplifying BOM and layout. |
| Auto PWM/PSM mode | Seamlessly transitions between high-efficiency PSM at light loads (<100 mA) and low-noise PWM at full load, optimizing battery life and signal integrity. |
| High PSRR LDOs | Maintains >60 dB rejection up to 1 MHz, enabling clean analog/RF supplies even when fed from noisy buck outputs or shared system rails. |
| Ultra-low dropout voltage | 50 mV @ 5.2 V/300 mA allows LDOs to regulate from tightly constrained headroom rails, maximizing usable battery voltage range. |
Applications
| Mobile FPGA Power | Portable Medical Sensor Hub |
|---|---|
Use Scenario: Compact handheld ultrasound or ECG device requiring multiple isolated, low-noise rails for FPGA I/O banks, ADC front-end, and wireless transceiver. IC Role / Device Role / Timing Role: ADP5033ACBZ-3-R7 provides four independent, sequenced power rails: two buck outputs for FPGA core/I/O, two LDOs for analog signal chain and BLE radio. Use Value: 2 mm × 2 mm WLCSP footprint saves >40% board area versus discrete solutions; 60 dB PSRR prevents switching noise from corrupting µV-level biomedical signals. |
Use Scenario: Battery-powered wearable vital sign monitor with multi-channel biosensors, low-power MCU, and Bluetooth LE connectivity. IC Role / Device Role / Timing Role: ADP5033ACBZ-3-R7 powers MCU core (BUCK1), memory interface (BUCK2), analog sensor bias (LDO1), and RF section (LDO2) with independent enable control. Use Value: 108 µA quiescent current in standby extends battery life beyond 7 days; auto PWM/PSM mode maintains >85% efficiency from 10 µA to 800 mA load range. |
| Space-Constrained IoT Node | ASIC Core + I/O Supply |
Use Scenario: Sub-GHz LPWAN sensor node deployed in sealed industrial enclosures where thermal dissipation and size are critical. IC Role / Device Role / Timing Role: ADP5033ACBZ-3-R7 delivers regulated 3.3 V (BUCK1), 1.8 V (BUCK2), 2.8 V (LDO1), and 1.2 V (LDO2) from single Li-ion input. Use Value: 150°C thermal shutdown with 20°C hysteresis prevents latch-up during ambient temperature excursions; 57°C/W θJA enables passive cooling only. |
Use Scenario: Edge AI inference module using low-power ASIC with split-core (1.0 V) and I/O (1.8 V) voltage domains, plus analog PHY (2.5 V) and RF (3.3 V). IC Role / Device Role / Timing Role: ADP5033ACBZ-3-R7 supplies ASIC core (BUCK1), I/O (BUCK2), PHY analog (LDO1), and RF PA bias (LDO2) with independent sequencing via ENA/ENB. Use Value: Factory-programmed VOUT eliminates trimming resistors; ±1.8% accuracy ensures reliable ASIC operation across −40°C to +125°C junction temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck + dual-LDO power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP5037ACPZ-3-R7 | LFCSP-24 package (4 mm × 4 mm), higher thermal resistance (θJA = 45°C/W), same electrical specs and pinout mapping. | Better thermal performance for high-ambient or high-duty-cycle applications; requires larger PCB area and different land pattern. | Select ADP5037ACPZ-3-R7 when thermal margin is constrained and board space permits larger package. |
| ADP5133ACBZ-3-R7 | Omits LDOs entirely; retains dual 800 mA bucks + dual EN pins in same 2 mm × 2 mm WLCSP. | Targeted at systems needing only switching regulation (e.g., digital-only SoC), with external LDOs added only where required. | Choose ADP5133ACBZ-3-R7 to reduce cost and complexity when LDO functionality is unnecessary or provided elsewhere. |
Compared with ADP5033ACBZ-3-R7, ADP5037ACPZ-3-R7 offers superior thermal handling in thermally demanding environments but sacrifices miniaturization, while ADP5133ACBZ-3-R7 reduces solution size and cost by removing integrated LDOs-making it suitable only when external linear regulation is acceptable or already present.
Availability
ADP5033ACBZ-3-R7 is available at Aetrix Electronics and suitable for mobile FPGA power, portable medical sensor hubs, and space-constrained IoT nodes requiring stable component supply, guaranteed long-term availability, and traceable sourcing for production ramp.
Supply support for ADP5033ACBZ-3-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The ADP5033 belongs to Analog Devices' µPMU (micropower management unit) product line, designed specifically for ultra-compact, multi-rail power delivery in battery-operated portable and wearable electronics where board space and efficiency are critical.
FAQ
What is the maximum supported input voltage for the buck regulators in ADP5033ACBZ-3-R7?
The buck regulators in ADP5033ACBZ-3-R7 accept an input voltage range of 2.3 V to 5.5 V on VIN1 and VIN2. Absolute maximum rating is 6 V, but operation above 5.5 V violates specification limits and may cause permanent damage. The UVLO threshold is set at 2.275 V (rising), ensuring reliable startup under marginal battery conditions.
Does ADP5033ACBZ-3-R7 support independent enable control for each regulator channel?
ADP5033ACBZ-3-R7 provides two enable pins - ENA and ENB - but channel assignment is factory-programmed and not user-configurable. ENA activates a predefined subset (e.g., BUCK1 and LDO1), while ENB activates the complementary subset (e.g., BUCK2 and LDO2). There is no provision for per-channel enable or dynamic reassignment.
Can ADP5033ACBZ-3-R7 operate with only the LDOs enabled while the bucks are disabled?
Yes. ADP5033ACBZ-3-R7 allows independent operation: LDO1 and LDO2 can be enabled via ENA/ENB while BUCK1 and BUCK2 remain disabled. In this state, total system input current drops to 53 µA (LDO1 only) or 74 µA (LDO1 + LDO2), making it ideal for ultra-low-power standby modes in portable devices.
What is the significance of the "-3" suffix in ADP5033ACBZ-3-R7?
The "-3" suffix in ADP5033ACBZ-3-R7 denotes the factory-programmed output voltage configuration. For this variant, BUCK1 is set to 3.3 V, BUCK2 to 1.8 V, LDO1 to 1.2 V, and LDO2 to 3.3 V - matching common processor core/I/O and analog/radio rail requirements without external feedback resistors.
How does the MODE pin affect efficiency and noise performance in ADP5033ACBZ-3-R7?
When MODE is high, ADP5033ACBZ-3-R7 forces both bucks into constant-frequency PWM mode (3 MHz), delivering lowest output voltage ripple and predictable EMI spectrum - optimal for noise-sensitive analog circuits. When MODE is low, it automatically enters PSM below 100 mA load, improving light-load efficiency by >20% but increasing output ripple and spectral spreading.
ADP5033ACBZ-3-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 3V, 800mA
- Voltage/Current - Output 2:
- 1.2V, 800mA
- Voltage/Current - Output 3:
- 1.8V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WLCSP (2x2)
ADP5033ACBZ-3-R7 FAQ
1.How can I place an order for ADP5033ACBZ-3-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5033ACBZ-3-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5033ACBZ-3-R7 reliable?
The price and inventory of ADP5033ACBZ-3-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5033ACBZ-3-R7 is usually 5 days.
3.What payment methods are accepted for ADP5033ACBZ-3-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5033ACBZ-3-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP5033ACBZ-3-R7?
ADP5033ACBZ-3-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5033ACBZ-3-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5033ACBZ-3-R7?
For technical support, including ADP5033ACBZ-3-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5033ACBZ-3-R7 requirements.
6.How does Aetrix verify that ADP5033ACBZ-3-R7 is sourced from the original manufacturer or authorized distributors?
All ADP5033ACBZ-3-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5033ACBZ-3-R7 meets industry standards.
7.What is the process for return or replacement of ADP5033ACBZ-3-R7?
All ADP5033ACBZ-3-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5033ACBZ-3-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5033ACBZ-3-R7 part is unused and in its original packaging.
Return procedure for ADP5033ACBZ-3-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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