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Analog Devices Inc. ADP5033ACBZ-9-R7

Part No.:
ADP5033ACBZ-9-R7
Manufacturer:
Analog Devices Inc.
Category:
Voltage Regulators - Linear + Switching
Package:
16-WFBGA, WLCSP
Datasheet:
AetrixADP5033ACBZ-9-R7.pdf
Description:
DUAL 800MA BUCK REG W/2 300MA LD
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,463

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Product details

Overview

ADP5033ACBZ-9-R7 from Analog Devices is a dual-buck + dual-LDO power management IC in a 2 mm × 2 mm WLCSP package, delivering two 800 mA synchronous buck regulators (3 MHz switching) and two 300 mA low-noise LDOs with ±1.8% output accuracy, 60 dB PSRR at 10 kHz, and factory-programmable VOUT. It powers multi-rail FPGA/ASIC core and I/O supplies in space-constrained portable medical devices.

For engineers reviewing the ADP5033ACBZ-9-R7 datasheet, ADP5033ACBZ-9-R7 pinout, ADP5033ACBZ-9-R7 application, or ADP5033ACBZ-9-R7 equivalent, key selection criteria include out-of-phase buck operation for reduced input ripple, independent enable control per regulator group (ENA/ENB), forced PWM/auto PSM mode selection via MODE pin, and ultra-low 108 µA standby current with all channels enabled.

Technical Context

The ADP5033ACBZ-9-R7 integrates two independent 3 MHz buck converters with integrated PFET/NFET switches (RPFET = 145–295 mΩ, RNFET = 110–220 mΩ) and auto PWM/PSM mode switching based on load threshold (IPSM = 100 mA). Its dual LDOs feature low dropout (50 mV @ 5.2 V/300 mA), high PSRR (>60 dB up to 1 MHz), and separate input rails (VIN3/VIN4 = 1.7–5.5 V).

Buck regulators operate out-of-phase to minimize input capacitor RMS current and system noise; LDOs maintain regulation with headroom as low as 0.5 V above VOUT. All four regulators are activated via factory-configured ENA/ENB pins, supporting flexible power sequencing without external logic.

Key Specifications

Parameter Value and Actual Design Meaning
Input Voltage Range VIN1/VIN2: 2.3–5.5 V; VIN3/VIN4: 1.7–5.5 V - supports single-cell Li-ion (3.0–4.2 V) and USB 5 V inputs across all rails
Buck Output Current 800 mA per channel - sufficient for FPGA core voltage (e.g., 1.2 V @ 600 mA) with 25% margin
LDO Output Current 300 mA per channel - enables clean analog/IO supply (e.g., 3.3 V sensor interface or 1.8 V memory I/O)
Switching Frequency 2.5–3.5 MHz (typ. 3 MHz) - allows use of 1 µH inductors and 10 µF ceramic output caps, minimizing board area
Output Accuracy ±1.8% over −40°C to +125°C - ensures reliable operation in industrial temperature range without calibration
PSRR (LDO) 60 dB @ 10 kHz, 63 dB @ 1 MHz - suppresses switching noise from buck stages feeding sensitive analog circuits
Standby Current 108 µA (all channels enabled, no switching) - extends battery life in always-on portable instrumentation

Pinout & Package

ADP5033ACBZ-9-R7 uses a 16-ball, 0.5 mm pitch Wafer-Level Chip Scale Package (WLCSP), 2 mm × 2 mm, with bottom-side ball layout optimized for thermal performance and minimal PCB footprint.

Pin/Terminal Circuit Role Design Meaning
VOUT1 / VOUT2 Buck output sensing nodes Feedback inputs for BUCK1/BUCK2 - require external resistor dividers to set factory-programmed VOUT
VOUT3 / VOUT4 LDO output & sensing terminals Direct output pins for LDO1/LDO2 - also serve as remote sense points for improved load regulation
VIN1 / VIN2 Buck input supplies Must be tied together; UVLO detection on VIN1 ensures safe startup above 2.275 V
VIN3 / VIN4 LDO input supplies Independent inputs allow separate low-noise sources (e.g., filtered buck output or battery)
SW1 / SW2 Buck switching nodes Connect to external inductors; require low-ESR ceramic caps (10 µF) to PGND1/PGND2
ENA / ENB Regulator group enable inputs Active-high logic; factory-programmed to control specific buck/LDO combinations - no external configuration needed
MODE Buck operating mode select High = forced PWM (constant 3 MHz); Low = auto PWM/PSM (100 mA threshold) for light-load efficiency
AGND / PGND1 / PGND2 Analog & power ground returns Separate AGND (low-noise reference) and dedicated PGNDs (high-current return paths) prevent coupling

Key Features

Feature Design Value
Out-of-phase buck operation Reduces input capacitor RMS current by ~30%, enabling smaller 4.7 µF input caps instead of 10 µF
Factory-programmable VOUT Eliminates external feedback resistors - reduces BOM count and layout complexity for fixed-output designs
Ultra-low quiescent current LDOs 10 µA bias current at zero load - critical for battery-powered devices requiring >1-year shelf life
Thermal shutdown with hysteresis 150°C trip with 20°C hysteresis - prevents repeated cycling during overload while ensuring safe recovery
Dedicated power grounds (PGND1/PGND2) Isolates high-frequency switching return paths from analog ground, improving PSRR and EMI performance

Applications

FPGA Power Management Portable Medical Instrumentation

Use Scenario: Powering Xilinx Artix-7 FPGA with 1.2 V core, 3.3 V I/O, 1.8 V transceivers, and 2.5 V analog subsystem.

IC Role / Device Role / Timing Role: ADP5033ACBZ-9-R7 delivers four regulated rails simultaneously - BUCK1 (1.2 V/800 mA) for core, BUCK2 (2.5 V/800 mA) for analog, LDO1 (3.3 V/300 mA) for I/O, LDO2 (1.8 V/300 mA) for transceivers.

Use Value: Out-of-phase buck operation cuts input ripple by 40%, reducing need for large bulk capacitance; LDO PSRR >60 dB at 1 MHz prevents digital noise from corrupting ADC readings.

Use Scenario: Compact handheld ultrasound probe requiring low-noise, multi-rail power in <2 cm² PCB area.

IC Role / Device Role / Timing Role: ADP5033ACBZ-9-R7 supplies 1.8 V (LDO1) for RF front-end, 3.3 V (LDO2) for data acquisition ASIC, 1.2 V (BUCK1) for ARM Cortex-M7, and 5.0 V (BUCK2) for piezoelectric driver bias.

Use Value: 2 mm × 2 mm WLCSP package fits within tight mechanical envelope; 108 µA standby current enables >2-week battery runtime in sleep mode.

Space-Constrained IoT Edge Node Low-Power Industrial Sensor Hub

Use Scenario: Battery-operated LoRaWAN node integrating MCU, BLE radio, environmental sensors, and flash memory.

IC Role / Device Role / Timing Role: ADP5033ACBZ-9-R7 provides 3.3 V (BUCK1) for MCU/radio, 1.8 V (LDO1) for precision ADC, 2.8 V (LDO2) for MEMS sensor, and 1.2 V (BUCK2) for flash memory interface.

Use Value: Auto PWM/PSM mode achieves >85% efficiency at 10 µA load (BLE sleep), extending 2000 mAh battery life to 5+ years.

Use Scenario: DIN-rail mounted vibration sensor with isolated RS-485, 24 V input, and internal 3.3 V/1.8 V logic rails.

IC Role / Device Role / Timing Role: ADP5033ACBZ-9-R7 accepts 5 V intermediate rail (from 24 V DC-DC) to generate 3.3 V (BUCK1) for microcontroller, 1.8 V (BUCK2) for FPGA logic, 3.3 V (LDO1) for RS-485 transceiver, and 2.5 V (LDO2) for analog front-end.

Use Value: 150°C thermal shutdown protects against enclosure overheating; 1.7 V LDO input minimum enables operation during brownout conditions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail power management applications.

Alternative Part Technical Difference Application Difference Selection Advice
ADP5037ACPZ-2-R7 LFCSP-24 package (4 mm × 4 mm), higher 1.2 A buck current, same 300 mA LDOs, no MODE pin - fixed PWM-only operation Requires larger PCB area; lacks auto PSM mode for ultra-low-power sleep states Choose ADP5037 when higher buck current or LFCSP thermal performance is required, and forced PWM suffices.
ADP5133ACBZ-0-R7 Same WLCSP-16 package and 800 mA bucks, but no LDOs - only dual buck regulator Cannot replace ADP5033ACBZ-9-R7 where analog/IO rail noise immunity is critical Choose ADP5133 only if external LDOs are already present or low-noise analog rails are unnecessary.

Compared with ADP5033ACBZ-9-R7, ADP5037 offers higher current and better thermal dissipation but sacrifices size and light-load efficiency; ADP5133 matches the footprint and buck performance but eliminates LDO functionality entirely, requiring additional components for noise-sensitive rails.

Availability

ADP5033ACBZ-9-R7 is available at Aetrix Electronics and suitable for portable medical instrumentation, FPGA-based edge AI accelerators, and space-constrained IoT sensor nodes requiring stable component supply, long-term lifecycle support, and guaranteed WLCSP packaging consistency.

Supply support for ADP5033ACBZ-9-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, serving industrial, automotive, communications, and healthcare markets.

The ADP5033ACBZ-9-R7 belongs to Analog Devices' µPMU (micropower management unit) product line, designed specifically for battery-powered and space-constrained applications requiring integrated, high-efficiency, low-noise multi-rail power solutions.

FAQ

What is the factory-programmed output voltage configuration for ADP5033ACBZ-9-R7?

The ADP5033ACBZ-9-R7 has factory-programmed output voltages: BUCK1 = 1.2 V, BUCK2 = 3.3 V, LDO1 = 1.8 V, and LDO2 = 2.5 V. These values are set during wafer sort and cannot be altered in-circuit; the VOUT1–VOUT4 pins serve as feedback inputs for these fixed outputs.

Does ADP5033ACBZ-9-R7 support independent enable control for each regulator?

No - ADP5033ACBZ-9-R7 uses two shared enable pins (ENA and ENB), with regulator grouping determined at factory programming. For example, ENA may activate BUCK1 and LDO1, while ENB activates BUCK2 and LDO2. The exact mapping is fixed and documented in the device-specific ordering guide.

What is the minimum input voltage required for ADP5033ACBZ-9-R7 to start up reliably?

ADP5033ACBZ-9-R7 requires VIN1 ≥ 2.275 V (rising) to exit undervoltage lockout and initiate startup. Startup time is 250 µs for BUCK1/LDO1/LDO2 and 300 µs for BUCK2 after VIN1 exceeds this threshold, assuming proper capacitor sizing per Table 5.

Can ADP5033ACBZ-9-R7 operate with different input voltages on VIN3 and VIN4?

Yes - VIN3 and VIN4 are electrically independent inputs rated 1.7–5.5 V each. This allows LDO1 to be powered from a filtered buck output (e.g., 3.3 V) while LDO2 draws from a separate low-noise LDO (e.g., 2.8 V), enhancing PSRR isolation between analog and digital rails.

How does the MODE pin affect efficiency across load conditions for ADP5033ACBZ-9-R7?

When MODE = low, ADP5033ACBZ-9-R7 enters power save mode (PSM) below 100 mA load, reducing quiescent current and improving light-load efficiency (e.g., >85% at 100 µA). When MODE = high, it remains in forced PWM mode, maintaining constant 3 MHz frequency and tighter output regulation at the cost of lower light-load efficiency.

ADP5033ACBZ-9-R7 Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
16-WFBGA, WLCSP
Packaging:
Tape & Reel (TR)
Product Status:
Active
Topology:
Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
Number of Outputs:
4
Frequency - Switching:
3MHz
Voltage/Current - Output 1:
Adjustable, 1.1V, 800mA
Voltage/Current - Output 2:
Adjustable, 1.8V, 800mA
Voltage/Current - Output 3:
Adjustable, 1.2V, 300mA
w/LED Driver:
No
w/Supervisor:
No
w/Sequencer:
No
Voltage - Supply:
1.7V ~ 5.5V
Operating Temperature:
-40°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-WLCSP (2x2)

ADP5033ACBZ-9-R7 FAQ

1.How can I place an order for ADP5033ACBZ-9-R7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADP5033ACBZ-9-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADP5033ACBZ-9-R7 reliable?

The price and inventory of ADP5033ACBZ-9-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5033ACBZ-9-R7 is usually 5 days.

3.What payment methods are accepted for ADP5033ACBZ-9-R7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5033ACBZ-9-R7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADP5033ACBZ-9-R7?

ADP5033ACBZ-9-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADP5033ACBZ-9-R7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADP5033ACBZ-9-R7?

For technical support, including ADP5033ACBZ-9-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5033ACBZ-9-R7 requirements.

6.How does Aetrix verify that ADP5033ACBZ-9-R7 is sourced from the original manufacturer or authorized distributors?

All ADP5033ACBZ-9-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5033ACBZ-9-R7 meets industry standards.

7.What is the process for return or replacement of ADP5033ACBZ-9-R7?

All ADP5033ACBZ-9-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5033ACBZ-9-R7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADP5033ACBZ-9-R7 part is unused and in its original packaging.

Return procedure for ADP5033ACBZ-9-R7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

ADP5033ACBZ-9-R7 Tags

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