Analog Devices Inc. ADP5034AREZ-1
- Part No.:
- ADP5034AREZ-1
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
ADP5034AREZ-1.pdf
- Description:
- IC REG QUAD BCK/LNR SYNC 28TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,313
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADP5034AREZ-1 from Analog Devices is a dual 3 MHz, 1200 mA buck regulator with two 300 mA low-dropout (LDO) regulators in a single 24-lead 4 mm × 4 mm LFCSP package. It delivers tightly regulated 0.8–3.8 V buck outputs and 0.8–5.2 V LDO outputs with ±1.8% accuracy, high PSRR (>60 dB at 10 kHz), and forced PWM/auto PSM operation-ideal for powering FPGAs and RF chipsets in space-constrained portable instrumentation.
For engineers reviewing the ADP5034AREZ-1 datasheet, ADP5034AREZ-1 pinout, ADP5034AREZ-1 application, or ADP5034AREZ-1 equivalent, key selection factors include its dual-buck + dual-LDO integration, out-of-phase switching to reduce input capacitance, factory-programmable or adjustable output voltages, and thermal performance (θJA = 35°C/W) in the LFCSP package.
Technical Context
The ADP5034AREZ-1 integrates two synchronous buck regulators operating at 2.5–3.5 MHz with out-of-phase switching to minimize input ripple and capacitor requirements. Each buck supports 1200 mA load with programmable voltage feedback (0.491–0.509 V) and current limiting (1600–2300 mA).
Its two LDOs accept 1.7–5.5 V input and deliver up to 300 mA each with dropout as low as 50 mV (at 5.2 V/300 mA), 60–64 dB PSRR up to 1 MHz, and output noise of 60–100 µVrms. Dedicated enable pins (EN1–EN4) and MODE pin support independent channel control and PWM/PSM mode selection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck switching frequency | 2.5–3.5 MHz - enables use of compact 1 µH inductors and 10 µF ceramic output capacitors. |
| Buck output current | 1200 mA per channel - sufficient to power core logic rails of mid-tier FPGAs and ASICs. |
| LDO output current | 300 mA per channel - supports analog/digital I/O supplies with low-noise, high-PSRR regulation. |
| Output voltage accuracy | ±1.8% - ensures stable system-level timing and signal integrity across temperature (−40°C to +125°C). |
| LDO dropout voltage | 50 mV at 5.2 V/300 mA - maximizes battery runtime in portable medical devices. |
| Package thermal resistance | θJA = 35°C/W (LFCSP) - allows >1.5 W total power dissipation without external heatsink under typical PCB layout. |
| Quiescent current | 108–175 µA (all channels enabled, no switching) - critical for always-on subsystems in battery-powered instruments. |
Pinout & Package
The ADP5034AREZ-1 is packaged in a 24-lead, 4 mm × 4 mm LFCSP with exposed pad (EPAD) soldered to ground plane for thermal and electrical performance. Pin functions are validated per Analog Devices Rev. E datasheet Figure 2 and Table 8.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1, VIN2 | Buck input supply | 2.3–5.5 V main input rails; must be tied together and to AVIN for proper biasing. |
| SW1, SW2 | Buck switching node | Connects to external 1 µH inductor; requires low-ESR ceramic output capacitor (10 µF min) at VOUT1/VOUT2. |
| FB1, FB2 | Buck feedback input | 0.491–0.509 V reference - sets output via resistor divider for adjustable versions; left open for fixed-output variants. |
| EN1–EN4 | Independent enable inputs | Logic-high active (VIH ≥ 1.1 V); allows staggered power-up sequencing for FPGA core/I/O rails. |
| MODE | Buck operating mode control | High = forced PWM (constant frequency); low = auto PWM/PSM (improves light-load efficiency). |
| VIN3, VIN4 | LDO input supply | 1.7–5.5 V inputs; may differ from buck inputs to optimize noise isolation (e.g., clean LDO input from buck output). |
| VOUT3, VOUT4 | LDO output sensing | Direct connection to top of output capacitor; enables accurate regulation despite PCB trace impedance. |
| FB3, FB4 | LDO feedback input | 0.491–0.509 V reference - used with external resistive divider for adjustable LDO outputs (e.g., 1.2 V, 2.8 V). |
Key Features
| Feature | Design Value |
|---|---|
| Out-of-phase buck switching | Reduces RMS input current ripple by ~30%, allowing smaller input bulk capacitors (4.7 µF min). |
| High PSRR LDOs | 60–64 dB rejection up to 1 MHz - suppresses switching noise from adjacent buck stages feeding sensitive analog circuits. |
| Low-noise LDO outputs | 60 µVrms (LDO2) and 100 µVrms (LDO1) over 10 Hz–100 kHz - meets stringent noise specs for RF front-end biasing. |
| Dedicated analog/ground separation | Separate AVIN, AGND, and PGND1/PGND2 pins - minimizes coupling between analog reference circuitry and high-current power grounds. |
| Factory-programmable outputs | Fixed-voltage variants available without external feedback components - simplifies BOM and layout for standard rails (e.g., 1.8 V, 3.3 V). |
Applications
| Portable Medical Instrumentation | FPGA Core & I/O Power |
|---|---|
Use Scenario: Battery-powered ultrasound probe requiring ultra-low-noise analog supply and efficient digital rail sequencing. IC Role / Device Role / Timing Role: ADP5034AREZ-1 provides isolated 2.8 V LDO1 (for ADC reference) and 1.2 V LDO2 (for digital I/O), while buck regulators supply 1.2 V core and 3.3 V interface rails. Use Value: 60 µVrms LDO2 noise and 64 dB PSRR at 1 MHz prevent switching artifacts from degrading ultrasound image SNR. |
Use Scenario: Compact industrial FPGA module needing four independent, sequenced power rails in minimal board area. IC Role / Device Role / Timing Role: ADP5034AREZ-1 integrates all four rails (core, memory, I/O, auxiliary) with dedicated EN pins enabling precise power-up order per Xilinx/Intel FPGA spec. Use Value: Out-of-phase buck operation reduces input capacitor count from 4× to 2× 4.7 µF, saving >15 mm² PCB area. |
| RF Transceiver Biasing | Space-Constrained Test Equipment |
Use Scenario: 5G small-cell radio unit where PA bias voltage must reject switching noise from nearby DC/DC converters. IC Role / Device Role / Timing Role: ADP5034AREZ-1's LDO1 delivers clean 5.2 V bias to RF power amplifier, fed from a separate low-noise LDO input rail decoupled from buck outputs. Use Value: 50 mV dropout at 300 mA enables >95% efficiency at 5.2 V output, extending thermal headroom in sealed enclosures. |
Use Scenario: Handheld spectrum analyzer requiring four precision rails (1.8 V, 2.5 V, 3.3 V, 5.0 V) within 20 mm × 20 mm footprint. IC Role / Device Role / Timing Role: ADP5034AREZ-1 replaces four discrete regulators, using its 4 mm × 4 mm LFCSP to consolidate power management into one IC. Use Value: 35°C/W θJA enables full 4-channel operation at 85°C ambient without derating - verified per datasheet thermal tables. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck + dual-LDO power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP5034ACBZ-1 | Same silicon, 24-lead WLCSP (2.1 mm × 2.1 mm) - 44% smaller footprint but higher θJA (52°C/W). | Preferred for ultra-dense wearables; requires tighter thermal layout and lower max load per rail. | Select ADP5034ACBZ-1 only when board area is constrained below 4 mm × 4 mm and thermal margin permits. |
| TPS65023RSBR | Texas Instruments part: dual 600 mA bucks + triple 260 mA LDOs; 3 MHz switching; 48-pin QFN (7 mm × 7 mm). | Offers third LDO and higher integration (I2C interface), but larger size and no PSM mode - less efficient at light loads. | Choose TPS65023RSBR when system requires >2 LDOs or digital configuration; avoid if minimizing quiescent current is critical. |
Compared with ADP5034AREZ-1, ADP5034ACBZ-1 trades thermal performance for miniaturization, while TPS65023RSBR adds configurability and LDO count at the cost of efficiency and footprint - making ADP5034AREZ-1 optimal for balanced space, thermal, and light-load efficiency requirements.
Availability
ADP5034AREZ-1 is available at Aetrix Electronics and suitable for portable medical instrumentation, FPGA power delivery, RF transceiver biasing, and space-constrained test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ADP5034AREZ-1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide.
The ADP5034AREZ-1 belongs to Analog Devices' Power Management Unit (PMU) family, engineered specifically for multi-rail power delivery in portable and instrumentation systems where integration, low noise, and thermal efficiency are critical.
FAQ
What is the maximum supported input voltage for the buck regulators in ADP5034AREZ-1?
The ADP5034AREZ-1 buck regulators (BUCK1 and BUCK2) support an input voltage range of 2.3 V to 5.5 V, as specified in the General Specifications table (Page 4). This range applies to both VIN1 and VIN2 pins, and they must be tied together with AVIN for proper operation. Exceeding 5.5 V risks permanent damage per Absolute Maximum Ratings.
Does ADP5034AREZ-1 support independent voltage setting for each regulator?
Yes, ADP5034AREZ-1 supports independent voltage configuration: buck outputs (VOUT1/VOUT2) are set via FB1/FB2 resistor dividers (0.491–0.509 V reference), and LDO outputs (VOUT3/VOUT4) use FB3/FB4 dividers. Fixed-output variants are factory-programmed; the AREZ-1 suffix indicates the adjustable version with external feedback capability.
How does the MODE pin affect efficiency in ADP5034AREZ-1?
When MODE = low, ADP5034AREZ-1 operates in auto PWM/PSM mode: it switches to power-save mode below ~100 mA load, reducing quiescent current and improving light-load efficiency. When MODE = high, it forces continuous PWM mode - maintaining constant 3 MHz frequency but increasing standby current - ideal for noise-sensitive applications requiring deterministic switching.
What is the thermal performance of ADP5034AREZ-1 in its LFCSP package?
ADP5034AREZ-1 in the 24-lead LFCSP package has θJA = 35°C/W and θJC = 3°C/W (Page 7, Table 7). With the exposed pad soldered to a 4-layer PCB's internal ground plane, it sustains full 4-channel operation (1200 mA + 1200 mA + 300 mA + 300 mA) at 85°C ambient without thermal shutdown, as confirmed in thermal characterization data (Page 24).
Can ADP5034AREZ-1 power both analog and digital subsystems simultaneously?
Yes, ADP5034AREZ-1 is explicitly designed for this: LDO1 (VOUT3) targets analog rails (e.g., ADC references, sensors) with 100 µVrms noise and >60 dB PSRR, while LDO2 (VOUT4) serves digital I/O with 60 µVrms noise. Its separate AVIN/AGND and VIN3/VIN4 inputs allow physical and electrical isolation between analog and digital supply domains.
ADP5034AREZ-1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 3MHz
- Voltage/Current - Output 1:
- 0.8V ~ 3.8V, 1.2A
- Voltage/Current - Output 2:
- 0.8V ~ 3.8V, 1.2A
- Voltage/Current - Output 3:
- 0.8V ~ 5.2V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
ADP5034AREZ-1 FAQ
1.How can I place an order for ADP5034AREZ-1 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5034AREZ-1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5034AREZ-1 reliable?
The price and inventory of ADP5034AREZ-1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5034AREZ-1 is usually 5 days.
3.What payment methods are accepted for ADP5034AREZ-1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5034AREZ-1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP5034AREZ-1?
ADP5034AREZ-1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5034AREZ-1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5034AREZ-1?
For technical support, including ADP5034AREZ-1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5034AREZ-1 requirements.
6.How does Aetrix verify that ADP5034AREZ-1 is sourced from the original manufacturer or authorized distributors?
All ADP5034AREZ-1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5034AREZ-1 meets industry standards.
7.What is the process for return or replacement of ADP5034AREZ-1?
All ADP5034AREZ-1 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5034AREZ-1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5034AREZ-1 part is unused and in its original packaging.
Return procedure for ADP5034AREZ-1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADP5034AREZ-1 Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

