Analog Devices Inc. ADP5055ACCZ-R7
- Part No.:
- ADP5055ACCZ-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 43-VFLGA
- Datasheet:
-
ADP5055ACCZ-R7.pdf
- Description:
- IC REG BUCK ADJ TRPL 43LGA
- Quantity:
- Payment:

- Shipping:

Inventory:1,667
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Product details
Overview
ADP5055ACCZ-R7 from Analog Devices is a triple-channel, PMBus-enabled synchronous buck regulator IC integrating two 7 A channels (parallelable to 14 A) and one 3 A channel in a single 43-terminal LGA package. It operates from 2.75 V–18 V input, supports dynamic voltage scaling via 8-bit DAC, and delivers precision regulation with ±0.69% FB accuracy over −40°C to +125°C for FPGA core and I/O rail power delivery.
For engineers reviewing the ADP5055ACCZ-R7 datasheet, ADP5055ACCZ-R7 pinout, ADP5055ACCZ-R7 application, or ADP5055ACCZ-R7 equivalent, this page provides verified technical context, validated pin functions, confirmed thermal and switching performance, real-world sequencing capabilities, and cross-referenced alternatives for multi-rail industrial and communications power designs.
Technical Context
The ADP5055ACCZ-R7 implements three independent synchronous buck regulators with integrated high-side/low-side MOSFETs: Channels 1 & 2 each support 7 A continuous output (or 14 A in parallel), while Channel 3 delivers 3 A. All channels feature external compensation, programmable soft-start, and selectable FPWM/PSM modes.
Its PMBus interface enables full configuration of output voltages (408 mV–790.5 mV in 1.5 mV steps), switching frequency (250 kHz–2500 kHz), power-up/down sequencing, and fault responses-including per-channel power-good flags, UVLO thresholds, and hiccup-mode overcurrent protection with valley current limiting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.75 V to 18 V - supports direct connection to unregulated 12 V or 5 V rails without preregulators. |
| Channel 1 & 2 Output Current | 7 A each (9.4 A valley current limit) - enables high-current FPGA core or processor VDD rails. |
| Channel 3 Output Current | 3 A (4.2 A valley current limit) - powers auxiliary I/O, memory, or analog subsystems. |
| Feedback Accuracy | ±0.69% at −40°C to +125°C - ensures stable regulation across industrial temperature range. |
| Switching Frequency Range | 250 kHz to 2500 kHz - allows optimization for efficiency (low fSW) or size (high fSW). |
| PMBus Interface | Full 2-wire PMBus v1.3 compliance - enables real-time DVS, telemetry, and fault logging in system management. |
| Junction Temperature Rating | −40°C to +150°C - qualified for harsh environments including base station and medical equipment. |
Pinout & Package
ADP5055ACCZ-R7 uses a 43-terminal, 5.00 mm × 5.50 mm land grid array (LGA) package with exposed thermal pad. Pin assignments are defined per Analog Devices' Rev. 0 datasheet Figure 4 and Table 6.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBIAS | Bias supply input | Provides 4.5 V–18 V bias to internal VREG; decoupling required for stable control circuitry. |
| PVIN1–PVIN3 | Power input rails | Three independent high-voltage inputs (up to 18 V); each feeds its respective buck stage. |
| SW1–SW3 | Switching node outputs | Connect to external inductors; require low-ESR ceramic bootstrap capacitors (BST1–BST3). |
| FB1–FB3 | Feedback sensing inputs | Monitor output voltage via resistor dividers; enable precise regulation down to 408 mV. |
| EN1–EN3 | Channel enable inputs | 0.615 V threshold enables flexible power sequencing and UVLO customization. |
| SCL/SDA | PMBus interface | 2-wire bus for configuration, telemetry, and dynamic voltage scaling via 8-bit DAC. |
| PWRGD | Power-good flag | Open-drain output indicating regulated status of selected channels; configurable hysteresis. |
Key Features
| Feature | Design Value |
|---|---|
| Triple integrated buck architecture | Eliminates need for three discrete regulators and associated layout complexity on dense PCBs. |
| Parallel operation (Ch1+Ch2) | Delivers up to 14 A from two 7 A channels with synchronized switching and shared current sharing. |
| 8-bit DAC-based DVS | Enables real-time output voltage adjustment in 1.5 mV steps for processor DVFS and low-power states. |
| External compensation | Allows tuning loop response for fast transient load behavior-critical for FPGA and SoC applications. |
| Configurable sequencing & discharge | Programmable power-up/down order and selective active output discharge prevent backfeeding. |
Applications
| Small Cell Base Stations | FPGA Power Delivery |
|---|---|
Use Scenario: Compact RF front-end modules requiring tightly regulated, sequenced 1.2 V, 1.8 V, and 3.3 V rails under variable thermal load. IC Role / Device Role / Timing Role: Primary multi-rail power management IC delivering core, I/O, and auxiliary voltages with PMBus telemetry for remote monitoring. Use Value: Reduces board area by 60% vs. discrete solutions while enabling adaptive voltage scaling during traffic load changes. |
Use Scenario: High-performance FPGA platforms needing independent, high-current rails with precise startup timing and dynamic voltage scaling. IC Role / Device Role / Timing Role: Centralized power controller managing VCCINT, VCCIO, and VCCAUX with programmable soft-start and power-good coordination. Use Value: Guarantees safe FPGA configuration via controlled sequencing and prevents latch-up with active output discharge. |
| Medical Imaging Systems | Security & Surveillance Cameras |
Use Scenario: Portable ultrasound or MRI subsystems demanding ultra-stable, low-noise 1.2 V and 2.5 V supplies with extended temperature operation. IC Role / Device Role / Timing Role: High-reliability triple-buck regulator supporting analog front-end, digital processing, and sensor interface rails. Use Value: Maintains ±0.69% regulation accuracy from −40°C to +125°C junction, ensuring signal integrity in thermally constrained enclosures. |
Use Scenario: Edge AI cameras with SoC, ISP, and image sensor requiring efficient, compact, and thermally robust power conversion. IC Role / Device Role / Timing Role: Single-package solution powering SoC core (1.2 V), memory (1.8 V), and sensors (3.3 V) with minimal BOM count. Use Value: Achieves >90% efficiency at 5 A load (12 V input → 1.2 V) and supports silent PSM mode during standby. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS549D22RTQR | Two 9 A + one 4 A channels; no PMBus; only I²C-compatible telemetry; fixed 600 kHz fSW. | Lacks DVS and full sequencing control; suited for cost-sensitive, non-telemetry systems. | Choose when PMBus configurability and fine-grained voltage adjustment are not required. |
| ISL91211AIRZ-T7A | Triple 6 A buck with I²C interface; 2.5 V–5.5 V input; no bias rail; lower max input voltage. | Not suitable for 12 V direct input; limited to low-voltage battery-powered applications. | Select only for sub-6 V input systems where footprint and light-load efficiency are prioritized. |
Compared with TPS549D22RTQR and ISL91211AIRZ-T7A, the ADP5055ACCZ-R7 uniquely supports 18 V direct input, full PMBus v1.3 DVS, and 150°C junction rating-making it the only option qualified for high-input-voltage, thermally demanding, and remotely managed infrastructure applications.
Availability
ADP5055ACCZ-R7 is available at Aetrix Electronics and suitable for small cell base stations, FPGA power delivery, medical imaging systems, and security & surveillance cameras requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for ADP5055ACCZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The ADP5055ACCZ-R7 belongs to Analog Devices' Power by Linear™ family of highly integrated, digitally configurable power management ICs designed for space-constrained, thermally demanding, and system-managed applications in infrastructure and embedded systems.
FAQ
What is the maximum input voltage supported by the ADP5055ACCZ-R7?
The ADP5055ACCZ-R7 supports a wide input voltage range of 2.75 V to 18 V on its PVINx pins, and a separate 4.5 V to 18 V bias input (VBIAS) for the internal regulator. This allows direct connection to common intermediate bus voltages without preregulation, making ADP5055ACCZ-R7 ideal for systems with 12 V or 5 V distribution rails.
Does the ADP5055ACCZ-R7 support parallel operation of its buck channels?
Yes, the ADP5055ACCZ-R7 supports parallel operation of Channel 1 and Channel 2 to deliver up to 14 A total output current. This is enabled via CFG1 pin configuration and requires synchronized switching and matched external components. Channel 3 remains independent and cannot be paralleled with the others.
What is the feedback voltage accuracy of the ADP5055ACCZ-R7 over temperature?
The ADP5055ACCZ-R7 achieves ±0.69% feedback voltage accuracy for FB1–FB3 over the operating junction temperature range of −40°C to +125°C. At 25°C, accuracy tightens to ±0.25%, and the device maintains ±0.83% accuracy up to +150°C junction temperature.
Can the ADP5055ACCZ-R7 perform dynamic voltage scaling (DVS)?
Yes, the ADP5055ACCZ-R7 integrates an 8-bit DAC and full PMBus v1.3 interface to enable dynamic voltage scaling. Output voltages can be adjusted in 1.5 mV steps from 408 mV to 790.5 mV, allowing real-time adaptation of core voltages during processor DVFS transitions.
What package type and thermal performance does the ADP5055ACCZ-R7 use?
The ADP5055ACCZ-R7 uses a 43-terminal, 5.00 mm × 5.50 mm LGA package (CC-43-1) with exposed thermal pad. Its thermal resistance is θJA = 26.0°C/W (JEDEC-compliant simulation), and it is rated for continuous operation up to +150°C junction temperature-validated for high-density, convection-cooled applications.
ADP5055ACCZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 43-VFLGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.408V
- Voltage - Output (Max):
- 0.8V
- Current - Output:
- 3A, 7A, 14A
- Frequency - Switching:
- 250kHz ~ 2.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 43-LGA (5x5.5)
ADP5055ACCZ-R7 FAQ
1.How can I place an order for ADP5055ACCZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5055ACCZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5055ACCZ-R7 reliable?
The price and inventory of ADP5055ACCZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5055ACCZ-R7 is usually 5 days.
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4.How is shipping managed for ADP5055ACCZ-R7?
ADP5055ACCZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5055ACCZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5055ACCZ-R7?
For technical support, including ADP5055ACCZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5055ACCZ-R7 requirements.
6.How does Aetrix verify that ADP5055ACCZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADP5055ACCZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5055ACCZ-R7 meets industry standards.
7.What is the process for return or replacement of ADP5055ACCZ-R7?
All ADP5055ACCZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5055ACCZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5055ACCZ-R7 part is unused and in its original packaging.
Return procedure for ADP5055ACCZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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